From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E824C433EF for ; Thu, 28 Oct 2021 11:28:17 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id DEBE760FC4 for ; Thu, 28 Oct 2021 11:28:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org DEBE760FC4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2E32B41100; Thu, 28 Oct 2021 13:28:16 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 62B6040DF4 for ; Thu, 28 Oct 2021 13:28:14 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10150"; a="217560583" X-IronPort-AV: E=Sophos;i="5.87,189,1631602800"; d="scan'208";a="217560583" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2021 04:28:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,189,1631602800"; d="scan'208";a="597762971" Received: from fmsmsx606.amr.corp.intel.com ([10.18.126.86]) by orsmga004.jf.intel.com with ESMTP; 28 Oct 2021 04:28:13 -0700 Received: from shsmsx603.ccr.corp.intel.com (10.109.6.143) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Thu, 28 Oct 2021 04:28:12 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX603.ccr.corp.intel.com (10.109.6.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Thu, 28 Oct 2021 19:28:10 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2242.012; Thu, 28 Oct 2021 19:28:10 +0800 From: "Zhang, Qi Z" To: "Guo, Junfeng" , "Wu, Jingjing" , "Xing, Beilei" CC: "dev@dpdk.org" , "Yigit, Ferruh" , "Xu, Ting" Thread-Topic: [PATCH v7 2/4] net/ice/base: add function to set HW profile for raw flow Thread-Index: AQHXy9w0JXsQdCUSbUuAcFg1glODdKvoRYEw Date: Thu, 28 Oct 2021 11:28:10 +0000 Message-ID: References: <20211028083416.1490834-5-junfeng.guo@intel.com> <20211028091346.1674650-1-junfeng.guo@intel.com> <20211028091346.1674650-3-junfeng.guo@intel.com> In-Reply-To: <20211028091346.1674650-3-junfeng.guo@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.200.16 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v7 2/4] net/ice/base: add function to set HW profile for raw flow X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Guo, Junfeng > Sent: Thursday, October 28, 2021 5:14 PM > To: Zhang, Qi Z ; Wu, Jingjing ; > Xing, Beilei > Cc: dev@dpdk.org; Yigit, Ferruh ; Xu, Ting > ; Guo, Junfeng > Subject: [PATCH v7 2/4] net/ice/base: add function to set HW profile for = raw > flow >=20 > Based on the parser library, we can directly set HW profile and associate= the > main/ctrl vsi. >=20 > Signed-off-by: Junfeng Guo Acked-by: Qi Zhang As this is the last base code patch for DPDK 21.11, update FreeBSD release = version in driver/net/ice/base/README during merge. Applied to dpdk-next-net-intel. Thanks Qi > --- > drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ > drivers/net/ice/base/ice_flex_pipe.h | 3 + > drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ > drivers/net/ice/base/ice_flow.h | 4 ++ > 4 files changed, 140 insertions(+) >=20 > diff --git a/drivers/net/ice/base/ice_flex_pipe.c > b/drivers/net/ice/base/ice_flex_pipe.c > index 06a233990f..395787806b 100644 > --- a/drivers/net/ice/base/ice_flex_pipe.c > +++ b/drivers/net/ice/base/ice_flex_pipe.c > @@ -6365,3 +6365,52 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum > ice_block blk, u16 vsi, u64 hdl) >=20 > return status; > } > + > +/** > + * ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow > +entry > + * @hw: pointer to the HW struct > + * @blk: HW block > + * @dest_vsi_handle: dest VSI handle > + * @fdir_vsi_handle: fdir programming VSI handle > + * @id: profile id (handle) > + * > + * Calling this function will update the hardware tables to enable the > + * profile indicated by the ID parameter for the VSIs specified in the > +VSI > + * array. Once successfully called, the flow will be enabled. > + */ > +enum ice_status > +ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk, > + u16 dest_vsi_handle, u16 fdir_vsi_handle, int id) { > + enum ice_status status =3D ICE_SUCCESS; > + u16 vsi_num; > + > + vsi_num =3D ice_get_hw_vsi_num(hw, dest_vsi_handle); > + status =3D ice_add_prof_id_flow(hw, blk, vsi_num, id); > + if (status) { > + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for main VSI > flow entry, %d\n", > + status); > + goto err_add_prof; > + } > + > + if (blk !=3D ICE_BLK_FD) > + return status; > + > + vsi_num =3D ice_get_hw_vsi_num(hw, fdir_vsi_handle); > + status =3D ice_add_prof_id_flow(hw, blk, vsi_num, id); > + if (status) { > + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for ctrl VSI > flow entry, %d\n", > + status); > + goto err_add_entry; > + } > + > + return status; > + > +err_add_entry: > + vsi_num =3D ice_get_hw_vsi_num(hw, dest_vsi_handle); > + ice_rem_prof_id_flow(hw, blk, vsi_num, id); > +err_add_prof: > + ice_flow_rem_prof(hw, blk, id); > + > + return status; > +} > diff --git a/drivers/net/ice/base/ice_flex_pipe.h > b/drivers/net/ice/base/ice_flex_pipe.h > index dd332312dd..23ba45564a 100644 > --- a/drivers/net/ice/base/ice_flex_pipe.h > +++ b/drivers/net/ice/base/ice_flex_pipe.h > @@ -76,6 +76,9 @@ enum ice_status > ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 > hdl); enum ice_status ice_rem_prof_id_flow(struct ice_hw *hw, enum > ice_block blk, u16 vsi, u64 hdl); > +enum ice_status > +ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk, > + u16 dest_vsi_handle, u16 fdir_vsi_handle, int id); > enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enu= m > ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 l= en); > diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_f= low.c > index 77b6b130c1..f699dbbc74 100644 > --- a/drivers/net/ice/base/ice_flow.c > +++ b/drivers/net/ice/base/ice_flow.c > @@ -2524,6 +2524,90 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum > ice_block blk, > return status; > } >=20 > +#define FLAG_GTP_EH_PDU_LINK BIT_ULL(13) > +#define FLAG_GTP_EH_PDU BIT_ULL(14) > + > +#define FLAG_GTPU_MSK \ > + (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK) > +#define FLAG_GTPU_DW \ > + (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK) > +#define FLAG_GTPU_UP \ > + (FLAG_GTP_EH_PDU) > +/** > + * ice_flow_set_hw_prof - Set HW flow profile based on the parsed > +profile info > + * @hw: pointer to the HW struct > + * @dest_vsi_handle: dest VSI handle > + * @fdir_vsi_handle: fdir programming VSI handle > + * @prof: stores parsed profile info from raw flow > + * @blk: classification stage > + */ > +enum ice_status > +ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle, > + u16 fdir_vsi_handle, struct ice_parser_profile *prof, > + enum ice_block blk) > +{ > + int id =3D ice_find_first_bit(prof->ptypes, UINT16_MAX); > + struct ice_flow_prof_params *params; > + u8 fv_words =3D hw->blk[blk].es.fvw; > + enum ice_status status; > + u16 vsi_num; > + int i, idx; > + > + params =3D (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params= )); > + if (!params) > + return ICE_ERR_NO_MEMORY; > + > + for (i =3D 0; i < ICE_MAX_FV_WORDS; i++) { > + params->es[i].prot_id =3D ICE_PROT_INVALID; > + params->es[i].off =3D ICE_FV_OFFSET_INVAL; > + } > + > + for (i =3D 0; i < prof->fv_num; i++) { > + if (hw->blk[blk].es.reverse) > + idx =3D fv_words - i - 1; > + else > + idx =3D i; > + params->es[idx].prot_id =3D prof->fv[i].proto_id; > + params->es[idx].off =3D prof->fv[i].offset; > + params->mask[idx] =3D CPU_TO_BE16(prof->fv[i].msk); > + } > + > + switch (prof->flags) { > + case FLAG_GTPU_DW: > + params->attr =3D ice_attr_gtpu_down; > + params->attr_cnt =3D ARRAY_SIZE(ice_attr_gtpu_down); > + break; > + case FLAG_GTPU_UP: > + params->attr =3D ice_attr_gtpu_up; > + params->attr_cnt =3D ARRAY_SIZE(ice_attr_gtpu_up); > + break; > + default: > + if (prof->flags_msk & FLAG_GTPU_MSK) { > + params->attr =3D ice_attr_gtpu_session; > + params->attr_cnt =3D ARRAY_SIZE(ice_attr_gtpu_session); > + } > + break; > + } > + > + status =3D ice_add_prof(hw, blk, id, (u8 *)prof->ptypes, > + params->attr, params->attr_cnt, > + params->es, params->mask, false); > + if (status) > + goto free_params; > + > + status =3D ice_flow_assoc_hw_prof(hw, blk, dest_vsi_handle, > + fdir_vsi_handle, id); > + if (status) > + goto free_params; > + > + return ICE_SUCCESS; > + > +free_params: > + ice_free(hw, params); > + > + return status; > +} > + > /** > * ice_flow_add_prof - Add a flow profile for packet segments and matche= d > fields > * @hw: pointer to the HW struct > diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_f= low.h > index 371d960066..dea7b3c0e8 100644 > --- a/drivers/net/ice/base/ice_flow.h > +++ b/drivers/net/ice/base/ice_flow.h > @@ -548,6 +548,10 @@ enum ice_status > ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 > vsi_handle, > u16 vsig); > enum ice_status > +ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle, > + u16 fdir_vsi_handle, struct ice_parser_profile *prof, > + enum ice_block blk); > +enum ice_status > ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id, > u8 *hw_prof); >=20 > -- > 2.25.1