[PATCH 1/5] net/szedata2: refactor ibuf and obuf names

[PATCH 1/5] net/szedata2: refactor ibuf and obuf names

[Matej Vido]

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/rte_eth_szedata2.c |   80 +++++++++++++++---------------
 drivers/net/szedata2/rte_eth_szedata2.h |   48 +++++++++---------
 2 files changed, 64 insertions(+), 64 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index c70e9f3..5be08da 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -1149,11 +1149,11 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
 
-	switch (cgmii_link_speed(ibuf)) {
+	switch (get_link_speed(ibuf)) {
 	case SZEDATA2_LINK_SPEED_10G:
 		link.link_speed = ETH_SPEED_NUM_10G;
 		break;
@@ -1171,8 +1171,8 @@ struct pmd_internals {
 	/* szedata2 uses only full duplex */
 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
 
-	link.link_status = (cgmii_ibuf_is_enabled(ibuf) &&
-			cgmii_ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+	link.link_status = (ibuf_is_enabled(ibuf) &&
+			ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
 
 	link.link_autoneg = ETH_LINK_SPEED_FIXED;
 
@@ -1187,15 +1187,15 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_obuf *);
-
-	cgmii_ibuf_enable(ibuf);
-	cgmii_obuf_enable(obuf);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
+			volatile struct szedata2_obuf *);
+
+	ibuf_enable(ibuf);
+	obuf_enable(obuf);
 	return 0;
 }
 
@@ -1204,15 +1204,15 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_obuf *);
-
-	cgmii_ibuf_disable(ibuf);
-	cgmii_obuf_disable(obuf);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
+			volatile struct szedata2_obuf *);
+
+	ibuf_disable(ibuf);
+	obuf_disable(obuf);
 	return 0;
 }
 
@@ -1292,10 +1292,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
 }
 
 static void
@@ -1303,10 +1303,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
 }
 
 static void
@@ -1314,10 +1314,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
 }
 
 static void
@@ -1325,10 +1325,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
 }
 
 static const struct eth_dev_ops ops = {
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index afe8a38..4f56fcf 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -209,9 +209,9 @@ enum szedata2_mac_check_mode {
 };
 
 /*
- * Structure describes CGMII IBUF address space
+ * Structure describes IBUF address space
  */
-struct szedata2_cgmii_ibuf {
+struct szedata2_ibuf {
 	/** Total Received Frames Counter low part */
 	uint32_t trfcl;
 	/** Correct Frames Counter low part */
@@ -248,8 +248,8 @@ struct szedata2_cgmii_ibuf {
 	uint32_t oroch;
 } __rte_packed;
 
-/* Offset of CGMII IBUF memory for MAC addresses */
-#define SZEDATA2_CGMII_IBUF_MAC_MEM_OFF 0x80
+/* Offset of IBUF memory for MAC addresses */
+#define SZEDATA2_IBUF_MAC_MEM_OFF 0x80
 
 /*
  * @return
@@ -257,7 +257,7 @@ struct szedata2_cgmii_ibuf {
  *     false if IBUF is disabled
  */
 static inline bool
-cgmii_ibuf_is_enabled(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_is_enabled(volatile struct szedata2_ibuf *ibuf)
 {
 	return ((rte_le_to_cpu_32(ibuf->ibuf_en) & 0x1) != 0) ? true : false;
 }
@@ -266,7 +266,7 @@ struct szedata2_cgmii_ibuf {
  * Enables IBUF.
  */
 static inline void
-cgmii_ibuf_enable(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_enable(volatile struct szedata2_ibuf *ibuf)
 {
 	ibuf->ibuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) | 0x1);
@@ -276,7 +276,7 @@ struct szedata2_cgmii_ibuf {
  * Disables IBUF.
  */
 static inline void
-cgmii_ibuf_disable(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_disable(volatile struct szedata2_ibuf *ibuf)
 {
 	ibuf->ibuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) & ~0x1);
@@ -288,7 +288,7 @@ struct szedata2_cgmii_ibuf {
  *     false if ibuf link is down
  */
 static inline bool
-cgmii_ibuf_is_link_up(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_is_link_up(volatile struct szedata2_ibuf *ibuf)
 {
 	return ((rte_le_to_cpu_32(ibuf->ibuf_st) & 0x80) != 0) ? true : false;
 }
@@ -298,7 +298,7 @@ struct szedata2_cgmii_ibuf {
  *     MAC address check mode
  */
 static inline enum szedata2_mac_check_mode
-cgmii_ibuf_mac_mode_read(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_mac_mode_read(volatile struct szedata2_ibuf *ibuf)
 {
 	switch (rte_le_to_cpu_32(ibuf->mac_chmode) & 0x3) {
 	case 0x0:
@@ -318,7 +318,7 @@ struct szedata2_cgmii_ibuf {
  * Writes "mode" in MAC address check mode register.
  */
 static inline void
-cgmii_ibuf_mac_mode_write(volatile struct szedata2_cgmii_ibuf *ibuf,
+ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
 		enum szedata2_mac_check_mode mode)
 {
 	ibuf->mac_chmode = rte_cpu_to_le_32(
@@ -326,9 +326,9 @@ struct szedata2_cgmii_ibuf {
 }
 
 /*
- * Structure describes CGMII OBUF address space
+ * Structure describes OBUF address space
  */
-struct szedata2_cgmii_obuf {
+struct szedata2_obuf {
 	/** Total Sent Frames Counter low part */
 	uint32_t tsfcl;
 	/** Octets Sent Counter low part */
@@ -361,7 +361,7 @@ struct szedata2_cgmii_obuf {
  *     false if OBUF is disabled
  */
 static inline bool
-cgmii_obuf_is_enabled(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_is_enabled(volatile struct szedata2_obuf *obuf)
 {
 	return ((rte_le_to_cpu_32(obuf->obuf_en) & 0x1) != 0) ? true : false;
 }
@@ -370,7 +370,7 @@ struct szedata2_cgmii_obuf {
  * Enables OBUF.
  */
 static inline void
-cgmii_obuf_enable(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_enable(volatile struct szedata2_obuf *obuf)
 {
 	obuf->obuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) | 0x1);
@@ -380,7 +380,7 @@ struct szedata2_cgmii_obuf {
  * Disables OBUF.
  */
 static inline void
-cgmii_obuf_disable(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_disable(volatile struct szedata2_obuf *obuf)
 {
 	obuf->obuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) & ~0x1);
@@ -393,7 +393,7 @@ struct szedata2_cgmii_obuf {
  * @return Link speed constant.
  */
 static inline enum szedata2_link_speed
-cgmii_link_speed(volatile struct szedata2_cgmii_ibuf *ibuf)
+get_link_speed(volatile struct szedata2_ibuf *ibuf)
 {
 	uint32_t speed = (rte_le_to_cpu_32(ibuf->ibuf_st) & 0x70) >> 4;
 	switch (speed) {
@@ -426,22 +426,22 @@ struct szedata2_cgmii_obuf {
 #elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
 
 /*
- * CGMII IBUF offset from the beginning of PCI resource address space.
+ * IBUF offset from the beginning of PCI resource address space.
  */
-#define SZEDATA2_CGMII_IBUF_BASE_OFF 0x8000
+#define SZEDATA2_IBUF_BASE_OFF 0x8000
 /*
- * Size of CGMII IBUF.
+ * Size of IBUF.
  */
-#define SZEDATA2_CGMII_IBUF_SIZE 0x200
+#define SZEDATA2_IBUF_SIZE 0x200
 
 /*
- * GCMII OBUF offset from the beginning of PCI resource address space.
+ * OBUF offset from the beginning of PCI resource address space.
  */
-#define SZEDATA2_CGMII_OBUF_BASE_OFF 0x9000
+#define SZEDATA2_OBUF_BASE_OFF 0x9000
 /*
- * Size of CGMII OBUF.
+ * Size of OBUF.
  */
-#define SZEDATA2_CGMII_OBUF_SIZE 0x100
+#define SZEDATA2_OBUF_SIZE 0x100
 
 #else
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
-- 
1.7.1

[PATCH 2/5] net/szedata2: refactor ibuf and obuf read and write

[Matej Vido]

Remove unused read and write functions.
Use rte_read*, rte_write* functions to access ibuf and obuf
address space.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/rte_eth_szedata2.c |    4 +-
 drivers/net/szedata2/rte_eth_szedata2.h |  184 +++++++++++--------------------
 2 files changed, 64 insertions(+), 124 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index 5be08da..f8ec331 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -1149,9 +1149,9 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+	const volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
 			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
+			const volatile struct szedata2_ibuf *);
 
 	switch (get_link_speed(ibuf)) {
 	case SZEDATA2_LINK_SPEED_10G:
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 4f56fcf..0b635d0 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -37,6 +37,7 @@
 #include <stdbool.h>
 
 #include <rte_byteorder.h>
+#include <rte_io.h>
 
 /* PCI Vendor ID */
 #define PCI_VENDOR_ID_NETCOPE 0x1b26
@@ -113,82 +114,16 @@ struct szedata {
 	int                         numa_node;
 };
 
-/*
- * @return Byte from PCI resource at offset "offset".
- */
-static inline uint8_t
-pci_resource_read8(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return *((uint8_t *)((uint8_t *)rsc->addr + offset));
-}
-
-/*
- * @return Two bytes from PCI resource starting at offset "offset".
- */
-static inline uint16_t
-pci_resource_read16(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * @return Four bytes from PCI resource starting at offset "offset".
- */
 static inline uint32_t
-pci_resource_read32(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * @return Eight bytes from PCI resource starting at offset "offset".
- */
-static inline uint64_t
-pci_resource_read64(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * Write one byte to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write8(struct rte_mem_resource *rsc, uint32_t offset, uint8_t val)
+szedata2_read32(const volatile void *addr)
 {
-	*((uint8_t *)((uint8_t *)rsc->addr + offset)) = val;
+	return rte_le_to_cpu_32(rte_read32(addr));
 }
 
-/*
- * Write two bytes to PCI resource address space at offset "offset".
- */
 static inline void
-pci_resource_write16(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint16_t val)
+szedata2_write32(uint32_t value, volatile void *addr)
 {
-	*((uint16_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_16(val);
-}
-
-/*
- * Write four bytes to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write32(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint32_t val)
-{
-	*((uint32_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_32(val);
-}
-
-/*
- * Write eight bytes to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write64(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint64_t val)
-{
-	*((uint64_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_64(val);
+	rte_write32(rte_cpu_to_le_32(value), addr);
 }
 
 #define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
@@ -209,57 +144,64 @@ enum szedata2_mac_check_mode {
 };
 
 /*
+ * Maximum possible number of MAC addresses (limited by IBUF status
+ * register value MAC_COUNT which has 5 bits).
+ */
+#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
+
+/*
  * Structure describes IBUF address space
  */
 struct szedata2_ibuf {
 	/** Total Received Frames Counter low part */
-	uint32_t trfcl;
+	uint32_t trfcl; /**< 0x00 */
 	/** Correct Frames Counter low part */
-	uint32_t cfcl;
+	uint32_t cfcl; /**< 0x04 */
 	/** Discarded Frames Counter low part */
-	uint32_t dfcl;
+	uint32_t dfcl; /**< 0x08 */
 	/** Counter of frames discarded due to buffer overflow low part */
-	uint32_t bodfcl;
+	uint32_t bodfcl; /**< 0x0C */
 	/** Total Received Frames Counter high part */
-	uint32_t trfch;
+	uint32_t trfch; /**< 0x10 */
 	/** Correct Frames Counter high part */
-	uint32_t cfch;
+	uint32_t cfch; /**< 0x14 */
 	/** Discarded Frames Counter high part */
-	uint32_t dfch;
+	uint32_t dfch; /**< 0x18 */
 	/** Counter of frames discarded due to buffer overflow high part */
-	uint32_t bodfch;
+	uint32_t bodfch; /**< 0x1C */
 	/** IBUF enable register */
-	uint32_t ibuf_en;
+	uint32_t ibuf_en; /**< 0x20 */
 	/** Error mask register */
-	uint32_t err_mask;
+	uint32_t err_mask; /**< 0x24 */
 	/** IBUF status register */
-	uint32_t ibuf_st;
+	uint32_t ibuf_st; /**< 0x28 */
 	/** IBUF command register */
-	uint32_t ibuf_cmd;
+	uint32_t ibuf_cmd; /**< 0x2C */
 	/** Minimum frame length allowed */
-	uint32_t mfla;
+	uint32_t mfla; /**< 0x30 */
 	/** Frame MTU */
-	uint32_t mtu;
+	uint32_t mtu; /**< 0x34 */
 	/** MAC address check mode */
-	uint32_t mac_chmode;
+	uint32_t mac_chmode; /**< 0x38 */
 	/** Octets Received OK Counter low part */
-	uint32_t orocl;
+	uint32_t orocl; /**< 0x3C */
 	/** Octets Received OK Counter high part */
-	uint32_t oroch;
+	uint32_t oroch; /**< 0x40 */
+	/** reserved */
+	uint8_t reserved[60]; /**< 0x4C */
+	/** IBUF memory for MAC addresses */
+	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
 } __rte_packed;
 
-/* Offset of IBUF memory for MAC addresses */
-#define SZEDATA2_IBUF_MAC_MEM_OFF 0x80
-
 /*
  * @return
  *     true if IBUF is enabled
  *     false if IBUF is disabled
  */
 static inline bool
-ibuf_is_enabled(volatile struct szedata2_ibuf *ibuf)
+ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
 {
-	return ((rte_le_to_cpu_32(ibuf->ibuf_en) & 0x1) != 0) ? true : false;
+	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
 }
 
 /*
@@ -268,8 +210,7 @@ struct szedata2_ibuf {
 static inline void
 ibuf_enable(volatile struct szedata2_ibuf *ibuf)
 {
-	ibuf->ibuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) | 0x1);
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
 }
 
 /*
@@ -278,8 +219,8 @@ struct szedata2_ibuf {
 static inline void
 ibuf_disable(volatile struct szedata2_ibuf *ibuf)
 {
-	ibuf->ibuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) & ~0x1);
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
+			&ibuf->ibuf_en);
 }
 
 /*
@@ -288,9 +229,9 @@ struct szedata2_ibuf {
  *     false if ibuf link is down
  */
 static inline bool
-ibuf_is_link_up(volatile struct szedata2_ibuf *ibuf)
+ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
 {
-	return ((rte_le_to_cpu_32(ibuf->ibuf_st) & 0x80) != 0) ? true : false;
+	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
 }
 
 /*
@@ -298,9 +239,9 @@ struct szedata2_ibuf {
  *     MAC address check mode
  */
 static inline enum szedata2_mac_check_mode
-ibuf_mac_mode_read(volatile struct szedata2_ibuf *ibuf)
+ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
 {
-	switch (rte_le_to_cpu_32(ibuf->mac_chmode) & 0x3) {
+	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
 	case 0x0:
 		return SZEDATA2_MAC_CHMODE_PROMISC;
 	case 0x1:
@@ -321,8 +262,8 @@ struct szedata2_ibuf {
 ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
 		enum szedata2_mac_check_mode mode)
 {
-	ibuf->mac_chmode = rte_cpu_to_le_32(
-			(rte_le_to_cpu_32(ibuf->mac_chmode) & ~0x3) | mode);
+	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
+			&ibuf->mac_chmode);
 }
 
 /*
@@ -330,29 +271,29 @@ struct szedata2_ibuf {
  */
 struct szedata2_obuf {
 	/** Total Sent Frames Counter low part */
-	uint32_t tsfcl;
+	uint32_t tsfcl; /**< 0x00 */
 	/** Octets Sent Counter low part */
-	uint32_t oscl;
+	uint32_t oscl; /**< 0x04 */
 	/** Total Discarded Frames Counter low part */
-	uint32_t tdfcl;
+	uint32_t tdfcl; /**< 0x08 */
 	/** reserved */
-	uint32_t reserved1;
+	uint32_t reserved1; /**< 0x0C */
 	/** Total Sent Frames Counter high part */
-	uint32_t tsfch;
+	uint32_t tsfch; /**< 0x10 */
 	/** Octets Sent Counter high part */
-	uint32_t osch;
+	uint32_t osch; /**< 0x14 */
 	/** Total Discarded Frames Counter high part */
-	uint32_t tdfch;
+	uint32_t tdfch; /**< 0x18 */
 	/** reserved */
-	uint32_t reserved2;
+	uint32_t reserved2; /**< 0x1C */
 	/** OBUF enable register */
-	uint32_t obuf_en;
+	uint32_t obuf_en; /**< 0x20 */
 	/** reserved */
-	uint64_t reserved3;
+	uint64_t reserved3; /**< 0x24 */
 	/** OBUF control register */
-	uint32_t ctrl;
+	uint32_t ctrl; /**< 0x2C */
 	/** OBUF status register */
-	uint32_t obuf_st;
+	uint32_t obuf_st; /**< 0x30 */
 } __rte_packed;
 
 /*
@@ -361,9 +302,9 @@ struct szedata2_obuf {
  *     false if OBUF is disabled
  */
 static inline bool
-obuf_is_enabled(volatile struct szedata2_obuf *obuf)
+obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
 {
-	return ((rte_le_to_cpu_32(obuf->obuf_en) & 0x1) != 0) ? true : false;
+	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
 }
 
 /*
@@ -372,8 +313,7 @@ struct szedata2_obuf {
 static inline void
 obuf_enable(volatile struct szedata2_obuf *obuf)
 {
-	obuf->obuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) | 0x1);
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
 }
 
 /*
@@ -382,8 +322,8 @@ struct szedata2_obuf {
 static inline void
 obuf_disable(volatile struct szedata2_obuf *obuf)
 {
-	obuf->obuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) & ~0x1);
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
+			&obuf->obuf_en);
 }
 
 /*
@@ -393,9 +333,9 @@ struct szedata2_obuf {
  * @return Link speed constant.
  */
 static inline enum szedata2_link_speed
-get_link_speed(volatile struct szedata2_ibuf *ibuf)
+get_link_speed(const volatile struct szedata2_ibuf *ibuf)
 {
-	uint32_t speed = (rte_le_to_cpu_32(ibuf->ibuf_st) & 0x70) >> 4;
+	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
 	switch (speed) {
 	case 0x03:
 		return SZEDATA2_LINK_SPEED_10G;
-- 
1.7.1

[PATCH 3/5] net/szedata2: refactor ibuf and obuf address definition

[Matej Vido]

This is to prepare for firmwares with multiple ibufs and obufs.
Offsets of ibufs and obufs are defined in array.
Functions which operate on ibufs and obufs iterate over this array.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/Makefile           |    1 +
 drivers/net/szedata2/rte_eth_szedata2.c |  121 +++++++++++++++++++++----------
 drivers/net/szedata2/rte_eth_szedata2.h |   64 ----------------
 drivers/net/szedata2/szedata2_iobuf.c   |   69 ++++++++++++++++++
 drivers/net/szedata2/szedata2_iobuf.h   |   95 ++++++++++++++++++++++++
 5 files changed, 246 insertions(+), 104 deletions(-)
 create mode 100644 drivers/net/szedata2/szedata2_iobuf.c
 create mode 100644 drivers/net/szedata2/szedata2_iobuf.h

diff --git a/drivers/net/szedata2/Makefile b/drivers/net/szedata2/Makefile
index 836c3b2..0e96b92 100644
--- a/drivers/net/szedata2/Makefile
+++ b/drivers/net/szedata2/Makefile
@@ -48,6 +48,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += rte_eth_szedata2.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += szedata2_iobuf.c
 
 #
 # Export include files
diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index f8ec331..49495fd 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -53,6 +53,7 @@
 #include <rte_atomic.h>
 
 #include "rte_eth_szedata2.h"
+#include "szedata2_iobuf.h"
 
 #define RTE_ETH_SZEDATA2_MAX_RX_QUEUES 32
 #define RTE_ETH_SZEDATA2_MAX_TX_QUEUES 32
@@ -1140,6 +1141,33 @@ struct pmd_internals {
 	dev->data->nb_tx_queues = 0;
 }
 
+/**
+ * Function takes value from first IBUF status register.
+ * Values in IBUF and OBUF should be same.
+ *
+ * @param internals
+ *     Pointer to device private structure.
+ * @return
+ *     Link speed constant.
+ */
+static inline enum szedata2_link_speed
+get_link_speed(const struct pmd_internals *internals)
+{
+	const volatile struct szedata2_ibuf *ibuf =
+		ibuf_ptr_by_index(internals->pci_rsc, 0);
+	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
+	switch (speed) {
+	case 0x03:
+		return SZEDATA2_LINK_SPEED_10G;
+	case 0x04:
+		return SZEDATA2_LINK_SPEED_40G;
+	case 0x05:
+		return SZEDATA2_LINK_SPEED_100G;
+	default:
+		return SZEDATA2_LINK_SPEED_DEFAULT;
+	}
+}
+
 static int
 eth_link_update(struct rte_eth_dev *dev,
 		int wait_to_complete __rte_unused)
@@ -1149,11 +1177,11 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	const volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			const volatile struct szedata2_ibuf *);
+	const volatile struct szedata2_ibuf *ibuf;
+	uint32_t i;
+	bool link_is_up = false;
 
-	switch (get_link_speed(ibuf)) {
+	switch (get_link_speed(internals)) {
 	case SZEDATA2_LINK_SPEED_10G:
 		link.link_speed = ETH_SPEED_NUM_10G;
 		break;
@@ -1171,8 +1199,19 @@ struct pmd_internals {
 	/* szedata2 uses only full duplex */
 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
 
-	link.link_status = (ibuf_is_enabled(ibuf) &&
-			ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf = ibuf_ptr_by_index(internals->pci_rsc, i);
+		/*
+		 * Link is considered up if at least one ibuf is enabled
+		 * and up.
+		 */
+		if (ibuf_is_enabled(ibuf) && ibuf_is_link_up(ibuf)) {
+			link_is_up = true;
+			break;
+		}
+	}
+
+	link.link_status = (link_is_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 
 	link.link_autoneg = ETH_LINK_SPEED_FIXED;
 
@@ -1187,15 +1226,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
-			volatile struct szedata2_obuf *);
-
-	ibuf_enable(ibuf);
-	obuf_enable(obuf);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++)
+		ibuf_enable(ibuf_ptr_by_index(internals->pci_rsc, i));
+	for (i = 0; i < szedata2_obuf_count; i++)
+		obuf_enable(obuf_ptr_by_index(internals->pci_rsc, i));
 	return 0;
 }
 
@@ -1204,15 +1240,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
-			volatile struct szedata2_obuf *);
-
-	ibuf_disable(ibuf);
-	obuf_disable(obuf);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++)
+		ibuf_disable(ibuf_ptr_by_index(internals->pci_rsc, i));
+	for (i = 0; i < szedata2_obuf_count; i++)
+		obuf_disable(obuf_ptr_by_index(internals->pci_rsc, i));
 	return 0;
 }
 
@@ -1292,10 +1325,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_PROMISC);
+	}
 }
 
 static void
@@ -1303,10 +1338,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	}
 }
 
 static void
@@ -1314,10 +1351,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	}
 }
 
 static void
@@ -1325,10 +1364,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	}
 }
 
 static const struct eth_dev_ops ops = {
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 0b635d0..6b31a77 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -126,9 +126,6 @@ struct szedata {
 	rte_write32(rte_cpu_to_le_32(value), addr);
 }
 
-#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
-	((type)(((uint8_t *)(rsc)->addr) + (offset)))
-
 enum szedata2_link_speed {
 	SZEDATA2_LINK_SPEED_DEFAULT = 0,
 	SZEDATA2_LINK_SPEED_10G,
@@ -326,65 +323,4 @@ struct szedata2_obuf {
 			&obuf->obuf_en);
 }
 
-/*
- * Function takes value from IBUF status register. Values in IBUF and OBUF
- * should be same.
- *
- * @return Link speed constant.
- */
-static inline enum szedata2_link_speed
-get_link_speed(const volatile struct szedata2_ibuf *ibuf)
-{
-	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
-	switch (speed) {
-	case 0x03:
-		return SZEDATA2_LINK_SPEED_10G;
-	case 0x04:
-		return SZEDATA2_LINK_SPEED_40G;
-	case 0x05:
-		return SZEDATA2_LINK_SPEED_100G;
-	default:
-		return SZEDATA2_LINK_SPEED_DEFAULT;
-	}
-}
-
-/*
- * IBUFs and OBUFs can generally be located at different offsets in different
- * firmwares.
- * This part defines base offsets of IBUFs and OBUFs through various firmwares.
- * Currently one firmware type is supported.
- * Type of firmware is set through configuration option
- * CONFIG_RTE_LIBRTE_PMD_SZEDATA_AS.
- * Possible values are:
- * 0 - for firmwares:
- *     NIC_100G1_LR4
- *     HANIC_100G1_LR4
- *     HANIC_100G1_SR10
- */
-#if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
-
-/*
- * IBUF offset from the beginning of PCI resource address space.
- */
-#define SZEDATA2_IBUF_BASE_OFF 0x8000
-/*
- * Size of IBUF.
- */
-#define SZEDATA2_IBUF_SIZE 0x200
-
-/*
- * OBUF offset from the beginning of PCI resource address space.
- */
-#define SZEDATA2_OBUF_BASE_OFF 0x9000
-/*
- * Size of OBUF.
- */
-#define SZEDATA2_OBUF_SIZE 0x100
-
-#else
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
-#endif
-
 #endif
diff --git a/drivers/net/szedata2/szedata2_iobuf.c b/drivers/net/szedata2/szedata2_iobuf.c
new file mode 100644
index 0000000..2d25e65
--- /dev/null
+++ b/drivers/net/szedata2/szedata2_iobuf.c
@@ -0,0 +1,69 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2017 CESNET
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of CESNET nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+
+#include <rte_common.h>
+
+#include "szedata2_iobuf.h"
+
+/*
+ * IBUFs and OBUFs can generally be located at different offsets in different
+ * firmwares.
+ * This part defines base offsets of IBUFs and OBUFs through various firmwares.
+ * Currently one firmware type is supported.
+ * Type of firmware is set through configuration option
+ * CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS.
+ * Possible values are:
+ * 0 - for firmwares:
+ *     NIC_100G1_LR4
+ *     HANIC_100G1_LR4
+ *     HANIC_100G1_SR10
+ */
+#if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
+#error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000
+};
+
+#else
+#error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
+#endif
+
+const uint32_t szedata2_ibuf_count = RTE_DIM(szedata2_ibuf_base_table);
+const uint32_t szedata2_obuf_count = RTE_DIM(szedata2_obuf_base_table);
diff --git a/drivers/net/szedata2/szedata2_iobuf.h b/drivers/net/szedata2/szedata2_iobuf.h
new file mode 100644
index 0000000..3ae4367
--- /dev/null
+++ b/drivers/net/szedata2/szedata2_iobuf.h
@@ -0,0 +1,95 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2017 CESNET
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of CESNET nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SZEDATA2_IOBUF_H_
+#define _SZEDATA2_IOBUF_H_
+
+#include <stdint.h>
+
+#include <rte_dev.h>
+
+/* IBUF offsets from the beginning of the PCI resource address space. */
+extern const uint32_t szedata2_ibuf_base_table[];
+extern const uint32_t szedata2_ibuf_count;
+
+/* OBUF offsets from the beginning of the PCI resource address space. */
+extern const uint32_t szedata2_obuf_base_table[];
+extern const uint32_t szedata2_obuf_count;
+
+/**
+ * Macro takes pointer to pci resource structure (rsc)
+ * and returns pointer to mapped resource memory at
+ * specified offset (offset) typecast to the type (type).
+ */
+#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
+	((type)(((uint8_t *)(rsc)->addr) + (offset)))
+
+/**
+ * Get pointer to IBUF structure according to specified index.
+ *
+ * @param rsc
+ *     Pointer to base address of memory resource.
+ * @param index
+ *     Index of IBUF.
+ * @return
+ *     Pointer to IBUF structure.
+ */
+static inline struct szedata2_ibuf *
+ibuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
+{
+	if (index >= szedata2_ibuf_count)
+		index = szedata2_ibuf_count - 1;
+	return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_ibuf_base_table[index],
+		struct szedata2_ibuf *);
+}
+
+/**
+ * Get pointer to OBUF structure according to specified idnex.
+ *
+ * @param rsc
+ *     Pointer to base address of memory resource.
+ * @param index
+ *     Index of OBUF.
+ * @return
+ *     Pointer to OBUF structure.
+ */
+static inline struct szedata2_obuf *
+obuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
+{
+	if (index >= szedata2_obuf_count)
+		index = szedata2_obuf_count - 1;
+	return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_obuf_base_table[index],
+		struct szedata2_obuf *);
+}
+
+#endif /* _SZEDATA2_IOBUF_H_ */
-- 
1.7.1

[PATCH 4/5] net/szedata2: move ibuf and obuf to specific header

[Matej Vido]

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/rte_eth_szedata2.h |  216 +-------------------------
 drivers/net/szedata2/szedata2_iobuf.h   |  261 +++++++++++++++++++++++++++++++
 2 files changed, 264 insertions(+), 213 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 6b31a77..2571d54 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -34,10 +34,9 @@
 #ifndef RTE_PMD_SZEDATA2_H_
 #define RTE_PMD_SZEDATA2_H_
 
-#include <stdbool.h>
+#include <stdint.h>
 
-#include <rte_byteorder.h>
-#include <rte_io.h>
+#include <libsze2.h>
 
 /* PCI Vendor ID */
 #define PCI_VENDOR_ID_NETCOPE 0x1b26
@@ -114,213 +113,4 @@ struct szedata {
 	int                         numa_node;
 };
 
-static inline uint32_t
-szedata2_read32(const volatile void *addr)
-{
-	return rte_le_to_cpu_32(rte_read32(addr));
-}
-
-static inline void
-szedata2_write32(uint32_t value, volatile void *addr)
-{
-	rte_write32(rte_cpu_to_le_32(value), addr);
-}
-
-enum szedata2_link_speed {
-	SZEDATA2_LINK_SPEED_DEFAULT = 0,
-	SZEDATA2_LINK_SPEED_10G,
-	SZEDATA2_LINK_SPEED_40G,
-	SZEDATA2_LINK_SPEED_100G,
-};
-
-enum szedata2_mac_check_mode {
-	SZEDATA2_MAC_CHMODE_PROMISC       = 0x0,
-	SZEDATA2_MAC_CHMODE_ONLY_VALID    = 0x1,
-	SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
-	SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
-};
-
-/*
- * Maximum possible number of MAC addresses (limited by IBUF status
- * register value MAC_COUNT which has 5 bits).
- */
-#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
-
-/*
- * Structure describes IBUF address space
- */
-struct szedata2_ibuf {
-	/** Total Received Frames Counter low part */
-	uint32_t trfcl; /**< 0x00 */
-	/** Correct Frames Counter low part */
-	uint32_t cfcl; /**< 0x04 */
-	/** Discarded Frames Counter low part */
-	uint32_t dfcl; /**< 0x08 */
-	/** Counter of frames discarded due to buffer overflow low part */
-	uint32_t bodfcl; /**< 0x0C */
-	/** Total Received Frames Counter high part */
-	uint32_t trfch; /**< 0x10 */
-	/** Correct Frames Counter high part */
-	uint32_t cfch; /**< 0x14 */
-	/** Discarded Frames Counter high part */
-	uint32_t dfch; /**< 0x18 */
-	/** Counter of frames discarded due to buffer overflow high part */
-	uint32_t bodfch; /**< 0x1C */
-	/** IBUF enable register */
-	uint32_t ibuf_en; /**< 0x20 */
-	/** Error mask register */
-	uint32_t err_mask; /**< 0x24 */
-	/** IBUF status register */
-	uint32_t ibuf_st; /**< 0x28 */
-	/** IBUF command register */
-	uint32_t ibuf_cmd; /**< 0x2C */
-	/** Minimum frame length allowed */
-	uint32_t mfla; /**< 0x30 */
-	/** Frame MTU */
-	uint32_t mtu; /**< 0x34 */
-	/** MAC address check mode */
-	uint32_t mac_chmode; /**< 0x38 */
-	/** Octets Received OK Counter low part */
-	uint32_t orocl; /**< 0x3C */
-	/** Octets Received OK Counter high part */
-	uint32_t oroch; /**< 0x40 */
-	/** reserved */
-	uint8_t reserved[60]; /**< 0x4C */
-	/** IBUF memory for MAC addresses */
-	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
-} __rte_packed;
-
-/*
- * @return
- *     true if IBUF is enabled
- *     false if IBUF is disabled
- */
-static inline bool
-ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
-{
-	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
-}
-
-/*
- * Enables IBUF.
- */
-static inline void
-ibuf_enable(volatile struct szedata2_ibuf *ibuf)
-{
-	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
-}
-
-/*
- * Disables IBUF.
- */
-static inline void
-ibuf_disable(volatile struct szedata2_ibuf *ibuf)
-{
-	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
-			&ibuf->ibuf_en);
-}
-
-/*
- * @return
- *     true if ibuf link is up
- *     false if ibuf link is down
- */
-static inline bool
-ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
-{
-	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
-}
-
-/*
- * @return
- *     MAC address check mode
- */
-static inline enum szedata2_mac_check_mode
-ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
-{
-	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
-	case 0x0:
-		return SZEDATA2_MAC_CHMODE_PROMISC;
-	case 0x1:
-		return SZEDATA2_MAC_CHMODE_ONLY_VALID;
-	case 0x2:
-		return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
-	case 0x3:
-		return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
-	default:
-		return SZEDATA2_MAC_CHMODE_PROMISC;
-	}
-}
-
-/*
- * Writes "mode" in MAC address check mode register.
- */
-static inline void
-ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
-		enum szedata2_mac_check_mode mode)
-{
-	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
-			&ibuf->mac_chmode);
-}
-
-/*
- * Structure describes OBUF address space
- */
-struct szedata2_obuf {
-	/** Total Sent Frames Counter low part */
-	uint32_t tsfcl; /**< 0x00 */
-	/** Octets Sent Counter low part */
-	uint32_t oscl; /**< 0x04 */
-	/** Total Discarded Frames Counter low part */
-	uint32_t tdfcl; /**< 0x08 */
-	/** reserved */
-	uint32_t reserved1; /**< 0x0C */
-	/** Total Sent Frames Counter high part */
-	uint32_t tsfch; /**< 0x10 */
-	/** Octets Sent Counter high part */
-	uint32_t osch; /**< 0x14 */
-	/** Total Discarded Frames Counter high part */
-	uint32_t tdfch; /**< 0x18 */
-	/** reserved */
-	uint32_t reserved2; /**< 0x1C */
-	/** OBUF enable register */
-	uint32_t obuf_en; /**< 0x20 */
-	/** reserved */
-	uint64_t reserved3; /**< 0x24 */
-	/** OBUF control register */
-	uint32_t ctrl; /**< 0x2C */
-	/** OBUF status register */
-	uint32_t obuf_st; /**< 0x30 */
-} __rte_packed;
-
-/*
- * @return
- *     true if OBUF is enabled
- *     false if OBUF is disabled
- */
-static inline bool
-obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
-{
-	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
-}
-
-/*
- * Enables OBUF.
- */
-static inline void
-obuf_enable(volatile struct szedata2_obuf *obuf)
-{
-	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
-}
-
-/*
- * Disables OBUF.
- */
-static inline void
-obuf_disable(volatile struct szedata2_obuf *obuf)
-{
-	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
-			&obuf->obuf_en);
-}
-
-#endif
+#endif /* RTE_PMD_SZEDATA2_H_ */
diff --git a/drivers/net/szedata2/szedata2_iobuf.h b/drivers/net/szedata2/szedata2_iobuf.h
index 3ae4367..f1ccb3b 100644
--- a/drivers/net/szedata2/szedata2_iobuf.h
+++ b/drivers/net/szedata2/szedata2_iobuf.h
@@ -35,7 +35,10 @@
 #define _SZEDATA2_IOBUF_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 
+#include <rte_byteorder.h>
+#include <rte_io.h>
 #include <rte_dev.h>
 
 /* IBUF offsets from the beginning of the PCI resource address space. */
@@ -46,6 +49,20 @@
 extern const uint32_t szedata2_obuf_base_table[];
 extern const uint32_t szedata2_obuf_count;
 
+enum szedata2_link_speed {
+	SZEDATA2_LINK_SPEED_DEFAULT = 0,
+	SZEDATA2_LINK_SPEED_10G,
+	SZEDATA2_LINK_SPEED_40G,
+	SZEDATA2_LINK_SPEED_100G,
+};
+
+enum szedata2_mac_check_mode {
+	SZEDATA2_MAC_CHMODE_PROMISC       = 0x0,
+	SZEDATA2_MAC_CHMODE_ONLY_VALID    = 0x1,
+	SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
+	SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
+};
+
 /**
  * Macro takes pointer to pci resource structure (rsc)
  * and returns pointer to mapped resource memory at
@@ -55,6 +72,114 @@
 	((type)(((uint8_t *)(rsc)->addr) + (offset)))
 
 /**
+ * Maximum possible number of MAC addresses (limited by IBUF status
+ * register value MAC_COUNT which has 5 bits).
+ */
+#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
+
+/**
+ * Structure describes IBUF address space.
+ */
+struct szedata2_ibuf {
+	/** Total Received Frames Counter low part */
+	uint32_t trfcl; /**< 0x00 */
+	/** Correct Frames Counter low part */
+	uint32_t cfcl; /**< 0x04 */
+	/** Discarded Frames Counter low part */
+	uint32_t dfcl; /**< 0x08 */
+	/** Counter of frames discarded due to buffer overflow low part */
+	uint32_t bodfcl; /**< 0x0C */
+	/** Total Received Frames Counter high part */
+	uint32_t trfch; /**< 0x10 */
+	/** Correct Frames Counter high part */
+	uint32_t cfch; /**< 0x14 */
+	/** Discarded Frames Counter high part */
+	uint32_t dfch; /**< 0x18 */
+	/** Counter of frames discarded due to buffer overflow high part */
+	uint32_t bodfch; /**< 0x1C */
+	/** IBUF enable register */
+	uint32_t ibuf_en; /**< 0x20 */
+	/** Error mask register */
+	uint32_t err_mask; /**< 0x24 */
+	/** IBUF status register */
+	uint32_t ibuf_st; /**< 0x28 */
+	/** IBUF command register */
+	uint32_t ibuf_cmd; /**< 0x2C */
+	/** Minimum frame length allowed */
+	uint32_t mfla; /**< 0x30 */
+	/** Frame MTU */
+	uint32_t mtu; /**< 0x34 */
+	/** MAC address check mode */
+	uint32_t mac_chmode; /**< 0x38 */
+	/** Octets Received OK Counter low part */
+	uint32_t orocl; /**< 0x3C */
+	/** Octets Received OK Counter high part */
+	uint32_t oroch; /**< 0x40 */
+	/** reserved */
+	uint8_t reserved[60]; /**< 0x4C */
+	/** IBUF memory for MAC addresses */
+	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
+} __rte_packed;
+
+/**
+ * Structure describes OBUF address space.
+ */
+struct szedata2_obuf {
+	/** Total Sent Frames Counter low part */
+	uint32_t tsfcl; /**< 0x00 */
+	/** Octets Sent Counter low part */
+	uint32_t oscl; /**< 0x04 */
+	/** Total Discarded Frames Counter low part */
+	uint32_t tdfcl; /**< 0x08 */
+	/** reserved */
+	uint32_t reserved1; /**< 0x0C */
+	/** Total Sent Frames Counter high part */
+	uint32_t tsfch; /**< 0x10 */
+	/** Octets Sent Counter high part */
+	uint32_t osch; /**< 0x14 */
+	/** Total Discarded Frames Counter high part */
+	uint32_t tdfch; /**< 0x18 */
+	/** reserved */
+	uint32_t reserved2; /**< 0x1C */
+	/** OBUF enable register */
+	uint32_t obuf_en; /**< 0x20 */
+	/** reserved */
+	uint64_t reserved3; /**< 0x24 */
+	/** OBUF control register */
+	uint32_t ctrl; /**< 0x2C */
+	/** OBUF status register */
+	uint32_t obuf_st; /**< 0x30 */
+} __rte_packed;
+
+/**
+ * Wrapper for reading 4 bytes from device memory in correct endianness.
+ *
+ * @param addr
+ *     Address for reading.
+ * @return
+ *     4 B value.
+ */
+static inline uint32_t
+szedata2_read32(const volatile void *addr)
+{
+	return rte_le_to_cpu_32(rte_read32(addr));
+}
+
+/**
+ * Wrapper for writing 4 bytes to device memory in correct endianness.
+ *
+ * @param value
+ *     Value to write.
+ * @param addr
+ *     Address for writing.
+ */
+static inline void
+szedata2_write32(uint32_t value, volatile void *addr)
+{
+	rte_write32(rte_cpu_to_le_32(value), addr);
+}
+
+/**
  * Get pointer to IBUF structure according to specified index.
  *
  * @param rsc
@@ -92,4 +217,140 @@
 		struct szedata2_obuf *);
 }
 
+/**
+ * Checks if IBUF is enabled.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     true if IBUF is enabled.
+ *     false if IBUF is disabled.
+ */
+static inline bool
+ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
+{
+	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
+}
+
+/**
+ * Enables IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ */
+static inline void
+ibuf_enable(volatile struct szedata2_ibuf *ibuf)
+{
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
+}
+
+/**
+ * Disables IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ */
+static inline void
+ibuf_disable(volatile struct szedata2_ibuf *ibuf)
+{
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
+			&ibuf->ibuf_en);
+}
+
+/**
+ * Checks if link is up.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     true if ibuf link is up.
+ *     false if ibuf link is down.
+ */
+static inline bool
+ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
+{
+	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
+}
+
+/**
+ * Get current MAC address check mode from IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     MAC address check mode constant.
+ */
+static inline enum szedata2_mac_check_mode
+ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
+{
+	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
+	case 0x0:
+		return SZEDATA2_MAC_CHMODE_PROMISC;
+	case 0x1:
+		return SZEDATA2_MAC_CHMODE_ONLY_VALID;
+	case 0x2:
+		return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
+	case 0x3:
+		return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
+	default:
+		return SZEDATA2_MAC_CHMODE_PROMISC;
+	}
+}
+
+/**
+ * Writes mode in MAC address check mode register in IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @param mode
+ *     MAC address check mode to set.
+ */
+static inline void
+ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
+		enum szedata2_mac_check_mode mode)
+{
+	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
+			&ibuf->mac_chmode);
+}
+
+/**
+ * Checks if obuf is enabled.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ * @return
+ *     true if OBUF is enabled.
+ *     false if OBUF is disabled.
+ */
+static inline bool
+obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
+{
+	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
+}
+
+/**
+ * Enables OBUF.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ */
+static inline void
+obuf_enable(volatile struct szedata2_obuf *obuf)
+{
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
+}
+
+/**
+ * Disables OBUF.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ */
+static inline void
+obuf_disable(volatile struct szedata2_obuf *obuf)
+{
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
+			&obuf->obuf_en);
+}
+
 #endif /* _SZEDATA2_IOBUF_H_ */
-- 
1.7.1

[PATCH 5/5] net/szedata2: add more supported firmwares

[Matej Vido]

Add IBUF and OBUF offsets definitions for new firmwares.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 config/common_base                    |    8 +--
 doc/guides/nics/szedata2.rst          |   32 ++++++--
 drivers/net/szedata2/szedata2_iobuf.c |  148 +++++++++++++++++++++++++++++++--
 3 files changed, 168 insertions(+), 20 deletions(-)

diff --git a/config/common_base b/config/common_base
index 67ef2ec..25df77a 100644
--- a/config/common_base
+++ b/config/common_base
@@ -279,12 +279,8 @@ CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
 CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
 #
 # Defines firmware type address space.
-# RTE_LIBRTE_PMD_SZEDATA2_AS can be:
-# 0 - for firmwares:
-#         NIC_100G1_LR4
-#         HANIC_100G1_LR4
-#         HANIC_100G1_SR10
-# Other values raise compile time error
+# See documentation for supported values.
+# Other values raise compile time error.
 CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
 
 #
diff --git a/doc/guides/nics/szedata2.rst b/doc/guides/nics/szedata2.rst
index 60080a9..cb4d965 100644
--- a/doc/guides/nics/szedata2.rst
+++ b/doc/guides/nics/szedata2.rst
@@ -91,14 +91,34 @@ These configuration options can be modified before compilation in the
 
 *  ``CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS`` default value: **0**
 
-   This option defines type of firmware address space.
-   Currently supported value is:
+   This option defines type of firmware address space and must be set
+   according to the used card and mode.
+   Currently supported values are:
 
-   * **0** for firmwares:
+   * **0** - for cards (modes):
 
-      * NIC_100G1_LR4
-      * HANIC_100G1_LR4
-      * HANIC_100G1_SR10
+      * NFB-100G1 (100G1)
+
+   * **1** - for cards (modes):
+
+      * NFB-100G2Q (100G1)
+
+   * **2** - for cards (modes):
+
+      * NFB-40G2 (40G2)
+      * NFB-100G2C (100G2)
+      * NFB-100G2Q (40G2)
+      * NFB-200G2QL (100G2, 40G2)
+
+   * **3** - for cards (modes):
+
+      * NFB-40G2 (10G8)
+      * NFB-100G2Q (10G8)
+      * NFB-200G2QL (10G8)
+
+   * **4** - for cards (modes):
+
+      * NFB-100G1 (10G10)
 
 Using the SZEDATA2 PMD
 ----------------------
diff --git a/drivers/net/szedata2/szedata2_iobuf.c b/drivers/net/szedata2/szedata2_iobuf.c
index 2d25e65..821fe78 100644
--- a/drivers/net/szedata2/szedata2_iobuf.c
+++ b/drivers/net/szedata2/szedata2_iobuf.c
@@ -39,21 +39,41 @@
 
 /*
  * IBUFs and OBUFs can generally be located at different offsets in different
- * firmwares.
- * This part defines base offsets of IBUFs and OBUFs through various firmwares.
- * Currently one firmware type is supported.
- * Type of firmware is set through configuration option
+ * firmwares (modes).
+ * This part defines base offsets of IBUFs and OBUFs for various cards
+ * and firmwares (modes).
+ * Type of firmware (mode) is set through configuration option
  * CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS.
  * Possible values are:
- * 0 - for firmwares:
- *     NIC_100G1_LR4
- *     HANIC_100G1_LR4
- *     HANIC_100G1_SR10
+ * 0 - for cards (modes):
+ *     NFB-100G1 (100G1)
+ *
+ * 1 - for cards (modes):
+ *     NFB-100G2Q (100G1)
+ *
+ * 2 - for cards (modes):
+ *     NFB-40G2 (40G2)
+ *     NFB-100G2C (100G2)
+ *     NFB-100G2Q (40G2)
+ *     NFB-200G2QL (100G2, 40G2)
+ *
+ * 3 - for cards (modes):
+ *     NFB-40G2 (10G8)
+ *     NFB-100G2Q (10G8)
+ *     NFB-200G2QL (10G8)
+ *
+ * 4 - for cards (modes):
+ *     NFB-100G1 (10G10)
  */
 #if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
 #elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
 
+/*
+ * Cards (modes):
+ *     NFB-100G1 (100G1)
+ */
+
 const uint32_t szedata2_ibuf_base_table[] = {
 	0x8000
 };
@@ -61,6 +81,118 @@
 	0x9000
 };
 
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 1
+
+/*
+ * Cards (modes):
+ *     NFB-100G2Q (100G1)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9800
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 2
+
+/*
+ * Cards (modes):
+ *     NFB-40G2 (40G2)
+ *     NFB-100G2C (100G2)
+ *     NFB-100G2Q (40G2)
+ *     NFB-200G2QL (100G2, 40G2)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9800
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 3
+
+/*
+ * Cards (modes):
+ *     NFB-40G2 (10G8)
+ *     NFB-100G2Q (10G8)
+ *     NFB-200G2QL (10G8)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800,
+	0x8A00,
+	0x8C00,
+	0x8E00
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9200,
+	0x9400,
+	0x9600,
+	0x9800,
+	0x9A00,
+	0x9C00,
+	0x9E00
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 4
+
+/*
+ * Cards (modes):
+ *     NFB-100G1 (10G10)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800,
+	0x8A00,
+	0x8C00,
+	0x8E00,
+	0x9000,
+	0x9200
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0xA000,
+	0xA200,
+	0xA400,
+	0xA600,
+	0xA800,
+	0xAA00,
+	0xAC00,
+	0xAE00,
+	0xB000,
+	0xB200
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9200,
+	0x9400,
+	0x9600,
+	0x9800
+};
+
 #else
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
 #endif
-- 
1.7.1

Re: [PATCH 1/5] net/szedata2: refactor ibuf and obuf names

[Ferruh Yigit]

On 5/26/2017 7:05 PM, Matej Vido wrote:
> Signed-off-by: Matej Vido <vido@cesnet.cz>

Hi Matej,

Overall patchset looks good to me, but can you please provide a little
more information in commit logs, please check comments on patches.

For this patch, it seems refactor naming is removing "cgmii", what is
the reason of this, is cgmii no more true or adding different interface?

Thanks,
ferruh

> ---
>  drivers/net/szedata2/rte_eth_szedata2.c |   80 +++++++++++++++---------------
>  drivers/net/szedata2/rte_eth_szedata2.h |   48 +++++++++---------
>  2 files changed, 64 insertions(+), 64 deletions(-)

<...>

Re: [PATCH 3/5] net/szedata2: refactor ibuf and obuf address definition

[Ferruh Yigit]

On 5/26/2017 7:05 PM, Matej Vido wrote:
> This is to prepare for firmwares with multiple ibufs and obufs.
> Offsets of ibufs and obufs are defined in array.

I was thinking ibufs and obufs as queues, but since link functions
updated per ibufs it looks like ports, can you please provide some
information what is ibufs and obufs?

What is the benefit of having multiple ibufs and obufs?

> Functions which operate on ibufs and obufs iterate over this array.
> 
> Signed-off-by: Matej Vido <vido@cesnet.cz>
<...>

Re: [PATCH 5/5] net/szedata2: add more supported firmwares

[Ferruh Yigit]

On 5/26/2017 7:05 PM, Matej Vido wrote:
> Add IBUF and OBUF offsets definitions for new firmwares.

just to double check, is it required to add new pci device ids to
support these new cards?

Is dpdk supported nics (http://dpdk.org/doc/nics) needs to be updated?

Can you please update release notes to announce new cards support?

> 
> Signed-off-by: Matej Vido <vido@cesnet.cz>

<...>

> +#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
> +
> +const uint32_t szedata2_ibuf_base_table[] = {
> +	0x8000,
> +	0x8200,
> +	0x8400,
> +	0x8600,
> +	0x8800
> +};
> +const uint32_t szedata2_obuf_base_table[] = {
> +	0x9000,
> +	0x9200,
> +	0x9400,
> +	0x9600,
> +	0x9800
> +};

AS = 5 is not documented in both documentation and source code comment,
can you please add this one too?

> +
>  #else
>  #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
>  #endif
> 

Re: [PATCH 1/5] net/szedata2: refactor ibuf and obuf names

[Matej Vido]

On 29.05.2017 14:40, Ferruh Yigit wrote:
> On 5/26/2017 7:05 PM, Matej Vido wrote:
>> Signed-off-by: Matej Vido <vido@cesnet.cz>
> Hi Matej,
>
> Overall patchset looks good to me, but can you please provide a little
> more information in commit logs, please check comments on patches.
>
> For this patch, it seems refactor naming is removing "cgmii", what is
> the reason of this, is cgmii no more true or adding different interface?
>
> Thanks,
> ferruh
Hi Ferruh,

ok, I will address the comments in v2.

"cgmii" was too specific. There can be different ibuf/obuf modules in 
different firmwares. But the address space definition is the same for 
all ibuf/obuf modules in all firmwares so this patch makes the name 
general (and also shorter).

Regards,
Matej
>
>> ---
>>   drivers/net/szedata2/rte_eth_szedata2.c |   80 +++++++++++++++---------------
>>   drivers/net/szedata2/rte_eth_szedata2.h |   48 +++++++++---------
>>   2 files changed, 64 insertions(+), 64 deletions(-)
> <...>

Re: [PATCH 3/5] net/szedata2: refactor ibuf and obuf address definition

[Matej Vido]

On 29.05.2017 14:41, Ferruh Yigit wrote:
> On 5/26/2017 7:05 PM, Matej Vido wrote:
>> This is to prepare for firmwares with multiple ibufs and obufs.
>> Offsets of ibufs and obufs are defined in array.
> I was thinking ibufs and obufs as queues, but since link functions
> updated per ibufs it looks like ports, can you please provide some
> information what is ibufs and obufs?
>
> What is the benefit of having multiple ibufs and obufs?
Hi Ferruh,

ibufs and obufs are the modules in FPGA firmware implementing the 
Ethernet port (MAC layer, to be exact). There is one ibuf+obuf per 
Ethernet port. Our cards and firmwares allow one 100GE physical port to 
be one Ethernet port, or split into 10 ports of 10GE. However, all DMA 
queues in the device are shared between all Ethernet ports. Packet from 
any port can be passed by crossbar logic to any DMA queue (and from any 
DMA queue to any port).

Regards,
Matej
>
>> Functions which operate on ibufs and obufs iterate over this array.
>>
>> Signed-off-by: Matej Vido <vido@cesnet.cz>
> <...>

Re: [PATCH 5/5] net/szedata2: add more supported firmwares

[Matej Vido]

On 29.05.2017 14:42, Ferruh Yigit wrote:
> On 5/26/2017 7:05 PM, Matej Vido wrote:
>> Add IBUF and OBUF offsets definitions for new firmwares.
> just to double check, is it required to add new pci device ids to
> support these new cards?
>
> Is dpdk supported nics (http://dpdk.org/doc/nics) needs to be updated?
>
> Can you please update release notes to announce new cards support?
Hi Ferruh,

This patch set adds mainly the support of new firmwares for the cards 
that are already supported.
But you are right, there is also one new card which would need to add 
new pci device id. We have to check if we want to add the card in this 
patch set and I will update v2 accordingly.

>
>> Signed-off-by: Matej Vido <vido@cesnet.cz>
> <...>
>
>> +#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
>> +
>> +const uint32_t szedata2_ibuf_base_table[] = {
>> +	0x8000,
>> +	0x8200,
>> +	0x8400,
>> +	0x8600,
>> +	0x8800
>> +};
>> +const uint32_t szedata2_obuf_base_table[] = {
>> +	0x9000,
>> +	0x9200,
>> +	0x9400,
>> +	0x9600,
>> +	0x9800
>> +};
> AS = 5 is not documented in both documentation and source code comment,
> can you please add this one too?
5 is for future use and experimental firmwares. Would it make sense to 
write this note in the comments but not in the documentation to avoid 
confusion or should it be mentioned in the documentation too?

Thanks,
Matej
>> +
>>   #else
>>   #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
>>   #endif
>>

Re: [PATCH 5/5] net/szedata2: add more supported firmwares

[Ferruh Yigit]

On 5/31/2017 9:34 AM, Matej Vido wrote:
> On 29.05.2017 14:42, Ferruh Yigit wrote:
>> On 5/26/2017 7:05 PM, Matej Vido wrote:
>>> Add IBUF and OBUF offsets definitions for new firmwares.
>> just to double check, is it required to add new pci device ids to
>> support these new cards?
>>
>> Is dpdk supported nics (http://dpdk.org/doc/nics) needs to be updated?
>>
>> Can you please update release notes to announce new cards support?
> Hi Ferruh,
> 
> This patch set adds mainly the support of new firmwares for the cards 
> that are already supported.
> But you are right, there is also one new card which would need to add 
> new pci device id. We have to check if we want to add the card in this 
> patch set and I will update v2 accordingly.
> 
>>
>>> Signed-off-by: Matej Vido <vido@cesnet.cz>
>> <...>
>>
>>> +#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
>>> +
>>> +const uint32_t szedata2_ibuf_base_table[] = {
>>> +	0x8000,
>>> +	0x8200,
>>> +	0x8400,
>>> +	0x8600,
>>> +	0x8800
>>> +};
>>> +const uint32_t szedata2_obuf_base_table[] = {
>>> +	0x9000,
>>> +	0x9200,
>>> +	0x9400,
>>> +	0x9600,
>>> +	0x9800
>>> +};
>> AS = 5 is not documented in both documentation and source code comment,
>> can you please add this one too?
> 5 is for future use and experimental firmwares. Would it make sense to 
> write this note in the comments but not in the documentation to avoid 
> confusion or should it be mentioned in the documentation too?

I think it is good to mention in documentation, since this will be part
of released code, but this can be brief.

> 
> Thanks,
> Matej
>>> +
>>>   #else
>>>   #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
>>>   #endif
>>>
> 

Re: [PATCH 3/5] net/szedata2: refactor ibuf and obuf address definition

[Ferruh Yigit]

On 5/31/2017 9:33 AM, Matej Vido wrote:
> On 29.05.2017 14:41, Ferruh Yigit wrote:
>> On 5/26/2017 7:05 PM, Matej Vido wrote:
>>> This is to prepare for firmwares with multiple ibufs and obufs.
>>> Offsets of ibufs and obufs are defined in array.
>> I was thinking ibufs and obufs as queues, but since link functions
>> updated per ibufs it looks like ports, can you please provide some
>> information what is ibufs and obufs?
>>
>> What is the benefit of having multiple ibufs and obufs?
> Hi Ferruh,
> 
> ibufs and obufs are the modules in FPGA firmware implementing the 
> Ethernet port (MAC layer, to be exact). There is one ibuf+obuf per 
> Ethernet port. Our cards and firmwares allow one 100GE physical port to 
> be one Ethernet port, or split into 10 ports of 10GE. However, all DMA 
> queues in the device are shared between all Ethernet ports. Packet from 
> any port can be passed by crossbar logic to any DMA queue (and from any 
> DMA queue to any port).

Thank you for clarification.

> 
> Regards,
> Matej
>>
>>> Functions which operate on ibufs and obufs iterate over this array.
>>>
>>> Signed-off-by: Matej Vido <vido@cesnet.cz>
>> <...>
> 

[PATCH v2 1/5] net/szedata2: refactor ibuf and obuf names

[Matej Vido]

Prefix "cgmii" is removed because it is too specific.
There are different ibuf/obuf modules in different firmwares
but the address space definition is the same.
This patch makes the name general.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
v2:
  Added more detailed commit message.

 drivers/net/szedata2/rte_eth_szedata2.c | 80 ++++++++++++++++-----------------
 drivers/net/szedata2/rte_eth_szedata2.h | 48 ++++++++++----------
 2 files changed, 64 insertions(+), 64 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index c70e9f3..5be08da 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -1149,11 +1149,11 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
 
-	switch (cgmii_link_speed(ibuf)) {
+	switch (get_link_speed(ibuf)) {
 	case SZEDATA2_LINK_SPEED_10G:
 		link.link_speed = ETH_SPEED_NUM_10G;
 		break;
@@ -1171,8 +1171,8 @@ struct pmd_internals {
 	/* szedata2 uses only full duplex */
 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
 
-	link.link_status = (cgmii_ibuf_is_enabled(ibuf) &&
-			cgmii_ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+	link.link_status = (ibuf_is_enabled(ibuf) &&
+			ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
 
 	link.link_autoneg = ETH_LINK_SPEED_FIXED;
 
@@ -1187,15 +1187,15 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_obuf *);
-
-	cgmii_ibuf_enable(ibuf);
-	cgmii_obuf_enable(obuf);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
+			volatile struct szedata2_obuf *);
+
+	ibuf_enable(ibuf);
+	obuf_enable(obuf);
 	return 0;
 }
 
@@ -1204,15 +1204,15 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_obuf *);
-
-	cgmii_ibuf_disable(ibuf);
-	cgmii_obuf_disable(obuf);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
+			volatile struct szedata2_obuf *);
+
+	ibuf_disable(ibuf);
+	obuf_disable(obuf);
 	return 0;
 }
 
@@ -1292,10 +1292,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
 }
 
 static void
@@ -1303,10 +1303,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
 }
 
 static void
@@ -1314,10 +1314,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
 }
 
 static void
@@ -1325,10 +1325,10 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
-			volatile struct szedata2_cgmii_ibuf *);
-	cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
+			volatile struct szedata2_ibuf *);
+	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
 }
 
 static const struct eth_dev_ops ops = {
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index afe8a38..4f56fcf 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -209,9 +209,9 @@ enum szedata2_mac_check_mode {
 };
 
 /*
- * Structure describes CGMII IBUF address space
+ * Structure describes IBUF address space
  */
-struct szedata2_cgmii_ibuf {
+struct szedata2_ibuf {
 	/** Total Received Frames Counter low part */
 	uint32_t trfcl;
 	/** Correct Frames Counter low part */
@@ -248,8 +248,8 @@ struct szedata2_cgmii_ibuf {
 	uint32_t oroch;
 } __rte_packed;
 
-/* Offset of CGMII IBUF memory for MAC addresses */
-#define SZEDATA2_CGMII_IBUF_MAC_MEM_OFF 0x80
+/* Offset of IBUF memory for MAC addresses */
+#define SZEDATA2_IBUF_MAC_MEM_OFF 0x80
 
 /*
  * @return
@@ -257,7 +257,7 @@ struct szedata2_cgmii_ibuf {
  *     false if IBUF is disabled
  */
 static inline bool
-cgmii_ibuf_is_enabled(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_is_enabled(volatile struct szedata2_ibuf *ibuf)
 {
 	return ((rte_le_to_cpu_32(ibuf->ibuf_en) & 0x1) != 0) ? true : false;
 }
@@ -266,7 +266,7 @@ struct szedata2_cgmii_ibuf {
  * Enables IBUF.
  */
 static inline void
-cgmii_ibuf_enable(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_enable(volatile struct szedata2_ibuf *ibuf)
 {
 	ibuf->ibuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) | 0x1);
@@ -276,7 +276,7 @@ struct szedata2_cgmii_ibuf {
  * Disables IBUF.
  */
 static inline void
-cgmii_ibuf_disable(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_disable(volatile struct szedata2_ibuf *ibuf)
 {
 	ibuf->ibuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) & ~0x1);
@@ -288,7 +288,7 @@ struct szedata2_cgmii_ibuf {
  *     false if ibuf link is down
  */
 static inline bool
-cgmii_ibuf_is_link_up(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_is_link_up(volatile struct szedata2_ibuf *ibuf)
 {
 	return ((rte_le_to_cpu_32(ibuf->ibuf_st) & 0x80) != 0) ? true : false;
 }
@@ -298,7 +298,7 @@ struct szedata2_cgmii_ibuf {
  *     MAC address check mode
  */
 static inline enum szedata2_mac_check_mode
-cgmii_ibuf_mac_mode_read(volatile struct szedata2_cgmii_ibuf *ibuf)
+ibuf_mac_mode_read(volatile struct szedata2_ibuf *ibuf)
 {
 	switch (rte_le_to_cpu_32(ibuf->mac_chmode) & 0x3) {
 	case 0x0:
@@ -318,7 +318,7 @@ struct szedata2_cgmii_ibuf {
  * Writes "mode" in MAC address check mode register.
  */
 static inline void
-cgmii_ibuf_mac_mode_write(volatile struct szedata2_cgmii_ibuf *ibuf,
+ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
 		enum szedata2_mac_check_mode mode)
 {
 	ibuf->mac_chmode = rte_cpu_to_le_32(
@@ -326,9 +326,9 @@ struct szedata2_cgmii_ibuf {
 }
 
 /*
- * Structure describes CGMII OBUF address space
+ * Structure describes OBUF address space
  */
-struct szedata2_cgmii_obuf {
+struct szedata2_obuf {
 	/** Total Sent Frames Counter low part */
 	uint32_t tsfcl;
 	/** Octets Sent Counter low part */
@@ -361,7 +361,7 @@ struct szedata2_cgmii_obuf {
  *     false if OBUF is disabled
  */
 static inline bool
-cgmii_obuf_is_enabled(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_is_enabled(volatile struct szedata2_obuf *obuf)
 {
 	return ((rte_le_to_cpu_32(obuf->obuf_en) & 0x1) != 0) ? true : false;
 }
@@ -370,7 +370,7 @@ struct szedata2_cgmii_obuf {
  * Enables OBUF.
  */
 static inline void
-cgmii_obuf_enable(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_enable(volatile struct szedata2_obuf *obuf)
 {
 	obuf->obuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) | 0x1);
@@ -380,7 +380,7 @@ struct szedata2_cgmii_obuf {
  * Disables OBUF.
  */
 static inline void
-cgmii_obuf_disable(volatile struct szedata2_cgmii_obuf *obuf)
+obuf_disable(volatile struct szedata2_obuf *obuf)
 {
 	obuf->obuf_en =
 		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) & ~0x1);
@@ -393,7 +393,7 @@ struct szedata2_cgmii_obuf {
  * @return Link speed constant.
  */
 static inline enum szedata2_link_speed
-cgmii_link_speed(volatile struct szedata2_cgmii_ibuf *ibuf)
+get_link_speed(volatile struct szedata2_ibuf *ibuf)
 {
 	uint32_t speed = (rte_le_to_cpu_32(ibuf->ibuf_st) & 0x70) >> 4;
 	switch (speed) {
@@ -426,22 +426,22 @@ struct szedata2_cgmii_obuf {
 #elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
 
 /*
- * CGMII IBUF offset from the beginning of PCI resource address space.
+ * IBUF offset from the beginning of PCI resource address space.
  */
-#define SZEDATA2_CGMII_IBUF_BASE_OFF 0x8000
+#define SZEDATA2_IBUF_BASE_OFF 0x8000
 /*
- * Size of CGMII IBUF.
+ * Size of IBUF.
  */
-#define SZEDATA2_CGMII_IBUF_SIZE 0x200
+#define SZEDATA2_IBUF_SIZE 0x200
 
 /*
- * GCMII OBUF offset from the beginning of PCI resource address space.
+ * OBUF offset from the beginning of PCI resource address space.
  */
-#define SZEDATA2_CGMII_OBUF_BASE_OFF 0x9000
+#define SZEDATA2_OBUF_BASE_OFF 0x9000
 /*
- * Size of CGMII OBUF.
+ * Size of OBUF.
  */
-#define SZEDATA2_CGMII_OBUF_SIZE 0x100
+#define SZEDATA2_OBUF_SIZE 0x100
 
 #else
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
-- 
1.8.4

[PATCH v2 2/5] net/szedata2: refactor ibuf and obuf read and write

[Matej Vido]

Remove unused read and write functions.
Use rte_read*, rte_write* functions to access ibuf and obuf
address space.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/rte_eth_szedata2.c |   4 +-
 drivers/net/szedata2/rte_eth_szedata2.h | 184 +++++++++++---------------------
 2 files changed, 64 insertions(+), 124 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index 5be08da..f8ec331 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -1149,9 +1149,9 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+	const volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
 			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
+			const volatile struct szedata2_ibuf *);
 
 	switch (get_link_speed(ibuf)) {
 	case SZEDATA2_LINK_SPEED_10G:
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 4f56fcf..0b635d0 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -37,6 +37,7 @@
 #include <stdbool.h>
 
 #include <rte_byteorder.h>
+#include <rte_io.h>
 
 /* PCI Vendor ID */
 #define PCI_VENDOR_ID_NETCOPE 0x1b26
@@ -113,82 +114,16 @@ struct szedata {
 	int                         numa_node;
 };
 
-/*
- * @return Byte from PCI resource at offset "offset".
- */
-static inline uint8_t
-pci_resource_read8(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return *((uint8_t *)((uint8_t *)rsc->addr + offset));
-}
-
-/*
- * @return Two bytes from PCI resource starting at offset "offset".
- */
-static inline uint16_t
-pci_resource_read16(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * @return Four bytes from PCI resource starting at offset "offset".
- */
 static inline uint32_t
-pci_resource_read32(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * @return Eight bytes from PCI resource starting at offset "offset".
- */
-static inline uint64_t
-pci_resource_read64(struct rte_mem_resource *rsc, uint32_t offset)
-{
-	return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *)rsc->addr +
-					       offset)));
-}
-
-/*
- * Write one byte to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write8(struct rte_mem_resource *rsc, uint32_t offset, uint8_t val)
+szedata2_read32(const volatile void *addr)
 {
-	*((uint8_t *)((uint8_t *)rsc->addr + offset)) = val;
+	return rte_le_to_cpu_32(rte_read32(addr));
 }
 
-/*
- * Write two bytes to PCI resource address space at offset "offset".
- */
 static inline void
-pci_resource_write16(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint16_t val)
+szedata2_write32(uint32_t value, volatile void *addr)
 {
-	*((uint16_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_16(val);
-}
-
-/*
- * Write four bytes to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write32(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint32_t val)
-{
-	*((uint32_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_32(val);
-}
-
-/*
- * Write eight bytes to PCI resource address space at offset "offset".
- */
-static inline void
-pci_resource_write64(struct rte_mem_resource *rsc, uint32_t offset,
-		     uint64_t val)
-{
-	*((uint64_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_64(val);
+	rte_write32(rte_cpu_to_le_32(value), addr);
 }
 
 #define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
@@ -209,57 +144,64 @@ enum szedata2_mac_check_mode {
 };
 
 /*
+ * Maximum possible number of MAC addresses (limited by IBUF status
+ * register value MAC_COUNT which has 5 bits).
+ */
+#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
+
+/*
  * Structure describes IBUF address space
  */
 struct szedata2_ibuf {
 	/** Total Received Frames Counter low part */
-	uint32_t trfcl;
+	uint32_t trfcl; /**< 0x00 */
 	/** Correct Frames Counter low part */
-	uint32_t cfcl;
+	uint32_t cfcl; /**< 0x04 */
 	/** Discarded Frames Counter low part */
-	uint32_t dfcl;
+	uint32_t dfcl; /**< 0x08 */
 	/** Counter of frames discarded due to buffer overflow low part */
-	uint32_t bodfcl;
+	uint32_t bodfcl; /**< 0x0C */
 	/** Total Received Frames Counter high part */
-	uint32_t trfch;
+	uint32_t trfch; /**< 0x10 */
 	/** Correct Frames Counter high part */
-	uint32_t cfch;
+	uint32_t cfch; /**< 0x14 */
 	/** Discarded Frames Counter high part */
-	uint32_t dfch;
+	uint32_t dfch; /**< 0x18 */
 	/** Counter of frames discarded due to buffer overflow high part */
-	uint32_t bodfch;
+	uint32_t bodfch; /**< 0x1C */
 	/** IBUF enable register */
-	uint32_t ibuf_en;
+	uint32_t ibuf_en; /**< 0x20 */
 	/** Error mask register */
-	uint32_t err_mask;
+	uint32_t err_mask; /**< 0x24 */
 	/** IBUF status register */
-	uint32_t ibuf_st;
+	uint32_t ibuf_st; /**< 0x28 */
 	/** IBUF command register */
-	uint32_t ibuf_cmd;
+	uint32_t ibuf_cmd; /**< 0x2C */
 	/** Minimum frame length allowed */
-	uint32_t mfla;
+	uint32_t mfla; /**< 0x30 */
 	/** Frame MTU */
-	uint32_t mtu;
+	uint32_t mtu; /**< 0x34 */
 	/** MAC address check mode */
-	uint32_t mac_chmode;
+	uint32_t mac_chmode; /**< 0x38 */
 	/** Octets Received OK Counter low part */
-	uint32_t orocl;
+	uint32_t orocl; /**< 0x3C */
 	/** Octets Received OK Counter high part */
-	uint32_t oroch;
+	uint32_t oroch; /**< 0x40 */
+	/** reserved */
+	uint8_t reserved[60]; /**< 0x4C */
+	/** IBUF memory for MAC addresses */
+	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
 } __rte_packed;
 
-/* Offset of IBUF memory for MAC addresses */
-#define SZEDATA2_IBUF_MAC_MEM_OFF 0x80
-
 /*
  * @return
  *     true if IBUF is enabled
  *     false if IBUF is disabled
  */
 static inline bool
-ibuf_is_enabled(volatile struct szedata2_ibuf *ibuf)
+ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
 {
-	return ((rte_le_to_cpu_32(ibuf->ibuf_en) & 0x1) != 0) ? true : false;
+	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
 }
 
 /*
@@ -268,8 +210,7 @@ struct szedata2_ibuf {
 static inline void
 ibuf_enable(volatile struct szedata2_ibuf *ibuf)
 {
-	ibuf->ibuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) | 0x1);
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
 }
 
 /*
@@ -278,8 +219,8 @@ struct szedata2_ibuf {
 static inline void
 ibuf_disable(volatile struct szedata2_ibuf *ibuf)
 {
-	ibuf->ibuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(ibuf->ibuf_en) & ~0x1);
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
+			&ibuf->ibuf_en);
 }
 
 /*
@@ -288,9 +229,9 @@ struct szedata2_ibuf {
  *     false if ibuf link is down
  */
 static inline bool
-ibuf_is_link_up(volatile struct szedata2_ibuf *ibuf)
+ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
 {
-	return ((rte_le_to_cpu_32(ibuf->ibuf_st) & 0x80) != 0) ? true : false;
+	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
 }
 
 /*
@@ -298,9 +239,9 @@ struct szedata2_ibuf {
  *     MAC address check mode
  */
 static inline enum szedata2_mac_check_mode
-ibuf_mac_mode_read(volatile struct szedata2_ibuf *ibuf)
+ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
 {
-	switch (rte_le_to_cpu_32(ibuf->mac_chmode) & 0x3) {
+	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
 	case 0x0:
 		return SZEDATA2_MAC_CHMODE_PROMISC;
 	case 0x1:
@@ -321,8 +262,8 @@ struct szedata2_ibuf {
 ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
 		enum szedata2_mac_check_mode mode)
 {
-	ibuf->mac_chmode = rte_cpu_to_le_32(
-			(rte_le_to_cpu_32(ibuf->mac_chmode) & ~0x3) | mode);
+	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
+			&ibuf->mac_chmode);
 }
 
 /*
@@ -330,29 +271,29 @@ struct szedata2_ibuf {
  */
 struct szedata2_obuf {
 	/** Total Sent Frames Counter low part */
-	uint32_t tsfcl;
+	uint32_t tsfcl; /**< 0x00 */
 	/** Octets Sent Counter low part */
-	uint32_t oscl;
+	uint32_t oscl; /**< 0x04 */
 	/** Total Discarded Frames Counter low part */
-	uint32_t tdfcl;
+	uint32_t tdfcl; /**< 0x08 */
 	/** reserved */
-	uint32_t reserved1;
+	uint32_t reserved1; /**< 0x0C */
 	/** Total Sent Frames Counter high part */
-	uint32_t tsfch;
+	uint32_t tsfch; /**< 0x10 */
 	/** Octets Sent Counter high part */
-	uint32_t osch;
+	uint32_t osch; /**< 0x14 */
 	/** Total Discarded Frames Counter high part */
-	uint32_t tdfch;
+	uint32_t tdfch; /**< 0x18 */
 	/** reserved */
-	uint32_t reserved2;
+	uint32_t reserved2; /**< 0x1C */
 	/** OBUF enable register */
-	uint32_t obuf_en;
+	uint32_t obuf_en; /**< 0x20 */
 	/** reserved */
-	uint64_t reserved3;
+	uint64_t reserved3; /**< 0x24 */
 	/** OBUF control register */
-	uint32_t ctrl;
+	uint32_t ctrl; /**< 0x2C */
 	/** OBUF status register */
-	uint32_t obuf_st;
+	uint32_t obuf_st; /**< 0x30 */
 } __rte_packed;
 
 /*
@@ -361,9 +302,9 @@ struct szedata2_obuf {
  *     false if OBUF is disabled
  */
 static inline bool
-obuf_is_enabled(volatile struct szedata2_obuf *obuf)
+obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
 {
-	return ((rte_le_to_cpu_32(obuf->obuf_en) & 0x1) != 0) ? true : false;
+	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
 }
 
 /*
@@ -372,8 +313,7 @@ struct szedata2_obuf {
 static inline void
 obuf_enable(volatile struct szedata2_obuf *obuf)
 {
-	obuf->obuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) | 0x1);
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
 }
 
 /*
@@ -382,8 +322,8 @@ struct szedata2_obuf {
 static inline void
 obuf_disable(volatile struct szedata2_obuf *obuf)
 {
-	obuf->obuf_en =
-		rte_cpu_to_le_32(rte_le_to_cpu_32(obuf->obuf_en) & ~0x1);
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
+			&obuf->obuf_en);
 }
 
 /*
@@ -393,9 +333,9 @@ struct szedata2_obuf {
  * @return Link speed constant.
  */
 static inline enum szedata2_link_speed
-get_link_speed(volatile struct szedata2_ibuf *ibuf)
+get_link_speed(const volatile struct szedata2_ibuf *ibuf)
 {
-	uint32_t speed = (rte_le_to_cpu_32(ibuf->ibuf_st) & 0x70) >> 4;
+	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
 	switch (speed) {
 	case 0x03:
 		return SZEDATA2_LINK_SPEED_10G;
-- 
1.8.4

[PATCH v2 3/5] net/szedata2: refactor ibuf and obuf address definition

[Matej Vido]

This is to prepare for firmwares with multiple ibufs and obufs.
Ibufs and obufs are the modules in FPGA firmware implementing
the Ethernet port.
There is one ibuf+obuf per Ethernet port.
The cards and firmwares allow one physical port to be one Ethernet
port or split into more Ethernet ports, e.g. one 100GE physical
port can be one Ethernet port of 100GE or split into ten Ethernet
ports of 10GE.
All DMA queues in the device are shared between all Ethernet ports.
Offsets of ibufs and obufs are defined in array.
Functions which operate on ibufs and obufs iterate over this array.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
v2:
  Added more detailed commit message.

 drivers/net/szedata2/Makefile           |   1 +
 drivers/net/szedata2/rte_eth_szedata2.c | 121 +++++++++++++++++++++-----------
 drivers/net/szedata2/rte_eth_szedata2.h |  64 -----------------
 drivers/net/szedata2/szedata2_iobuf.c   |  69 ++++++++++++++++++
 drivers/net/szedata2/szedata2_iobuf.h   |  95 +++++++++++++++++++++++++
 5 files changed, 246 insertions(+), 104 deletions(-)
 create mode 100644 drivers/net/szedata2/szedata2_iobuf.c
 create mode 100644 drivers/net/szedata2/szedata2_iobuf.h

diff --git a/drivers/net/szedata2/Makefile b/drivers/net/szedata2/Makefile
index 836c3b2..0e96b92 100644
--- a/drivers/net/szedata2/Makefile
+++ b/drivers/net/szedata2/Makefile
@@ -48,6 +48,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += rte_eth_szedata2.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += szedata2_iobuf.c
 
 #
 # Export include files
diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index f8ec331..49495fd 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -53,6 +53,7 @@
 #include <rte_atomic.h>
 
 #include "rte_eth_szedata2.h"
+#include "szedata2_iobuf.h"
 
 #define RTE_ETH_SZEDATA2_MAX_RX_QUEUES 32
 #define RTE_ETH_SZEDATA2_MAX_TX_QUEUES 32
@@ -1140,6 +1141,33 @@ struct pmd_internals {
 	dev->data->nb_tx_queues = 0;
 }
 
+/**
+ * Function takes value from first IBUF status register.
+ * Values in IBUF and OBUF should be same.
+ *
+ * @param internals
+ *     Pointer to device private structure.
+ * @return
+ *     Link speed constant.
+ */
+static inline enum szedata2_link_speed
+get_link_speed(const struct pmd_internals *internals)
+{
+	const volatile struct szedata2_ibuf *ibuf =
+		ibuf_ptr_by_index(internals->pci_rsc, 0);
+	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
+	switch (speed) {
+	case 0x03:
+		return SZEDATA2_LINK_SPEED_10G;
+	case 0x04:
+		return SZEDATA2_LINK_SPEED_40G;
+	case 0x05:
+		return SZEDATA2_LINK_SPEED_100G;
+	default:
+		return SZEDATA2_LINK_SPEED_DEFAULT;
+	}
+}
+
 static int
 eth_link_update(struct rte_eth_dev *dev,
 		int wait_to_complete __rte_unused)
@@ -1149,11 +1177,11 @@ struct pmd_internals {
 	struct rte_eth_link *dev_link = &dev->data->dev_link;
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	const volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			const volatile struct szedata2_ibuf *);
+	const volatile struct szedata2_ibuf *ibuf;
+	uint32_t i;
+	bool link_is_up = false;
 
-	switch (get_link_speed(ibuf)) {
+	switch (get_link_speed(internals)) {
 	case SZEDATA2_LINK_SPEED_10G:
 		link.link_speed = ETH_SPEED_NUM_10G;
 		break;
@@ -1171,8 +1199,19 @@ struct pmd_internals {
 	/* szedata2 uses only full duplex */
 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
 
-	link.link_status = (ibuf_is_enabled(ibuf) &&
-			ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf = ibuf_ptr_by_index(internals->pci_rsc, i);
+		/*
+		 * Link is considered up if at least one ibuf is enabled
+		 * and up.
+		 */
+		if (ibuf_is_enabled(ibuf) && ibuf_is_link_up(ibuf)) {
+			link_is_up = true;
+			break;
+		}
+	}
+
+	link.link_status = (link_is_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 
 	link.link_autoneg = ETH_LINK_SPEED_FIXED;
 
@@ -1187,15 +1226,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
-			volatile struct szedata2_obuf *);
-
-	ibuf_enable(ibuf);
-	obuf_enable(obuf);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++)
+		ibuf_enable(ibuf_ptr_by_index(internals->pci_rsc, i));
+	for (i = 0; i < szedata2_obuf_count; i++)
+		obuf_enable(obuf_ptr_by_index(internals->pci_rsc, i));
 	return 0;
 }
 
@@ -1204,15 +1240,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	volatile struct szedata2_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_OBUF_BASE_OFF,
-			volatile struct szedata2_obuf *);
-
-	ibuf_disable(ibuf);
-	obuf_disable(obuf);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++)
+		ibuf_disable(ibuf_ptr_by_index(internals->pci_rsc, i));
+	for (i = 0; i < szedata2_obuf_count; i++)
+		obuf_disable(obuf_ptr_by_index(internals->pci_rsc, i));
 	return 0;
 }
 
@@ -1292,10 +1325,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_PROMISC);
+	}
 }
 
 static void
@@ -1303,10 +1338,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	}
 }
 
 static void
@@ -1314,10 +1351,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+	}
 }
 
 static void
@@ -1325,10 +1364,12 @@ struct pmd_internals {
 {
 	struct pmd_internals *internals = (struct pmd_internals *)
 		dev->data->dev_private;
-	volatile struct szedata2_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
-			internals->pci_rsc, SZEDATA2_IBUF_BASE_OFF,
-			volatile struct szedata2_ibuf *);
-	ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	uint32_t i;
+
+	for (i = 0; i < szedata2_ibuf_count; i++) {
+		ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
+				SZEDATA2_MAC_CHMODE_ONLY_VALID);
+	}
 }
 
 static const struct eth_dev_ops ops = {
diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 0b635d0..6b31a77 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -126,9 +126,6 @@ struct szedata {
 	rte_write32(rte_cpu_to_le_32(value), addr);
 }
 
-#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
-	((type)(((uint8_t *)(rsc)->addr) + (offset)))
-
 enum szedata2_link_speed {
 	SZEDATA2_LINK_SPEED_DEFAULT = 0,
 	SZEDATA2_LINK_SPEED_10G,
@@ -326,65 +323,4 @@ struct szedata2_obuf {
 			&obuf->obuf_en);
 }
 
-/*
- * Function takes value from IBUF status register. Values in IBUF and OBUF
- * should be same.
- *
- * @return Link speed constant.
- */
-static inline enum szedata2_link_speed
-get_link_speed(const volatile struct szedata2_ibuf *ibuf)
-{
-	uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
-	switch (speed) {
-	case 0x03:
-		return SZEDATA2_LINK_SPEED_10G;
-	case 0x04:
-		return SZEDATA2_LINK_SPEED_40G;
-	case 0x05:
-		return SZEDATA2_LINK_SPEED_100G;
-	default:
-		return SZEDATA2_LINK_SPEED_DEFAULT;
-	}
-}
-
-/*
- * IBUFs and OBUFs can generally be located at different offsets in different
- * firmwares.
- * This part defines base offsets of IBUFs and OBUFs through various firmwares.
- * Currently one firmware type is supported.
- * Type of firmware is set through configuration option
- * CONFIG_RTE_LIBRTE_PMD_SZEDATA_AS.
- * Possible values are:
- * 0 - for firmwares:
- *     NIC_100G1_LR4
- *     HANIC_100G1_LR4
- *     HANIC_100G1_SR10
- */
-#if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
-
-/*
- * IBUF offset from the beginning of PCI resource address space.
- */
-#define SZEDATA2_IBUF_BASE_OFF 0x8000
-/*
- * Size of IBUF.
- */
-#define SZEDATA2_IBUF_SIZE 0x200
-
-/*
- * OBUF offset from the beginning of PCI resource address space.
- */
-#define SZEDATA2_OBUF_BASE_OFF 0x9000
-/*
- * Size of OBUF.
- */
-#define SZEDATA2_OBUF_SIZE 0x100
-
-#else
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
-#endif
-
 #endif
diff --git a/drivers/net/szedata2/szedata2_iobuf.c b/drivers/net/szedata2/szedata2_iobuf.c
new file mode 100644
index 0000000..2d25e65
--- /dev/null
+++ b/drivers/net/szedata2/szedata2_iobuf.c
@@ -0,0 +1,69 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2017 CESNET
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of CESNET nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+
+#include <rte_common.h>
+
+#include "szedata2_iobuf.h"
+
+/*
+ * IBUFs and OBUFs can generally be located at different offsets in different
+ * firmwares.
+ * This part defines base offsets of IBUFs and OBUFs through various firmwares.
+ * Currently one firmware type is supported.
+ * Type of firmware is set through configuration option
+ * CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS.
+ * Possible values are:
+ * 0 - for firmwares:
+ *     NIC_100G1_LR4
+ *     HANIC_100G1_LR4
+ *     HANIC_100G1_SR10
+ */
+#if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
+#error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000
+};
+
+#else
+#error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
+#endif
+
+const uint32_t szedata2_ibuf_count = RTE_DIM(szedata2_ibuf_base_table);
+const uint32_t szedata2_obuf_count = RTE_DIM(szedata2_obuf_base_table);
diff --git a/drivers/net/szedata2/szedata2_iobuf.h b/drivers/net/szedata2/szedata2_iobuf.h
new file mode 100644
index 0000000..3ae4367
--- /dev/null
+++ b/drivers/net/szedata2/szedata2_iobuf.h
@@ -0,0 +1,95 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2017 CESNET
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of CESNET nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SZEDATA2_IOBUF_H_
+#define _SZEDATA2_IOBUF_H_
+
+#include <stdint.h>
+
+#include <rte_dev.h>
+
+/* IBUF offsets from the beginning of the PCI resource address space. */
+extern const uint32_t szedata2_ibuf_base_table[];
+extern const uint32_t szedata2_ibuf_count;
+
+/* OBUF offsets from the beginning of the PCI resource address space. */
+extern const uint32_t szedata2_obuf_base_table[];
+extern const uint32_t szedata2_obuf_count;
+
+/**
+ * Macro takes pointer to pci resource structure (rsc)
+ * and returns pointer to mapped resource memory at
+ * specified offset (offset) typecast to the type (type).
+ */
+#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
+	((type)(((uint8_t *)(rsc)->addr) + (offset)))
+
+/**
+ * Get pointer to IBUF structure according to specified index.
+ *
+ * @param rsc
+ *     Pointer to base address of memory resource.
+ * @param index
+ *     Index of IBUF.
+ * @return
+ *     Pointer to IBUF structure.
+ */
+static inline struct szedata2_ibuf *
+ibuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
+{
+	if (index >= szedata2_ibuf_count)
+		index = szedata2_ibuf_count - 1;
+	return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_ibuf_base_table[index],
+		struct szedata2_ibuf *);
+}
+
+/**
+ * Get pointer to OBUF structure according to specified idnex.
+ *
+ * @param rsc
+ *     Pointer to base address of memory resource.
+ * @param index
+ *     Index of OBUF.
+ * @return
+ *     Pointer to OBUF structure.
+ */
+static inline struct szedata2_obuf *
+obuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
+{
+	if (index >= szedata2_obuf_count)
+		index = szedata2_obuf_count - 1;
+	return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_obuf_base_table[index],
+		struct szedata2_obuf *);
+}
+
+#endif /* _SZEDATA2_IOBUF_H_ */
-- 
1.8.4

[PATCH v2 4/5] net/szedata2: move ibuf and obuf to specific header

[Matej Vido]

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
 drivers/net/szedata2/rte_eth_szedata2.h | 216 +-------------------------
 drivers/net/szedata2/szedata2_iobuf.h   | 261 ++++++++++++++++++++++++++++++++
 2 files changed, 264 insertions(+), 213 deletions(-)

diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 6b31a77..2571d54 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -34,10 +34,9 @@
 #ifndef RTE_PMD_SZEDATA2_H_
 #define RTE_PMD_SZEDATA2_H_
 
-#include <stdbool.h>
+#include <stdint.h>
 
-#include <rte_byteorder.h>
-#include <rte_io.h>
+#include <libsze2.h>
 
 /* PCI Vendor ID */
 #define PCI_VENDOR_ID_NETCOPE 0x1b26
@@ -114,213 +113,4 @@ struct szedata {
 	int                         numa_node;
 };
 
-static inline uint32_t
-szedata2_read32(const volatile void *addr)
-{
-	return rte_le_to_cpu_32(rte_read32(addr));
-}
-
-static inline void
-szedata2_write32(uint32_t value, volatile void *addr)
-{
-	rte_write32(rte_cpu_to_le_32(value), addr);
-}
-
-enum szedata2_link_speed {
-	SZEDATA2_LINK_SPEED_DEFAULT = 0,
-	SZEDATA2_LINK_SPEED_10G,
-	SZEDATA2_LINK_SPEED_40G,
-	SZEDATA2_LINK_SPEED_100G,
-};
-
-enum szedata2_mac_check_mode {
-	SZEDATA2_MAC_CHMODE_PROMISC       = 0x0,
-	SZEDATA2_MAC_CHMODE_ONLY_VALID    = 0x1,
-	SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
-	SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
-};
-
-/*
- * Maximum possible number of MAC addresses (limited by IBUF status
- * register value MAC_COUNT which has 5 bits).
- */
-#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
-
-/*
- * Structure describes IBUF address space
- */
-struct szedata2_ibuf {
-	/** Total Received Frames Counter low part */
-	uint32_t trfcl; /**< 0x00 */
-	/** Correct Frames Counter low part */
-	uint32_t cfcl; /**< 0x04 */
-	/** Discarded Frames Counter low part */
-	uint32_t dfcl; /**< 0x08 */
-	/** Counter of frames discarded due to buffer overflow low part */
-	uint32_t bodfcl; /**< 0x0C */
-	/** Total Received Frames Counter high part */
-	uint32_t trfch; /**< 0x10 */
-	/** Correct Frames Counter high part */
-	uint32_t cfch; /**< 0x14 */
-	/** Discarded Frames Counter high part */
-	uint32_t dfch; /**< 0x18 */
-	/** Counter of frames discarded due to buffer overflow high part */
-	uint32_t bodfch; /**< 0x1C */
-	/** IBUF enable register */
-	uint32_t ibuf_en; /**< 0x20 */
-	/** Error mask register */
-	uint32_t err_mask; /**< 0x24 */
-	/** IBUF status register */
-	uint32_t ibuf_st; /**< 0x28 */
-	/** IBUF command register */
-	uint32_t ibuf_cmd; /**< 0x2C */
-	/** Minimum frame length allowed */
-	uint32_t mfla; /**< 0x30 */
-	/** Frame MTU */
-	uint32_t mtu; /**< 0x34 */
-	/** MAC address check mode */
-	uint32_t mac_chmode; /**< 0x38 */
-	/** Octets Received OK Counter low part */
-	uint32_t orocl; /**< 0x3C */
-	/** Octets Received OK Counter high part */
-	uint32_t oroch; /**< 0x40 */
-	/** reserved */
-	uint8_t reserved[60]; /**< 0x4C */
-	/** IBUF memory for MAC addresses */
-	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
-} __rte_packed;
-
-/*
- * @return
- *     true if IBUF is enabled
- *     false if IBUF is disabled
- */
-static inline bool
-ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
-{
-	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
-}
-
-/*
- * Enables IBUF.
- */
-static inline void
-ibuf_enable(volatile struct szedata2_ibuf *ibuf)
-{
-	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
-}
-
-/*
- * Disables IBUF.
- */
-static inline void
-ibuf_disable(volatile struct szedata2_ibuf *ibuf)
-{
-	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
-			&ibuf->ibuf_en);
-}
-
-/*
- * @return
- *     true if ibuf link is up
- *     false if ibuf link is down
- */
-static inline bool
-ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
-{
-	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
-}
-
-/*
- * @return
- *     MAC address check mode
- */
-static inline enum szedata2_mac_check_mode
-ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
-{
-	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
-	case 0x0:
-		return SZEDATA2_MAC_CHMODE_PROMISC;
-	case 0x1:
-		return SZEDATA2_MAC_CHMODE_ONLY_VALID;
-	case 0x2:
-		return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
-	case 0x3:
-		return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
-	default:
-		return SZEDATA2_MAC_CHMODE_PROMISC;
-	}
-}
-
-/*
- * Writes "mode" in MAC address check mode register.
- */
-static inline void
-ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
-		enum szedata2_mac_check_mode mode)
-{
-	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
-			&ibuf->mac_chmode);
-}
-
-/*
- * Structure describes OBUF address space
- */
-struct szedata2_obuf {
-	/** Total Sent Frames Counter low part */
-	uint32_t tsfcl; /**< 0x00 */
-	/** Octets Sent Counter low part */
-	uint32_t oscl; /**< 0x04 */
-	/** Total Discarded Frames Counter low part */
-	uint32_t tdfcl; /**< 0x08 */
-	/** reserved */
-	uint32_t reserved1; /**< 0x0C */
-	/** Total Sent Frames Counter high part */
-	uint32_t tsfch; /**< 0x10 */
-	/** Octets Sent Counter high part */
-	uint32_t osch; /**< 0x14 */
-	/** Total Discarded Frames Counter high part */
-	uint32_t tdfch; /**< 0x18 */
-	/** reserved */
-	uint32_t reserved2; /**< 0x1C */
-	/** OBUF enable register */
-	uint32_t obuf_en; /**< 0x20 */
-	/** reserved */
-	uint64_t reserved3; /**< 0x24 */
-	/** OBUF control register */
-	uint32_t ctrl; /**< 0x2C */
-	/** OBUF status register */
-	uint32_t obuf_st; /**< 0x30 */
-} __rte_packed;
-
-/*
- * @return
- *     true if OBUF is enabled
- *     false if OBUF is disabled
- */
-static inline bool
-obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
-{
-	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
-}
-
-/*
- * Enables OBUF.
- */
-static inline void
-obuf_enable(volatile struct szedata2_obuf *obuf)
-{
-	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
-}
-
-/*
- * Disables OBUF.
- */
-static inline void
-obuf_disable(volatile struct szedata2_obuf *obuf)
-{
-	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
-			&obuf->obuf_en);
-}
-
-#endif
+#endif /* RTE_PMD_SZEDATA2_H_ */
diff --git a/drivers/net/szedata2/szedata2_iobuf.h b/drivers/net/szedata2/szedata2_iobuf.h
index 3ae4367..f1ccb3b 100644
--- a/drivers/net/szedata2/szedata2_iobuf.h
+++ b/drivers/net/szedata2/szedata2_iobuf.h
@@ -35,7 +35,10 @@
 #define _SZEDATA2_IOBUF_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 
+#include <rte_byteorder.h>
+#include <rte_io.h>
 #include <rte_dev.h>
 
 /* IBUF offsets from the beginning of the PCI resource address space. */
@@ -46,6 +49,20 @@
 extern const uint32_t szedata2_obuf_base_table[];
 extern const uint32_t szedata2_obuf_count;
 
+enum szedata2_link_speed {
+	SZEDATA2_LINK_SPEED_DEFAULT = 0,
+	SZEDATA2_LINK_SPEED_10G,
+	SZEDATA2_LINK_SPEED_40G,
+	SZEDATA2_LINK_SPEED_100G,
+};
+
+enum szedata2_mac_check_mode {
+	SZEDATA2_MAC_CHMODE_PROMISC       = 0x0,
+	SZEDATA2_MAC_CHMODE_ONLY_VALID    = 0x1,
+	SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
+	SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
+};
+
 /**
  * Macro takes pointer to pci resource structure (rsc)
  * and returns pointer to mapped resource memory at
@@ -55,6 +72,114 @@
 	((type)(((uint8_t *)(rsc)->addr) + (offset)))
 
 /**
+ * Maximum possible number of MAC addresses (limited by IBUF status
+ * register value MAC_COUNT which has 5 bits).
+ */
+#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
+
+/**
+ * Structure describes IBUF address space.
+ */
+struct szedata2_ibuf {
+	/** Total Received Frames Counter low part */
+	uint32_t trfcl; /**< 0x00 */
+	/** Correct Frames Counter low part */
+	uint32_t cfcl; /**< 0x04 */
+	/** Discarded Frames Counter low part */
+	uint32_t dfcl; /**< 0x08 */
+	/** Counter of frames discarded due to buffer overflow low part */
+	uint32_t bodfcl; /**< 0x0C */
+	/** Total Received Frames Counter high part */
+	uint32_t trfch; /**< 0x10 */
+	/** Correct Frames Counter high part */
+	uint32_t cfch; /**< 0x14 */
+	/** Discarded Frames Counter high part */
+	uint32_t dfch; /**< 0x18 */
+	/** Counter of frames discarded due to buffer overflow high part */
+	uint32_t bodfch; /**< 0x1C */
+	/** IBUF enable register */
+	uint32_t ibuf_en; /**< 0x20 */
+	/** Error mask register */
+	uint32_t err_mask; /**< 0x24 */
+	/** IBUF status register */
+	uint32_t ibuf_st; /**< 0x28 */
+	/** IBUF command register */
+	uint32_t ibuf_cmd; /**< 0x2C */
+	/** Minimum frame length allowed */
+	uint32_t mfla; /**< 0x30 */
+	/** Frame MTU */
+	uint32_t mtu; /**< 0x34 */
+	/** MAC address check mode */
+	uint32_t mac_chmode; /**< 0x38 */
+	/** Octets Received OK Counter low part */
+	uint32_t orocl; /**< 0x3C */
+	/** Octets Received OK Counter high part */
+	uint32_t oroch; /**< 0x40 */
+	/** reserved */
+	uint8_t reserved[60]; /**< 0x4C */
+	/** IBUF memory for MAC addresses */
+	uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
+} __rte_packed;
+
+/**
+ * Structure describes OBUF address space.
+ */
+struct szedata2_obuf {
+	/** Total Sent Frames Counter low part */
+	uint32_t tsfcl; /**< 0x00 */
+	/** Octets Sent Counter low part */
+	uint32_t oscl; /**< 0x04 */
+	/** Total Discarded Frames Counter low part */
+	uint32_t tdfcl; /**< 0x08 */
+	/** reserved */
+	uint32_t reserved1; /**< 0x0C */
+	/** Total Sent Frames Counter high part */
+	uint32_t tsfch; /**< 0x10 */
+	/** Octets Sent Counter high part */
+	uint32_t osch; /**< 0x14 */
+	/** Total Discarded Frames Counter high part */
+	uint32_t tdfch; /**< 0x18 */
+	/** reserved */
+	uint32_t reserved2; /**< 0x1C */
+	/** OBUF enable register */
+	uint32_t obuf_en; /**< 0x20 */
+	/** reserved */
+	uint64_t reserved3; /**< 0x24 */
+	/** OBUF control register */
+	uint32_t ctrl; /**< 0x2C */
+	/** OBUF status register */
+	uint32_t obuf_st; /**< 0x30 */
+} __rte_packed;
+
+/**
+ * Wrapper for reading 4 bytes from device memory in correct endianness.
+ *
+ * @param addr
+ *     Address for reading.
+ * @return
+ *     4 B value.
+ */
+static inline uint32_t
+szedata2_read32(const volatile void *addr)
+{
+	return rte_le_to_cpu_32(rte_read32(addr));
+}
+
+/**
+ * Wrapper for writing 4 bytes to device memory in correct endianness.
+ *
+ * @param value
+ *     Value to write.
+ * @param addr
+ *     Address for writing.
+ */
+static inline void
+szedata2_write32(uint32_t value, volatile void *addr)
+{
+	rte_write32(rte_cpu_to_le_32(value), addr);
+}
+
+/**
  * Get pointer to IBUF structure according to specified index.
  *
  * @param rsc
@@ -92,4 +217,140 @@
 		struct szedata2_obuf *);
 }
 
+/**
+ * Checks if IBUF is enabled.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     true if IBUF is enabled.
+ *     false if IBUF is disabled.
+ */
+static inline bool
+ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
+{
+	return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
+}
+
+/**
+ * Enables IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ */
+static inline void
+ibuf_enable(volatile struct szedata2_ibuf *ibuf)
+{
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
+}
+
+/**
+ * Disables IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ */
+static inline void
+ibuf_disable(volatile struct szedata2_ibuf *ibuf)
+{
+	szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
+			&ibuf->ibuf_en);
+}
+
+/**
+ * Checks if link is up.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     true if ibuf link is up.
+ *     false if ibuf link is down.
+ */
+static inline bool
+ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
+{
+	return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
+}
+
+/**
+ * Get current MAC address check mode from IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @return
+ *     MAC address check mode constant.
+ */
+static inline enum szedata2_mac_check_mode
+ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
+{
+	switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
+	case 0x0:
+		return SZEDATA2_MAC_CHMODE_PROMISC;
+	case 0x1:
+		return SZEDATA2_MAC_CHMODE_ONLY_VALID;
+	case 0x2:
+		return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
+	case 0x3:
+		return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
+	default:
+		return SZEDATA2_MAC_CHMODE_PROMISC;
+	}
+}
+
+/**
+ * Writes mode in MAC address check mode register in IBUF.
+ *
+ * @param ibuf
+ *     Pointer to IBUF structure.
+ * @param mode
+ *     MAC address check mode to set.
+ */
+static inline void
+ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
+		enum szedata2_mac_check_mode mode)
+{
+	szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
+			&ibuf->mac_chmode);
+}
+
+/**
+ * Checks if obuf is enabled.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ * @return
+ *     true if OBUF is enabled.
+ *     false if OBUF is disabled.
+ */
+static inline bool
+obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
+{
+	return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
+}
+
+/**
+ * Enables OBUF.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ */
+static inline void
+obuf_enable(volatile struct szedata2_obuf *obuf)
+{
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
+}
+
+/**
+ * Disables OBUF.
+ *
+ * @param obuf
+ *     Pointer to OBUF structure.
+ */
+static inline void
+obuf_disable(volatile struct szedata2_obuf *obuf)
+{
+	szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
+			&obuf->obuf_en);
+}
+
 #endif /* _SZEDATA2_IOBUF_H_ */
-- 
1.8.4

[PATCH v2 5/5] net/szedata2: add more supported firmwares

[Matej Vido]

Add IBUF and OBUF offsets definitions for new firmwares.

Signed-off-by: Matej Vido <vido@cesnet.cz>
---
v2:
  Added release note.
  Added description of AS = 5 in comment and in documentation.

 config/common_base                     |   8 +-
 doc/guides/nics/szedata2.rst           |  32 +++++--
 doc/guides/rel_notes/release_17_08.rst |   4 +
 drivers/net/szedata2/szedata2_iobuf.c  | 150 +++++++++++++++++++++++++++++++--
 4 files changed, 174 insertions(+), 20 deletions(-)

diff --git a/config/common_base b/config/common_base
index 0e0b732..f6aafd1 100644
--- a/config/common_base
+++ b/config/common_base
@@ -276,12 +276,8 @@ CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
 CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
 #
 # Defines firmware type address space.
-# RTE_LIBRTE_PMD_SZEDATA2_AS can be:
-# 0 - for firmwares:
-#         NIC_100G1_LR4
-#         HANIC_100G1_LR4
-#         HANIC_100G1_SR10
-# Other values raise compile time error
+# See documentation for supported values.
+# Other values raise compile time error.
 CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
 
 #
diff --git a/doc/guides/nics/szedata2.rst b/doc/guides/nics/szedata2.rst
index 60080a9..1a5d413 100644
--- a/doc/guides/nics/szedata2.rst
+++ b/doc/guides/nics/szedata2.rst
@@ -91,14 +91,34 @@ These configuration options can be modified before compilation in the
 
 *  ``CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS`` default value: **0**
 
-   This option defines type of firmware address space.
-   Currently supported value is:
+   This option defines type of firmware address space and must be set
+   according to the used card and mode.
+   Currently supported values are:
 
-   * **0** for firmwares:
+   * **0** - for cards (modes):
 
-      * NIC_100G1_LR4
-      * HANIC_100G1_LR4
-      * HANIC_100G1_SR10
+      * NFB-100G1 (100G1)
+
+   * **1** - for cards (modes):
+
+      * NFB-100G2Q (100G1)
+
+   * **2** - for cards (modes):
+
+      * NFB-40G2 (40G2)
+      * NFB-100G2C (100G2)
+      * NFB-100G2Q (40G2)
+
+   * **3** - for cards (modes):
+
+      * NFB-40G2 (10G8)
+      * NFB-100G2Q (10G8)
+
+   * **4** - for cards (modes):
+
+      * NFB-100G1 (10G10)
+
+   * **5** - for experimental firmwares and future use
 
 Using the SZEDATA2 PMD
 ----------------------
diff --git a/doc/guides/rel_notes/release_17_08.rst b/doc/guides/rel_notes/release_17_08.rst
index eb31da2..842f46f 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -71,6 +71,10 @@ New Features
   Rx queues can be armed with an interrupt which will trigger on the
   next packet arrival.
 
+* **Updated szedata2 PMD.**
+
+  Added support for firmwares with multiple Ethernet ports per physical port.
+
 
 Resolved Issues
 ---------------
diff --git a/drivers/net/szedata2/szedata2_iobuf.c b/drivers/net/szedata2/szedata2_iobuf.c
index 2d25e65..3b9a71f 100644
--- a/drivers/net/szedata2/szedata2_iobuf.c
+++ b/drivers/net/szedata2/szedata2_iobuf.c
@@ -39,21 +39,41 @@
 
 /*
  * IBUFs and OBUFs can generally be located at different offsets in different
- * firmwares.
- * This part defines base offsets of IBUFs and OBUFs through various firmwares.
- * Currently one firmware type is supported.
- * Type of firmware is set through configuration option
+ * firmwares (modes).
+ * This part defines base offsets of IBUFs and OBUFs for various cards
+ * and firmwares (modes).
+ * Type of firmware (mode) is set through configuration option
  * CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS.
  * Possible values are:
- * 0 - for firmwares:
- *     NIC_100G1_LR4
- *     HANIC_100G1_LR4
- *     HANIC_100G1_SR10
+ * 0 - for cards (modes):
+ *     NFB-100G1 (100G1)
+ *
+ * 1 - for cards (modes):
+ *     NFB-100G2Q (100G1)
+ *
+ * 2 - for cards (modes):
+ *     NFB-40G2 (40G2)
+ *     NFB-100G2C (100G2)
+ *     NFB-100G2Q (40G2)
+ *
+ * 3 - for cards (modes):
+ *     NFB-40G2 (10G8)
+ *     NFB-100G2Q (10G8)
+ *
+ * 4 - for cards (modes):
+ *     NFB-100G1 (10G10)
+ *
+ * 5 - for experimental firmwares and future use
  */
 #if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
 #elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
 
+/*
+ * Cards (modes):
+ *     NFB-100G1 (100G1)
+ */
+
 const uint32_t szedata2_ibuf_base_table[] = {
 	0x8000
 };
@@ -61,6 +81,120 @@
 	0x9000
 };
 
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 1
+
+/*
+ * Cards (modes):
+ *     NFB-100G2Q (100G1)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9800
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 2
+
+/*
+ * Cards (modes):
+ *     NFB-40G2 (40G2)
+ *     NFB-100G2C (100G2)
+ *     NFB-100G2Q (40G2)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9800
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 3
+
+/*
+ * Cards (modes):
+ *     NFB-40G2 (10G8)
+ *     NFB-100G2Q (10G8)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800,
+	0x8A00,
+	0x8C00,
+	0x8E00
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9200,
+	0x9400,
+	0x9600,
+	0x9800,
+	0x9A00,
+	0x9C00,
+	0x9E00
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 4
+
+/*
+ * Cards (modes):
+ *     NFB-100G1 (10G10)
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800,
+	0x8A00,
+	0x8C00,
+	0x8E00,
+	0x9000,
+	0x9200
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0xA000,
+	0xA200,
+	0xA400,
+	0xA600,
+	0xA800,
+	0xAA00,
+	0xAC00,
+	0xAE00,
+	0xB000,
+	0xB200
+};
+
+#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
+
+/*
+ * Future use and experimental firmwares.
+ */
+
+const uint32_t szedata2_ibuf_base_table[] = {
+	0x8000,
+	0x8200,
+	0x8400,
+	0x8600,
+	0x8800
+};
+const uint32_t szedata2_obuf_base_table[] = {
+	0x9000,
+	0x9200,
+	0x9400,
+	0x9600,
+	0x9800
+};
+
 #else
 #error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
 #endif
-- 
1.8.4

Re: [PATCH v2 1/5] net/szedata2: refactor ibuf and obuf names

[Ferruh Yigit]

On 6/12/2017 1:03 PM, Matej Vido wrote:
> Prefix "cgmii" is removed because it is too specific.
> There are different ibuf/obuf modules in different firmwares
> but the address space definition is the same.
> This patch makes the name general.
> 
> Signed-off-by: Matej Vido <vido@cesnet.cz>

Series applied to dpdk-next-net/master, thanks.