From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 11 Jul 2018 10:55:35 +0200 Subject: [U-Boot] SoCFPGA PL330 DMA driver and ECC scrubbing In-Reply-To: References: <73d4ce24-2b78-d27c-1dbf-ebef00e9689b@gmail.com> <93c4b5bd-ea97-f97b-e044-6a40b5099cdb@denx.de> <4c001307-e555-b085-9982-4a6e0f8fb669@gmail.com> <57651474-ac6c-b5d2-e675-1d01de30dbca@denx.de> <277351bc-f902-826b-f9f3-f00f380b1e81@denx.de> <1aecf0e6-56f1-9254-25d8-5d45c5c9be59@gmail.com> <5dceaad3-353e-b015-0871-93986f3ebc5d@denx.de> <9db37c5e-abf9-cbbf-0e6b-b269dfcd6528@gmail.com> <04312468-3dcc-3fa4-3e70-2fcc07e1051e@denx.de> <8523e998-9ae2-e713-60ec-6d740ab0d3c4@gmail.com> <7d7d8558-98f2-c0df-02ad-a38727e61d71@gmail.com> <5a6e8f4a-01b7-634f-2cca-79a4f11f91ff@gmail.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 07/11/2018 05:11 AM, Jason Rush wrote: [...] >>>>> However, if I press the HPS_RST push button on the SoCKit (which is connected >>>>> to power on reset), occasionally U-Boot will lock up while booting.  It always >>>>> boots and operates correctly from the initial power on, but it almost always >>>>> fails to boot after pressing the HPS_RST button. >>>>> >>>>> Usually after pressing the HPS_RST button, U-Boot makes it past the SPL, and >>>>> hangs somewhere after the call to setup_reloc() in ./common/board_f.c.  Once >>>>> it hangs there, pressing the HPS_RST button again usually causes the SPL to >>>>> hang while setting up the MMU (before my call to memset).  Eventually the >>>>> WDT kicks in, and it just keeps hanging up in the same place.  Once it gets in >>>>> this mode, the only way to recover it is by toggling power on the board. >>>>> >>>>> I spent a bunch of time today trying to track down where it was hanging, but >>>>> I couldn't pin point anything.  The MMU tables looked correct.  The MMU >>>>> registers looked good.  I'm not sure the best way to debug what's going on. >>>> Try triggering warm reset and cold reset via the reset register: >>>> >>>> mw 0xffd05004 1 >>>> mw 0xffd05004 2 >>>> >>>> Does it hang in one case and not in the other ? >>>> >>> It hangs in both cases. >>> >>> I did find that if I do not metset the last 1MiB of DRAM with the cache on, >>> both warm and cold resets work. >>> >>> I changed the ecc scrubbing to zero out the first 0x8000 bytes and the last >>> 0x10000 bytes before the MMU is setup and I enable dcache.  Then with >>> the dcache enabled, I zero out the rest of memory.  The resets work in this >>> case as well.  So there seems to be some side effect of clearing out the >>> relocate address space with the cache on. >> Can you investigate ? >> > I'd be happy to investigate more, but I'm not really sure what > my next step should be. > > Something appears to be happening differently when U-Boot > relocates if the dcache is on.  But don't know how to track it > down. IIRC I disabled cache after scrubbing. > I was thinking I might dump the DRAM where U-Boot relocates > to both with the dcache on and off, and see if there are any > differences.  I'm not really sure what that tells me though if I > find a difference. > > Any suggestions? > > Regards, > Jason > -- Best regards, Marek Vasut