All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/1] amd_iommu: fix device entry invalidation
@ 2021-06-01 14:10 Roman Kapl
  2021-06-01 14:27 ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 2+ messages in thread
From: Roman Kapl @ 2021-06-01 14:10 UTC (permalink / raw)
  Cc: Eduardo Habkost, Michael S. Tsirkin, Roman Kapl,
	Richard Henderson, qemu-devel, Paolo Bonzini

Since QEMU maintains TLB entries keyed by the device ID, there is no separate
device entry cache. This means we need to invalidate all translations keyed by
the device ID.

Signed-off-by: Roman Kapl <rka@sysgo.com>
---
 hw/i386/amd_iommu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 2801dff97c..62d22b220b 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -356,6 +356,7 @@ static void amdvi_update_iotlb(AMDVIState *s, uint16_t devid,
         }
 
         entry->domid = domid;
+        entry->devid = devid;
         entry->perms = to_cache.perm;
         entry->translated_addr = to_cache.translated_addr;
         entry->page_mask = to_cache.addr_mask;
@@ -399,6 +400,8 @@ static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
         amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
                                    s->cmdbuf + s->cmdbuf_head);
     }
+    g_hash_table_foreach_remove(s->iotlb, amdvi_iotlb_remove_by_devid,
+                                &devid);
     trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
                              PCI_FUNC(devid));
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 1/1] amd_iommu: fix device entry invalidation
  2021-06-01 14:10 [PATCH 1/1] amd_iommu: fix device entry invalidation Roman Kapl
@ 2021-06-01 14:27 ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 2+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-06-01 14:27 UTC (permalink / raw)
  To: Roman Kapl
  Cc: qemu-devel, Paolo Bonzini, Richard Henderson, Eduardo Habkost,
	Michael S. Tsirkin

On 6/1/21 4:10 PM, Roman Kapl wrote:
> Since QEMU maintains TLB entries keyed by the device ID, there is no separate
> device entry cache. This means we need to invalidate all translations keyed by
> the device ID.
> 

Fixes: d29a09ca684 ("hw/i386: Introduce AMD IOMMU") ?

> Signed-off-by: Roman Kapl <rka@sysgo.com>
> ---
>  hw/i386/amd_iommu.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 2801dff97c..62d22b220b 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -356,6 +356,7 @@ static void amdvi_update_iotlb(AMDVIState *s, uint16_t devid,
>          }
>  
>          entry->domid = domid;
> +        entry->devid = devid;
>          entry->perms = to_cache.perm;
>          entry->translated_addr = to_cache.translated_addr;
>          entry->page_mask = to_cache.addr_mask;
> @@ -399,6 +400,8 @@ static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
>          amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
>                                     s->cmdbuf + s->cmdbuf_head);
>      }
> +    g_hash_table_foreach_remove(s->iotlb, amdvi_iotlb_remove_by_devid,
> +                                &devid);
>      trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
>                               PCI_FUNC(devid));
>  }
> 



^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-06-01 14:31 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-01 14:10 [PATCH 1/1] amd_iommu: fix device entry invalidation Roman Kapl
2021-06-01 14:27 ` Philippe Mathieu-Daudé

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.