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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function
Date: Mon, 4 Sep 2017 11:40:20 +0200	[thread overview]
Message-ID: <d93dca07-ec6b-3295-4eb9-a0fd4e4f9a6b@denx.de> (raw)
In-Reply-To: <1504509063.7727.76.camel@intel.com>

On 09/04/2017 09:11 AM, Chee, Tien Fong wrote:
> On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
>> On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
>>>>
>>>> On 08/29/2017 12:45 PM, tien.fong.chee at intel.com wrote:
>>>>>
>>>>>
>>>>> From: Tien Fong Chee <tien.fong.chee@intel.com>
>>>>>
>>>>> Add function for both multiple DRAM bank and single DRAM bank
>>>>> size
>>>>> initialization. This common functionality could be used by
>>>>> every
>>>>> single
>>>>> SOCFPGA board.
>>>>>
>>>>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
>>>>> ---
>>>>>  arch/arm/mach-socfpga/board.c    |   12 ++++++++++++
>>>>>  include/configs/socfpga_common.h |    1 +
>>>>>  2 files changed, 13 insertions(+), 0 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
>>>>> socfpga/board.c
>>>>> index a41d089..3f2e30a 100644
>>>>> --- a/arch/arm/mach-socfpga/board.c
>>>>> +++ b/arch/arm/mach-socfpga/board.c
>>>>> @@ -29,6 +29,18 @@ int board_init(void)
>>>>>  	return 0;
>>>>>  }
>>>>>  
>>>>> +int dram_init_banksize(void)
>>>>> +{
>>>>> +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
>>>>> !defined(CONFIG_SYS_SDRAM_SIZE)
>>>>> +	fdtdec_setup_memory_banksize();
>>>> This should work on al boards, so why do you need this macro ?
>>>> Also, this should go into arch/arm/ , not board/
>>>>
>>> In case these macros are not defined, then we need to get the info
>>> from
>>> DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
>>> arch/arm, and other in board/ .
>> Every socfpga platform in u-boot has a dts, so you can always extract
>> the memory config from it and it's the preferred method.
>>
> This implementation supports both method, from header or DTS.

We want to support only the DT method, so drop the other one.

-- 
Best regards,
Marek Vasut

  reply	other threads:[~2017-09-04  9:40 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-29 10:45 [U-Boot] [PATCH 00/19] Add FPGA, SDRAM drivers and booting to U-boot tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 01/19] configs: Add FPGA loadfs config for Arria 10 tien.fong.chee at intel.com
2017-08-29 11:51   ` Marek Vasut
2017-08-30  5:59     ` Chee, Tien Fong
2017-08-30  8:45       ` Marek Vasut
2017-09-04  5:29         ` Chee, Tien Fong
2017-08-29 10:45 ` [U-Boot] [PATCH 02/19] configs: Add FAT fs support for SPL tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA tien.fong.chee at intel.com
2017-08-29 11:55   ` Marek Vasut
2017-08-30  8:05     ` Chee, Tien Fong
2017-08-30  8:52       ` Marek Vasut
2017-09-04  7:08         ` Chee, Tien Fong
2017-09-04  9:39           ` Marek Vasut
2017-09-05  5:53             ` Chee, Tien Fong
2017-09-05  9:04               ` Marek Vasut
2017-09-05  9:23                 ` Chee, Tien Fong
2017-09-05  9:36                   ` Marek Vasut
2017-09-06  5:06                     ` Chee, Tien Fong
2017-09-06  7:10                       ` Marek Vasut
2017-09-06  7:15                         ` Chee, Tien Fong
2017-08-29 10:45 ` [U-Boot] [PATCH 04/19] arm: socfpga: Add FPGA loadfs command support tien.fong.chee at intel.com
2017-08-29 11:57   ` Marek Vasut
2017-08-30  8:18     ` Chee, Tien Fong
2017-08-30  8:54       ` Marek Vasut
2017-08-29 10:45 ` [U-Boot] [PATCH 05/19] arm: socfpga: Enhance FPGA program support with at least 4 byte data tien.fong.chee at intel.com
2017-08-29 11:58   ` Marek Vasut
2017-08-30  8:24     ` Chee, Tien Fong
2017-08-30  8:55       ` Marek Vasut
2017-09-04  7:09         ` Chee, Tien Fong
2017-08-29 10:45 ` [U-Boot] [PATCH 06/19] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-08-29 11:59   ` Marek Vasut
2017-08-30  8:26     ` Chee, Tien Fong
2017-08-29 10:45 ` [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-08-29 11:59   ` Marek Vasut
2017-08-30  8:36     ` Chee, Tien Fong
2017-08-30  8:56       ` Marek Vasut
2017-09-04  7:11         ` Chee, Tien Fong
2017-09-04  9:40           ` Marek Vasut [this message]
2017-09-05  3:54             ` Chee, Tien Fong
2017-08-29 10:45 ` [U-Boot] [PATCH 08/19] arm: socfpga: Add COMPAT macro for Network on Chip(NoC) tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 09/19] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 10/19] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 11/19] arm: socfpga: Enable build for DDR " tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 12/19] doc: dtbinding: Add Intel Arria 10 SoCFPGA chosen binding tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 13/19] dts: Add the FPGA design file name to DTS tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 14/19] dts: Add device storage and partition " tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 15/19] arm: socfpga: Add support to memory allocation in SPL tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-08-29 10:45 ` [U-Boot] [PATCH 17/19] arm: socfpga: Adding clock frequency info for U-boot tien.fong.chee at intel.com
2017-08-29 10:46 ` [U-Boot] [PATCH 18/19] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot tien.fong.chee at intel.com
2017-08-29 10:46 ` [U-Boot] [PATCH 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot tien.fong.chee at intel.com

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