From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CD5DC433E6 for ; Wed, 17 Mar 2021 09:26:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBCA664F67 for ; Wed, 17 Mar 2021 09:26:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229745AbhCQJ0V (ORCPT ); Wed, 17 Mar 2021 05:26:21 -0400 Received: from lizzard.sbs.de ([194.138.37.39]:45725 "EHLO lizzard.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229751AbhCQJ0E (ORCPT ); Wed, 17 Mar 2021 05:26:04 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by lizzard.sbs.de (8.15.2/8.15.2) with ESMTPS id 12H9PcBs027629 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 17 Mar 2021 10:25:38 +0100 Received: from [167.87.41.130] ([167.87.41.130]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 12H9KaQL031246; Wed, 17 Mar 2021 10:20:36 +0100 Subject: Re: [PATCH 2/3] KVM: x86: guest debug: don't inject interrupts while single stepping To: Sean Christopherson Cc: Maxim Levitsky , kvm list , Vitaly Kuznetsov , LKML , Thomas Gleixner , Wanpeng Li , Kieran Bingham , Jessica Yu , Andrew Morton , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Joerg Roedel , Jim Mattson , Borislav Petkov , Stefano Garzarella , "H. Peter Anvin" , Paolo Bonzini , Ingo Molnar References: <1259724f-1bdb-6229-2772-3192f6d17a4a@siemens.com> <71ae8b75c30fd0f87e760216ad310ddf72d31c7b.camel@redhat.com> <2a44c302-744e-2794-59f6-c921b895726d@siemens.com> <1d27b215a488f8b8fc175e97c5ab973cc811922d.camel@redhat.com> <727e5ef1-f771-1301-88d6-d76f05540b01@siemens.com> <31c0bba9-0399-1f15-a59b-a8f035e366e8@siemens.com> From: Jan Kiszka Message-ID: Date: Wed, 17 Mar 2021 10:20:36 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16.03.21 18:26, Sean Christopherson wrote: > On Tue, Mar 16, 2021, Jan Kiszka wrote: >> On 16.03.21 17:50, Sean Christopherson wrote: >>> Rather than block all events in KVM, what about having QEMU "pause" the timer? >>> E.g. save MSR_TSC_DEADLINE and APIC_TMICT (or inspect the guest to find out >>> which flavor it's using), clear them to zero, then restore both when >>> single-stepping is disabled. I think that will work? >>> >> >> No one can stop the clock, and timers are only one source of interrupts. >> Plus they do not all come from QEMU, some also from KVM or in-kernel >> sources directly. > > But are any other sources of interrupts a chronic problem? I 100% agree that If you are debugging a problem, you are not interested in seening problems of the debugger, only real ones of your target. IOW: Yes, they are, even if less likely - for idle VMs. > this would not be a robust solution, but neither is blocking events in KVM. At > least with this approach, the blast radius is somewhat contained. > >> Would quickly become a mess. > > Maybe, but it'd be Qemu's mess ;-) > Nope, it would spread to KVM as well, as indicated above. Jan -- Siemens AG, T RDA IOT Corporate Competence Center Embedded Linux