From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.4 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04D4BC433E0 for ; Thu, 31 Dec 2020 15:52:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C46B22080C for ; Thu, 31 Dec 2020 15:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727275AbgLaPwF (ORCPT ); Thu, 31 Dec 2020 10:52:05 -0500 Received: from [115.28.160.31] ([115.28.160.31]:35126 "EHLO mailbox.box.xen0n.name" rhost-flags-FAIL-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1726949AbgLaPwE (ORCPT ); Thu, 31 Dec 2020 10:52:04 -0500 X-Greylist: delayed 458 seconds by postgrey-1.27 at vger.kernel.org; Thu, 31 Dec 2020 10:52:04 EST Received: from [192.168.9.172] (unknown [101.224.80.228]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 9D7D46055B; Thu, 31 Dec 2020 23:43:52 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=xen0n.name; s=mail; t=1609429432; bh=B3l951PoCELSmDmy9JRHTJi8RD9bCtC5i1o2HvaeKf0=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=O6kiwj0u2KBO6lq530bnd+F5T+DzWbY1FEeyneBxcDXv/rQJ/IXT+3IGkLKrVoY87 6AqONuZW3WkS/qBK9zwhw8xvIt+sO8mYv6WLJSniWB7IGeUFVPtD4aQc2tNSS8NoVT rw6LEdAZu9oPloQ4xkVT/dhQ1ITB7lbH5VoEHuVc= Message-ID: Date: Thu, 31 Dec 2020 23:43:51 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:85.0) Gecko/20100101 Thunderbird/85.0a1 Subject: Re: [PATCH 3/3] MIPS: cpu-probe: Vulnerabilities for Loongson cores Content-Language: en-US To: Jiaxun Yang , linux-mips@vger.kernel.org Cc: Thomas Bogendoerfer , Alexey Malahov , Serge Semin , =?UTF-8?B?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= , Paul Cercueil , Tiezhu Yang , Huacai Chen , YunQiang Su , Liangliang Huang , linux-kernel@vger.kernel.org References: <20201230032314.10042-1-jiaxun.yang@flygoat.com> <20201230032314.10042-3-jiaxun.yang@flygoat.com> From: WANG Xuerui In-Reply-To: <20201230032314.10042-3-jiaxun.yang@flygoat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jiaxun, On 12/30/20 11:23 AM, Jiaxun Yang wrote: > Loongson64C is known to be vulnerable to meltdown according to > PoC from Rui Wang . > > Loongson64G defended these side-channel attack by silicon. "Loongson64G mitigated it in hardware"? > > Signed-off-by: Jiaxun Yang > --- > arch/mips/kernel/cpu-probe.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > index 2460783dbdb1..24b21f51353c 100644 > --- a/arch/mips/kernel/cpu-probe.c > +++ b/arch/mips/kernel/cpu-probe.c > @@ -2092,6 +2092,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) > c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | > MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2); > c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */ > + c->vulnerabilities |= MIPS_VULNBL_MELTDOWN; > + c->vulnerable |= MIPS_VULNBL_MELTDOWN; > break; > case PRID_IMP_LOONGSON_64G: > c->cputype = CPU_LOONGSON64; > @@ -2100,6 +2102,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) > set_isa(c, MIPS_CPU_ISA_M64R2); > decode_cpucfg(c); > c->writecombine = _CACHE_UNCACHED_ACCELERATED; > + c->vulnerabilities |= MIPS_VULNBL_MELTDOWN | > + MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2; Of course you forgot to set the "mitigated" mask... Oh wait. It seems the "mitigated" mask in the 1st patch is never used, so either code there or here must be amended. > break; > default: > panic("Unknown Loongson Processor ID!");