From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com ([192.55.52.43]:5084 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750762AbdA1E50 (ORCPT ); Fri, 27 Jan 2017 23:57:26 -0500 Subject: Re: [PATCH 1/4] drm/i915/gen9+: Enable hotplug detection early To: Imre Deak , intel-gfx@lists.freedesktop.org References: <1485509961-9010-1-git-send-email-imre.deak@intel.com> <1485509961-9010-2-git-send-email-imre.deak@intel.com> Cc: Jani Nikula , =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= , Daniel Vetter , stable@vger.kernel.org From: "Sharma, Shashank" Message-ID: Date: Sat, 28 Jan 2017 10:24:19 +0530 MIME-Version: 1.0 In-Reply-To: <1485509961-9010-2-git-send-email-imre.deak@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: Regards Shashank On 1/27/2017 3:09 PM, Imre Deak wrote: > For LSPCON resume time initialization we need to sample the > corresponding pin's HPD level, but this is only available when HPD > detection is enabled. Currently we enable detection only when enabling > HPD interrupts which is too late, so bring the enabling of detection > earlier. > > This is needed by the next patch. > > Cc: Shashank Sharma > Cc: Jani Nikula > Cc: Ville Syrjälä > Cc: Daniel Vetter > Cc: # v4.9+ > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/i915_irq.c | 71 +++++++++++++++++++++++++++++------------ > 1 file changed, 51 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 8440d8b..6daf522 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -3142,24 +3142,33 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv) > I915_WRITE(PCH_PORT_HOTPLUG, hotplug); > } > > +static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv) > +{ > + u32 hotplug; > + > + /* Enable digital hotplug on the PCH */ > + hotplug = I915_READ(PCH_PORT_HOTPLUG); > + hotplug |= PORTA_HOTPLUG_ENABLE | > + PORTB_HOTPLUG_ENABLE | > + PORTC_HOTPLUG_ENABLE | > + PORTD_HOTPLUG_ENABLE; > + I915_WRITE(PCH_PORT_HOTPLUG, hotplug); > + > + hotplug = I915_READ(PCH_PORT_HOTPLUG2); > + hotplug |= PORTE_HOTPLUG_ENABLE; > + I915_WRITE(PCH_PORT_HOTPLUG2, hotplug); > +} > + > static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv) > { > - u32 hotplug_irqs, hotplug, enabled_irqs; > + u32 hotplug_irqs, enabled_irqs; > > hotplug_irqs = SDE_HOTPLUG_MASK_SPT; > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_spt); > > ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); > > - /* Enable digital hotplug on the PCH */ > - hotplug = I915_READ(PCH_PORT_HOTPLUG); > - hotplug |= PORTD_HOTPLUG_ENABLE | PORTC_HOTPLUG_ENABLE | > - PORTB_HOTPLUG_ENABLE | PORTA_HOTPLUG_ENABLE; > - I915_WRITE(PCH_PORT_HOTPLUG, hotplug); > - > - hotplug = I915_READ(PCH_PORT_HOTPLUG2); > - hotplug |= PORTE_HOTPLUG_ENABLE; > - I915_WRITE(PCH_PORT_HOTPLUG2, hotplug); > + spt_hpd_detection_setup(dev_priv); > } > > static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv) > @@ -3196,18 +3205,15 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv) > ibx_hpd_irq_setup(dev_priv); > } > > -static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) > +static void __bxt_hpd_detection_setup(struct drm_i915_private *dev_priv, > + u32 enabled_irqs) > { > - u32 hotplug_irqs, hotplug, enabled_irqs; > - > - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bxt); > - hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK; > - > - bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs); > + u32 hotplug; > > hotplug = I915_READ(PCH_PORT_HOTPLUG); > - hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE | > - PORTA_HOTPLUG_ENABLE; > + hotplug |= PORTA_HOTPLUG_ENABLE | > + PORTB_HOTPLUG_ENABLE | > + PORTC_HOTPLUG_ENABLE; > > DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x\n", > hotplug, enabled_irqs); > @@ -3217,7 +3223,6 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) > * For BXT invert bit has to be set based on AOB design > * for HPD detection logic, update it based on VBT fields. > */ > - > if ((enabled_irqs & BXT_DE_PORT_HP_DDIA) && > intel_bios_is_port_hpd_inverted(dev_priv, PORT_A)) > hotplug |= BXT_DDIA_HPD_INVERT; > @@ -3231,6 +3236,23 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) > I915_WRITE(PCH_PORT_HOTPLUG, hotplug); > } > > +static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv) > +{ > + __bxt_hpd_detection_setup(dev_priv, BXT_DE_PORT_HOTPLUG_MASK); Do we need another layer of internal function ? Why cant the content of __bxt_hpd_detection_setup be here, just like spd_hpd_detection_setup, as they both are static to the file ? > +} > + > +static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) > +{ > + u32 hotplug_irqs, enabled_irqs; > + > + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bxt); > + hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK; > + > + bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs); > + > + __bxt_hpd_detection_setup(dev_priv, enabled_irqs); > +} > + > static void ibx_irq_postinstall(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -3246,6 +3268,12 @@ static void ibx_irq_postinstall(struct drm_device *dev) > > gen5_assert_iir_is_zero(dev_priv, SDEIIR); > I915_WRITE(SDEIMR, ~mask); > + > + if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv) || > + HAS_PCH_LPT(dev_priv)) > + ; /* TODO: Enable HPD detection on older PCH platforms too */ > + else > + spt_hpd_detection_setup(dev_priv); > } > > static void gen5_gt_irq_postinstall(struct drm_device *dev) > @@ -3457,6 +3485,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) > > GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables); > GEN5_IRQ_INIT(GEN8_DE_MISC_, ~de_misc_masked, de_misc_masked); > + > + if (IS_GEN9_LP(dev_priv)) I have not done the delta analysis between hotplug interrupts, but this will be true for GLK too. Should we bother ? - Shashank > + bxt_hpd_detection_setup(dev_priv); > } > > static int gen8_irq_postinstall(struct drm_device *dev) From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Sharma, Shashank" Subject: Re: [PATCH 1/4] drm/i915/gen9+: Enable hotplug detection early Date: Sat, 28 Jan 2017 10:24:19 +0530 Message-ID: References: <1485509961-9010-1-git-send-email-imre.deak@intel.com> <1485509961-9010-2-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id F22A76E025 for ; Sat, 28 Jan 2017 04:54:23 +0000 (UTC) In-Reply-To: <1485509961-9010-2-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak , intel-gfx@lists.freedesktop.org Cc: Daniel Vetter , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org UmVnYXJkcwoKU2hhc2hhbmsKCgpPbiAxLzI3LzIwMTcgMzowOSBQTSwgSW1yZSBEZWFrIHdyb3Rl Ogo+IEZvciBMU1BDT04gcmVzdW1lIHRpbWUgaW5pdGlhbGl6YXRpb24gd2UgbmVlZCB0byBzYW1w bGUgdGhlCj4gY29ycmVzcG9uZGluZyBwaW4ncyBIUEQgbGV2ZWwsIGJ1dCB0aGlzIGlzIG9ubHkg YXZhaWxhYmxlIHdoZW4gSFBECj4gZGV0ZWN0aW9uIGlzIGVuYWJsZWQuIEN1cnJlbnRseSB3ZSBl bmFibGUgZGV0ZWN0aW9uIG9ubHkgd2hlbiBlbmFibGluZwo+IEhQRCBpbnRlcnJ1cHRzIHdoaWNo IGlzIHRvbyBsYXRlLCBzbyBicmluZyB0aGUgZW5hYmxpbmcgb2YgZGV0ZWN0aW9uCj4gZWFybGll ci4KPgo+IFRoaXMgaXMgbmVlZGVkIGJ5IHRoZSBuZXh0IHBhdGNoLgo+Cj4gQ2M6IFNoYXNoYW5r IFNoYXJtYSA8c2hhc2hhbmsuc2hhcm1hQGludGVsLmNvbT4KPiBDYzogSmFuaSBOaWt1bGEgPGph bmkubmlrdWxhQGxpbnV4LmludGVsLmNvbT4KPiBDYzogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5z eXJqYWxhQGxpbnV4LmludGVsLmNvbT4KPiBDYzogRGFuaWVsIFZldHRlciA8ZGFuaWVsLnZldHRl ckBmZndsbC5jaD4KPiBDYzogPHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmc+ICMgdjQuOSsKPiBTaWdu ZWQtb2ZmLWJ5OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Cj4gLS0tCj4gICBkcml2 ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2lycS5jIHwgNzEgKysrKysrKysrKysrKysrKysrKysrKysr KysrKystLS0tLS0tLS0tLS0KPiAgIDEgZmlsZSBjaGFuZ2VkLCA1MSBpbnNlcnRpb25zKCspLCAy MCBkZWxldGlvbnMoLSkKPgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1 X2lycS5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYwo+IGluZGV4IDg0NDBkOGIu LjZkYWY1MjIgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYwo+ ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfaXJxLmMKPiBAQCAtMzE0MiwyNCArMzE0 MiwzMyBAQCBzdGF0aWMgdm9pZCBpYnhfaHBkX2lycV9zZXR1cChzdHJ1Y3QgZHJtX2k5MTVfcHJp dmF0ZSAqZGV2X3ByaXYpCj4gICAJSTkxNV9XUklURShQQ0hfUE9SVF9IT1RQTFVHLCBob3RwbHVn KTsKPiAgIH0KPiAgIAo+ICtzdGF0aWMgdm9pZCBzcHRfaHBkX2RldGVjdGlvbl9zZXR1cChzdHJ1 Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gK3sKPiArCXUzMiBob3RwbHVnOwo+ICsK PiArCS8qIEVuYWJsZSBkaWdpdGFsIGhvdHBsdWcgb24gdGhlIFBDSCAqLwo+ICsJaG90cGx1ZyA9 IEk5MTVfUkVBRChQQ0hfUE9SVF9IT1RQTFVHKTsKPiArCWhvdHBsdWcgfD0gUE9SVEFfSE9UUExV R19FTkFCTEUgfAo+ICsJCSAgIFBPUlRCX0hPVFBMVUdfRU5BQkxFIHwKPiArCQkgICBQT1JUQ19I T1RQTFVHX0VOQUJMRSB8Cj4gKwkJICAgUE9SVERfSE9UUExVR19FTkFCTEU7Cj4gKwlJOTE1X1dS SVRFKFBDSF9QT1JUX0hPVFBMVUcsIGhvdHBsdWcpOwo+ICsKPiArCWhvdHBsdWcgPSBJOTE1X1JF QUQoUENIX1BPUlRfSE9UUExVRzIpOwo+ICsJaG90cGx1ZyB8PSBQT1JURV9IT1RQTFVHX0VOQUJM RTsKPiArCUk5MTVfV1JJVEUoUENIX1BPUlRfSE9UUExVRzIsIGhvdHBsdWcpOwo+ICt9Cj4gKwo+ ICAgc3RhdGljIHZvaWQgc3B0X2hwZF9pcnFfc2V0dXAoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUg KmRldl9wcml2KQo+ICAgewo+IC0JdTMyIGhvdHBsdWdfaXJxcywgaG90cGx1ZywgZW5hYmxlZF9p cnFzOwo+ICsJdTMyIGhvdHBsdWdfaXJxcywgZW5hYmxlZF9pcnFzOwo+ICAgCj4gICAJaG90cGx1 Z19pcnFzID0gU0RFX0hPVFBMVUdfTUFTS19TUFQ7Cj4gICAJZW5hYmxlZF9pcnFzID0gaW50ZWxf aHBkX2VuYWJsZWRfaXJxcyhkZXZfcHJpdiwgaHBkX3NwdCk7Cj4gICAKPiAgIAlpYnhfZGlzcGxh eV9pbnRlcnJ1cHRfdXBkYXRlKGRldl9wcml2LCBob3RwbHVnX2lycXMsIGVuYWJsZWRfaXJxcyk7 Cj4gICAKPiAtCS8qIEVuYWJsZSBkaWdpdGFsIGhvdHBsdWcgb24gdGhlIFBDSCAqLwo+IC0JaG90 cGx1ZyA9IEk5MTVfUkVBRChQQ0hfUE9SVF9IT1RQTFVHKTsKPiAtCWhvdHBsdWcgfD0gUE9SVERf SE9UUExVR19FTkFCTEUgfCBQT1JUQ19IT1RQTFVHX0VOQUJMRSB8Cj4gLQkJUE9SVEJfSE9UUExV R19FTkFCTEUgfCBQT1JUQV9IT1RQTFVHX0VOQUJMRTsKPiAtCUk5MTVfV1JJVEUoUENIX1BPUlRf SE9UUExVRywgaG90cGx1Zyk7Cj4gLQo+IC0JaG90cGx1ZyA9IEk5MTVfUkVBRChQQ0hfUE9SVF9I T1RQTFVHMik7Cj4gLQlob3RwbHVnIHw9IFBPUlRFX0hPVFBMVUdfRU5BQkxFOwo+IC0JSTkxNV9X UklURShQQ0hfUE9SVF9IT1RQTFVHMiwgaG90cGx1Zyk7Cj4gKwlzcHRfaHBkX2RldGVjdGlvbl9z ZXR1cChkZXZfcHJpdik7Cj4gICB9Cj4gICAKPiAgIHN0YXRpYyB2b2lkIGlsa19ocGRfaXJxX3Nl dHVwKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdikKPiBAQCAtMzE5NiwxOCArMzIw NSwxNSBAQCBzdGF0aWMgdm9pZCBpbGtfaHBkX2lycV9zZXR1cChzdHJ1Y3QgZHJtX2k5MTVfcHJp dmF0ZSAqZGV2X3ByaXYpCj4gICAJaWJ4X2hwZF9pcnFfc2V0dXAoZGV2X3ByaXYpOwo+ICAgfQo+ ICAgCj4gLXN0YXRpYyB2b2lkIGJ4dF9ocGRfaXJxX3NldHVwKHN0cnVjdCBkcm1faTkxNV9wcml2 YXRlICpkZXZfcHJpdikKPiArc3RhdGljIHZvaWQgX19ieHRfaHBkX2RldGVjdGlvbl9zZXR1cChz dHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYsCj4gKwkJCQkJICAgICB1MzIgZW5hYmxl ZF9pcnFzKQo+ICAgewo+IC0JdTMyIGhvdHBsdWdfaXJxcywgaG90cGx1ZywgZW5hYmxlZF9pcnFz Owo+IC0KPiAtCWVuYWJsZWRfaXJxcyA9IGludGVsX2hwZF9lbmFibGVkX2lycXMoZGV2X3ByaXYs IGhwZF9ieHQpOwo+IC0JaG90cGx1Z19pcnFzID0gQlhUX0RFX1BPUlRfSE9UUExVR19NQVNLOwo+ IC0KPiAtCWJkd191cGRhdGVfcG9ydF9pcnEoZGV2X3ByaXYsIGhvdHBsdWdfaXJxcywgZW5hYmxl ZF9pcnFzKTsKPiArCXUzMiBob3RwbHVnOwo+ICAgCj4gICAJaG90cGx1ZyA9IEk5MTVfUkVBRChQ Q0hfUE9SVF9IT1RQTFVHKTsKPiAtCWhvdHBsdWcgfD0gUE9SVENfSE9UUExVR19FTkFCTEUgfCBQ T1JUQl9IT1RQTFVHX0VOQUJMRSB8Cj4gLQkJUE9SVEFfSE9UUExVR19FTkFCTEU7Cj4gKwlob3Rw bHVnIHw9IFBPUlRBX0hPVFBMVUdfRU5BQkxFIHwKPiArCQkgICBQT1JUQl9IT1RQTFVHX0VOQUJM RSB8Cj4gKwkJICAgUE9SVENfSE9UUExVR19FTkFCTEU7Cj4gICAKPiAgIAlEUk1fREVCVUdfS01T KCJJbnZlcnQgYml0IHNldHRpbmc6IGhwX2N0bDoleCBocF9wb3J0OiV4XG4iLAo+ICAgCQkgICAg ICBob3RwbHVnLCBlbmFibGVkX2lycXMpOwo+IEBAIC0zMjE3LDcgKzMyMjMsNiBAQCBzdGF0aWMg dm9pZCBieHRfaHBkX2lycV9zZXR1cChzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYp Cj4gICAJICogRm9yIEJYVCBpbnZlcnQgYml0IGhhcyB0byBiZSBzZXQgYmFzZWQgb24gQU9CIGRl c2lnbgo+ICAgCSAqIGZvciBIUEQgZGV0ZWN0aW9uIGxvZ2ljLCB1cGRhdGUgaXQgYmFzZWQgb24g VkJUIGZpZWxkcy4KPiAgIAkgKi8KPiAtCj4gICAJaWYgKChlbmFibGVkX2lycXMgJiBCWFRfREVf UE9SVF9IUF9ERElBKSAmJgo+ICAgCSAgICBpbnRlbF9iaW9zX2lzX3BvcnRfaHBkX2ludmVydGVk KGRldl9wcml2LCBQT1JUX0EpKQo+ICAgCQlob3RwbHVnIHw9IEJYVF9ERElBX0hQRF9JTlZFUlQ7 Cj4gQEAgLTMyMzEsNiArMzIzNiwyMyBAQCBzdGF0aWMgdm9pZCBieHRfaHBkX2lycV9zZXR1cChz dHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gICAJSTkxNV9XUklURShQQ0hfUE9S VF9IT1RQTFVHLCBob3RwbHVnKTsKPiAgIH0KPiAgIAo+ICtzdGF0aWMgdm9pZCBieHRfaHBkX2Rl dGVjdGlvbl9zZXR1cChzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gK3sKPiAr CV9fYnh0X2hwZF9kZXRlY3Rpb25fc2V0dXAoZGV2X3ByaXYsIEJYVF9ERV9QT1JUX0hPVFBMVUdf TUFTSyk7CkRvIHdlIG5lZWQgYW5vdGhlciBsYXllciBvZiBpbnRlcm5hbCBmdW5jdGlvbiA/IFdo eSBjYW50IHRoZSBjb250ZW50IG9mIApfX2J4dF9ocGRfZGV0ZWN0aW9uX3NldHVwIGJlIGhlcmUs IGp1c3QKbGlrZSBzcGRfaHBkX2RldGVjdGlvbl9zZXR1cCwgYXMgdGhleSBib3RoIGFyZSBzdGF0 aWMgdG8gdGhlIGZpbGUgPwo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBieHRfaHBkX2lycV9zZXR1 cChzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gK3sKPiArCXUzMiBob3RwbHVn X2lycXMsIGVuYWJsZWRfaXJxczsKPiArCj4gKwllbmFibGVkX2lycXMgPSBpbnRlbF9ocGRfZW5h YmxlZF9pcnFzKGRldl9wcml2LCBocGRfYnh0KTsKPiArCWhvdHBsdWdfaXJxcyA9IEJYVF9ERV9Q T1JUX0hPVFBMVUdfTUFTSzsKPiArCj4gKwliZHdfdXBkYXRlX3BvcnRfaXJxKGRldl9wcml2LCBo b3RwbHVnX2lycXMsIGVuYWJsZWRfaXJxcyk7Cj4gKwo+ICsJX19ieHRfaHBkX2RldGVjdGlvbl9z ZXR1cChkZXZfcHJpdiwgZW5hYmxlZF9pcnFzKTsKPiArfQo+ICsKPiAgIHN0YXRpYyB2b2lkIGli eF9pcnFfcG9zdGluc3RhbGwoc3RydWN0IGRybV9kZXZpY2UgKmRldikKPiAgIHsKPiAgIAlzdHJ1 Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYgPSB0b19pOTE1KGRldik7Cj4gQEAgLTMyNDYs NiArMzI2OCwxMiBAQCBzdGF0aWMgdm9pZCBpYnhfaXJxX3Bvc3RpbnN0YWxsKHN0cnVjdCBkcm1f ZGV2aWNlICpkZXYpCj4gICAKPiAgIAlnZW41X2Fzc2VydF9paXJfaXNfemVybyhkZXZfcHJpdiwg U0RFSUlSKTsKPiAgIAlJOTE1X1dSSVRFKFNERUlNUiwgfm1hc2spOwo+ICsKPiArCWlmIChIQVNf UENIX0lCWChkZXZfcHJpdikgfHwgSEFTX1BDSF9DUFQoZGV2X3ByaXYpIHx8Cj4gKwkgICAgSEFT X1BDSF9MUFQoZGV2X3ByaXYpKQo+ICsJCTsgLyogVE9ETzogRW5hYmxlIEhQRCBkZXRlY3Rpb24g b24gb2xkZXIgUENIIHBsYXRmb3JtcyB0b28gKi8KPiArCWVsc2UKPiArCQlzcHRfaHBkX2RldGVj dGlvbl9zZXR1cChkZXZfcHJpdik7Cj4gICB9Cj4gICAKPiAgIHN0YXRpYyB2b2lkIGdlbjVfZ3Rf aXJxX3Bvc3RpbnN0YWxsKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCj4gQEAgLTM0NTcsNiArMzQ4 NSw5IEBAIHN0YXRpYyB2b2lkIGdlbjhfZGVfaXJxX3Bvc3RpbnN0YWxsKHN0cnVjdCBkcm1faTkx NV9wcml2YXRlICpkZXZfcHJpdikKPiAgIAo+ICAgCUdFTjVfSVJRX0lOSVQoR0VOOF9ERV9QT1JU XywgfmRlX3BvcnRfbWFza2VkLCBkZV9wb3J0X2VuYWJsZXMpOwo+ICAgCUdFTjVfSVJRX0lOSVQo R0VOOF9ERV9NSVNDXywgfmRlX21pc2NfbWFza2VkLCBkZV9taXNjX21hc2tlZCk7Cj4gKwo+ICsJ aWYgKElTX0dFTjlfTFAoZGV2X3ByaXYpKQpJIGhhdmUgbm90IGRvbmUgdGhlIGRlbHRhIGFuYWx5 c2lzIGJldHdlZW4gaG90cGx1ZyBpbnRlcnJ1cHRzLCBidXQgdGhpcyAKd2lsbCBiZSB0cnVlIGZv ciBHTEsgdG9vLgpTaG91bGQgd2UgYm90aGVyID8KCi0gU2hhc2hhbmsKPiArCQlieHRfaHBkX2Rl dGVjdGlvbl9zZXR1cChkZXZfcHJpdik7Cj4gICB9Cj4gICAKPiAgIHN0YXRpYyBpbnQgZ2VuOF9p cnFfcG9zdGluc3RhbGwoc3RydWN0IGRybV9kZXZpY2UgKmRldikKCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50 ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9y Zy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=