From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF87DC05027 for ; Thu, 9 Feb 2023 07:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229754AbjBIHrd (ORCPT ); Thu, 9 Feb 2023 02:47:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229788AbjBIHr1 (ORCPT ); Thu, 9 Feb 2023 02:47:27 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29D7F29437 for ; Wed, 8 Feb 2023 23:47:22 -0800 (PST) Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[127.0.0.1]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1pQ1dS-0004fZ-Fe; Thu, 09 Feb 2023 08:46:26 +0100 Message-ID: Date: Thu, 9 Feb 2023 08:46:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [Linux-stm32] [PATCH v3 6/6] ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards Content-Language: en-US To: Gatien Chevallier , Oleksii_Moisieiev@epam.com, gregkh@linuxfoundation.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, alexandre.torgue@foss.st.com, vkoul@kernel.org, jic23@kernel.org, olivier.moysan@foss.st.com, arnaud.pouliquen@foss.st.com, mchehab@kernel.org, fabrice.gasnier@foss.st.com, ulf.hansson@linaro.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-iio@vger.kernel.org, netdev@vger.kernel.org, linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-phy@lists.infradead.org, linux-crypto@vger.kernel.org, linux-serial@vger.kernel.org, dmaengine@vger.kernel.org, linux-media@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-7-gatien.chevallier@foss.st.com> From: Ahmad Fatoum In-Reply-To: <20230127164040.1047583-7-gatien.chevallier@foss.st.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: a.fatoum@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: dmaengine@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Hello Gatien, On 27.01.23 17:40, Gatien Chevallier wrote: > The STM32 System Bus is an internal bus on which devices are connected. > ETZPC is a peripheral overseeing the firewall bus that configures > and control access to the peripherals connected on it. > > For more information on which peripheral is securable, please read > the STM32MP13 reference manual. Diff is way too big. Please split up the alphabetic reordering into its own commit, so actual functional changes are apparent. Thanks, Ahmad > > Signed-off-by: Gatien Chevallier > --- > > No changes in V2. > > Changes in V3: > -Use appriopriate node name: bus > > arch/arm/boot/dts/stm32mp131.dtsi | 407 +++++++++++++++-------------- > arch/arm/boot/dts/stm32mp133.dtsi | 51 ++-- > arch/arm/boot/dts/stm32mp13xc.dtsi | 19 +- > arch/arm/boot/dts/stm32mp13xf.dtsi | 18 +- > 4 files changed, 258 insertions(+), 237 deletions(-) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index accc3824f7e9..24462a647101 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -253,148 +253,6 @@ dmamux1: dma-router@48002000 { > dma-channels = <16>; > }; > > - adc_2: adc@48004000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48004000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC2>, <&rcc ADC2_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - status = "disabled"; > - > - adc2: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_2>; > - interrupts = <0>; > - dmas = <&dmamux1 10 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@13 { > - reg = <13>; > - label = "vrefint"; > - }; > - channel@14 { > - reg = <14>; > - label = "vddcore"; > - }; > - channel@16 { > - reg = <16>; > - label = "vddcpu"; > - }; > - channel@17 { > - reg = <17>; > - label = "vddq_ddr"; > - }; > - }; > - }; > - > - usbotg_hs: usb@49000000 { > - compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > - reg = <0x49000000 0x40000>; > - clocks = <&rcc USBO_K>; > - clock-names = "otg"; > - resets = <&rcc USBO_R>; > - reset-names = "dwc2"; > - interrupts = ; > - g-rx-fifo-size = <512>; > - g-np-tx-fifo-size = <32>; > - g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > - dr_mode = "otg"; > - otg-rev = <0x200>; > - usb33d-supply = <&usb33>; > - status = "disabled"; > - }; > - > - spi4: spi@4c002000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c002000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI4_K>; > - resets = <&rcc SPI4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 83 0x400 0x01>, > - <&dmamux1 84 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - spi5: spi@4c003000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c003000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI5_K>; > - resets = <&rcc SPI5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 85 0x400 0x01>, > - <&dmamux1 86 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - i2c3: i2c@4c004000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c004000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C3_K>; > - resets = <&rcc I2C3_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 73 0x400 0x1>, > - <&dmamux1 74 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x4>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c4: i2c@4c005000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c005000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C4_K>; > - resets = <&rcc I2C4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 75 0x400 0x1>, > - <&dmamux1 76 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x8>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c5: i2c@4c006000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c006000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C5_K>; > - resets = <&rcc I2C5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 115 0x400 0x1>, > - <&dmamux1 116 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x10>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > rcc: rcc@50000000 { > compatible = "st,stm32mp13-rcc", "syscon"; > reg = <0x50000000 0x1000>; > @@ -431,34 +289,6 @@ mdma: dma-controller@58000000 { > dma-requests = <48>; > }; > > - sdmmc1: mmc@58005000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC1_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC1_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > - sdmmc2: mmc@58007000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC2_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC2_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > usbh_ohci: usb@5800c000 { > compatible = "generic-ohci"; > reg = <0x5800c000 0x1000>; > @@ -486,29 +316,6 @@ iwdg2: watchdog@5a002000 { > status = "disabled"; > }; > > - usbphyc: usbphyc@5a006000 { > - #address-cells = <1>; > - #size-cells = <0>; > - #clock-cells = <0>; > - compatible = "st,stm32mp1-usbphyc"; > - reg = <0x5a006000 0x1000>; > - clocks = <&rcc USBPHY_K>; > - resets = <&rcc USBPHY_R>; > - vdda1v1-supply = <®11>; > - vdda1v8-supply = <®18>; > - status = "disabled"; > - > - usbphyc_port0: usb-phy@0 { > - #phy-cells = <0>; > - reg = <0>; > - }; > - > - usbphyc_port1: usb-phy@1 { > - #phy-cells = <1>; > - reg = <1>; > - }; > - }; > - > rtc: rtc@5c004000 { > compatible = "st,stm32mp1-rtc"; > reg = <0x5c004000 0x400>; > @@ -536,6 +343,220 @@ ts_cal2: calib@5e { > }; > }; > > + etzpc: bus@5c007000 { > + compatible = "st,stm32mp13-sys-bus"; > + reg = <0x5c007000 0x400>; > + #address-cells = <1>; > + #size-cells = <1>; > + feature-domain-controller; > + #feature-domain-cells = <1>; > + ranges; > + > + adc_2: adc@48004000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48004000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC2>, <&rcc ADC2_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 33>; > + status = "disabled"; > + > + adc2: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_2>; > + interrupts = <0>; > + dmas = <&dmamux1 10 0x400 0x80000001>; > + dma-names = "rx"; > + status = "disabled"; > + > + channel@13 { > + reg = <13>; > + label = "vrefint"; > + }; > + channel@14 { > + reg = <14>; > + label = "vddcore"; > + }; > + channel@16 { > + reg = <16>; > + label = "vddcpu"; > + }; > + channel@17 { > + reg = <17>; > + label = "vddq_ddr"; > + }; > + }; > + }; > + > + usbotg_hs: usb@49000000 { > + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > + reg = <0x49000000 0x40000>; > + clocks = <&rcc USBO_K>; > + clock-names = "otg"; > + resets = <&rcc USBO_R>; > + reset-names = "dwc2"; > + interrupts = ; > + g-rx-fifo-size = <512>; > + g-np-tx-fifo-size = <32>; > + g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > + dr_mode = "otg"; > + otg-rev = <0x200>; > + usb33d-supply = <&usb33>; > + feature-domains = <&etzpc 34>; > + status = "disabled"; > + }; > + > + spi4: spi@4c002000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c002000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI4_K>; > + resets = <&rcc SPI4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 83 0x400 0x01>, > + <&dmamux1 84 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 18>; > + status = "disabled"; > + }; > + > + spi5: spi@4c003000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c003000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI5_K>; > + resets = <&rcc SPI5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 85 0x400 0x01>, > + <&dmamux1 86 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 19>; > + status = "disabled"; > + }; > + > + i2c3: i2c@4c004000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c004000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C3_K>; > + resets = <&rcc I2C3_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 73 0x400 0x1>, > + <&dmamux1 74 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x4>; > + i2c-analog-filter; > + feature-domains = <&etzpc 20>; > + status = "disabled"; > + }; > + > + i2c4: i2c@4c005000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c005000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C4_K>; > + resets = <&rcc I2C4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 75 0x400 0x1>, > + <&dmamux1 76 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x8>; > + i2c-analog-filter; > + feature-domains = <&etzpc 21>; > + status = "disabled"; > + }; > + > + i2c5: i2c@4c006000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c006000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C5_K>; > + resets = <&rcc I2C5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 115 0x400 0x1>, > + <&dmamux1 116 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x10>; > + i2c-analog-filter; > + feature-domains = <&etzpc 22>; > + status = "disabled"; > + }; > + > + sdmmc1: mmc@58005000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC1_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC1_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 50>; > + status = "disabled"; > + }; > + > + sdmmc2: mmc@58007000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC2_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC2_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 51>; > + status = "disabled"; > + }; > + > + usbphyc: usbphyc@5a006000 { > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <0>; > + compatible = "st,stm32mp1-usbphyc"; > + reg = <0x5a006000 0x1000>; > + clocks = <&rcc USBPHY_K>; > + resets = <&rcc USBPHY_R>; > + vdda1v1-supply = <®11>; > + vdda1v8-supply = <®18>; > + feature-domains = <&etzpc 5>; > + status = "disabled"; > + > + usbphyc_port0: usb-phy@0 { > + #phy-cells = <0>; > + reg = <0>; > + }; > + > + usbphyc_port1: usb-phy@1 { > + #phy-cells = <1>; > + reg = <1>; > + }; > + }; > + > + }; > + > /* > * Break node order to solve dependency probe issue between > * pinctrl and exti. > diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi > index df451c3c2a26..be6061552683 100644 > --- a/arch/arm/boot/dts/stm32mp133.dtsi > +++ b/arch/arm/boot/dts/stm32mp133.dtsi > @@ -33,35 +33,38 @@ m_can2: can@4400f000 { > bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; > status = "disabled"; > }; > + }; > +}; > > - adc_1: adc@48003000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48003000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC1>, <&rcc ADC1_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > +&etzpc { > + adc_1: adc@48003000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48003000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC1>, <&rcc ADC1_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 32>; > + status = "disabled"; > + > + adc1: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > #address-cells = <1>; > #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_1>; > + interrupts = <0>; > + dmas = <&dmamux1 9 0x400 0x80000001>; > + dma-names = "rx"; > status = "disabled"; > > - adc1: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_1>; > - interrupts = <0>; > - dmas = <&dmamux1 9 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@18 { > - reg = <18>; > - label = "vrefint"; > - }; > + channel@18 { > + reg = <18>; > + label = "vrefint"; > }; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xc.dtsi b/arch/arm/boot/dts/stm32mp13xc.dtsi > index 4d00e7592882..a1a7a40c2a3e 100644 > --- a/arch/arm/boot/dts/stm32mp13xc.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xc.dtsi > @@ -4,15 +4,14 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + feature-domains = <&etzpc 42>; > + status = "disabled"; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xf.dtsi b/arch/arm/boot/dts/stm32mp13xf.dtsi > index 4d00e7592882..b9fb071a1471 100644 > --- a/arch/arm/boot/dts/stm32mp13xf.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xf.dtsi > @@ -4,15 +4,13 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + status = "disabled"; > }; > }; -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD668C61DA4 for ; Thu, 9 Feb 2023 07:47:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Eh0Txxvc7ypygsgZq3j0I34S0fJc8uMMQD7cKBPwdWI=; b=kmE9VSp7IhQo9i r6E9Ka7l9pwp2hX7w8eYQUCFRv1di7B0uNf1nD6RQj70S5H55LXDORbDix006aUbh7/2vwJvsG3rn QzlxvIs7QZD2+yOXA8KeVYcG2VUPWW+0z6rZe2SqLOiVMPiFDsfLg/z8aJhdPaUUTthzv/vhxVyMT NSV4ckP+bNrrz9Sf6tTymckUkXdFA8VEn7sNiPdMSJsoDsN2Zw41fXPiL6fd+VxVZkzxuCsix5Mz4 BASoG8Bm/FpAYfybwh7KDe21dL1IOZo+y786Nk1P6+NoON3Li3zlVMi0HcFNKV85EVO/micSeboGB ueNP8CJ+uNOO6QNJs3tg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQ1eN-000S10-HF; Thu, 09 Feb 2023 07:47:23 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQ1eH-000Rvu-5d for linux-phy@lists.infradead.org; Thu, 09 Feb 2023 07:47:20 +0000 Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[127.0.0.1]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1pQ1dS-0004fZ-Fe; Thu, 09 Feb 2023 08:46:26 +0100 Message-ID: Date: Thu, 9 Feb 2023 08:46:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [Linux-stm32] [PATCH v3 6/6] ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards Content-Language: en-US To: Gatien Chevallier , Oleksii_Moisieiev@epam.com, gregkh@linuxfoundation.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, alexandre.torgue@foss.st.com, vkoul@kernel.org, jic23@kernel.org, olivier.moysan@foss.st.com, arnaud.pouliquen@foss.st.com, mchehab@kernel.org, fabrice.gasnier@foss.st.com, ulf.hansson@linaro.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-iio@vger.kernel.org, netdev@vger.kernel.org, linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-phy@lists.infradead.org, linux-crypto@vger.kernel.org, linux-serial@vger.kernel.org, dmaengine@vger.kernel.org, linux-media@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-7-gatien.chevallier@foss.st.com> From: Ahmad Fatoum In-Reply-To: <20230127164040.1047583-7-gatien.chevallier@foss.st.com> X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: a.fatoum@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-phy@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230208_234717_548752_35E3419E X-CRM114-Status: GOOD ( 17.11 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hello Gatien, On 27.01.23 17:40, Gatien Chevallier wrote: > The STM32 System Bus is an internal bus on which devices are connected. > ETZPC is a peripheral overseeing the firewall bus that configures > and control access to the peripherals connected on it. > > For more information on which peripheral is securable, please read > the STM32MP13 reference manual. Diff is way too big. Please split up the alphabetic reordering into its own commit, so actual functional changes are apparent. Thanks, Ahmad > > Signed-off-by: Gatien Chevallier > --- > > No changes in V2. > > Changes in V3: > -Use appriopriate node name: bus > > arch/arm/boot/dts/stm32mp131.dtsi | 407 +++++++++++++++-------------- > arch/arm/boot/dts/stm32mp133.dtsi | 51 ++-- > arch/arm/boot/dts/stm32mp13xc.dtsi | 19 +- > arch/arm/boot/dts/stm32mp13xf.dtsi | 18 +- > 4 files changed, 258 insertions(+), 237 deletions(-) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index accc3824f7e9..24462a647101 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -253,148 +253,6 @@ dmamux1: dma-router@48002000 { > dma-channels = <16>; > }; > > - adc_2: adc@48004000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48004000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC2>, <&rcc ADC2_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - status = "disabled"; > - > - adc2: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_2>; > - interrupts = <0>; > - dmas = <&dmamux1 10 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@13 { > - reg = <13>; > - label = "vrefint"; > - }; > - channel@14 { > - reg = <14>; > - label = "vddcore"; > - }; > - channel@16 { > - reg = <16>; > - label = "vddcpu"; > - }; > - channel@17 { > - reg = <17>; > - label = "vddq_ddr"; > - }; > - }; > - }; > - > - usbotg_hs: usb@49000000 { > - compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > - reg = <0x49000000 0x40000>; > - clocks = <&rcc USBO_K>; > - clock-names = "otg"; > - resets = <&rcc USBO_R>; > - reset-names = "dwc2"; > - interrupts = ; > - g-rx-fifo-size = <512>; > - g-np-tx-fifo-size = <32>; > - g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > - dr_mode = "otg"; > - otg-rev = <0x200>; > - usb33d-supply = <&usb33>; > - status = "disabled"; > - }; > - > - spi4: spi@4c002000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c002000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI4_K>; > - resets = <&rcc SPI4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 83 0x400 0x01>, > - <&dmamux1 84 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - spi5: spi@4c003000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c003000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI5_K>; > - resets = <&rcc SPI5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 85 0x400 0x01>, > - <&dmamux1 86 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - i2c3: i2c@4c004000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c004000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C3_K>; > - resets = <&rcc I2C3_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 73 0x400 0x1>, > - <&dmamux1 74 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x4>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c4: i2c@4c005000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c005000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C4_K>; > - resets = <&rcc I2C4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 75 0x400 0x1>, > - <&dmamux1 76 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x8>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c5: i2c@4c006000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c006000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C5_K>; > - resets = <&rcc I2C5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 115 0x400 0x1>, > - <&dmamux1 116 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x10>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > rcc: rcc@50000000 { > compatible = "st,stm32mp13-rcc", "syscon"; > reg = <0x50000000 0x1000>; > @@ -431,34 +289,6 @@ mdma: dma-controller@58000000 { > dma-requests = <48>; > }; > > - sdmmc1: mmc@58005000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC1_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC1_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > - sdmmc2: mmc@58007000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC2_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC2_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > usbh_ohci: usb@5800c000 { > compatible = "generic-ohci"; > reg = <0x5800c000 0x1000>; > @@ -486,29 +316,6 @@ iwdg2: watchdog@5a002000 { > status = "disabled"; > }; > > - usbphyc: usbphyc@5a006000 { > - #address-cells = <1>; > - #size-cells = <0>; > - #clock-cells = <0>; > - compatible = "st,stm32mp1-usbphyc"; > - reg = <0x5a006000 0x1000>; > - clocks = <&rcc USBPHY_K>; > - resets = <&rcc USBPHY_R>; > - vdda1v1-supply = <®11>; > - vdda1v8-supply = <®18>; > - status = "disabled"; > - > - usbphyc_port0: usb-phy@0 { > - #phy-cells = <0>; > - reg = <0>; > - }; > - > - usbphyc_port1: usb-phy@1 { > - #phy-cells = <1>; > - reg = <1>; > - }; > - }; > - > rtc: rtc@5c004000 { > compatible = "st,stm32mp1-rtc"; > reg = <0x5c004000 0x400>; > @@ -536,6 +343,220 @@ ts_cal2: calib@5e { > }; > }; > > + etzpc: bus@5c007000 { > + compatible = "st,stm32mp13-sys-bus"; > + reg = <0x5c007000 0x400>; > + #address-cells = <1>; > + #size-cells = <1>; > + feature-domain-controller; > + #feature-domain-cells = <1>; > + ranges; > + > + adc_2: adc@48004000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48004000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC2>, <&rcc ADC2_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 33>; > + status = "disabled"; > + > + adc2: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_2>; > + interrupts = <0>; > + dmas = <&dmamux1 10 0x400 0x80000001>; > + dma-names = "rx"; > + status = "disabled"; > + > + channel@13 { > + reg = <13>; > + label = "vrefint"; > + }; > + channel@14 { > + reg = <14>; > + label = "vddcore"; > + }; > + channel@16 { > + reg = <16>; > + label = "vddcpu"; > + }; > + channel@17 { > + reg = <17>; > + label = "vddq_ddr"; > + }; > + }; > + }; > + > + usbotg_hs: usb@49000000 { > + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > + reg = <0x49000000 0x40000>; > + clocks = <&rcc USBO_K>; > + clock-names = "otg"; > + resets = <&rcc USBO_R>; > + reset-names = "dwc2"; > + interrupts = ; > + g-rx-fifo-size = <512>; > + g-np-tx-fifo-size = <32>; > + g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > + dr_mode = "otg"; > + otg-rev = <0x200>; > + usb33d-supply = <&usb33>; > + feature-domains = <&etzpc 34>; > + status = "disabled"; > + }; > + > + spi4: spi@4c002000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c002000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI4_K>; > + resets = <&rcc SPI4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 83 0x400 0x01>, > + <&dmamux1 84 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 18>; > + status = "disabled"; > + }; > + > + spi5: spi@4c003000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c003000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI5_K>; > + resets = <&rcc SPI5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 85 0x400 0x01>, > + <&dmamux1 86 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 19>; > + status = "disabled"; > + }; > + > + i2c3: i2c@4c004000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c004000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C3_K>; > + resets = <&rcc I2C3_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 73 0x400 0x1>, > + <&dmamux1 74 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x4>; > + i2c-analog-filter; > + feature-domains = <&etzpc 20>; > + status = "disabled"; > + }; > + > + i2c4: i2c@4c005000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c005000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C4_K>; > + resets = <&rcc I2C4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 75 0x400 0x1>, > + <&dmamux1 76 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x8>; > + i2c-analog-filter; > + feature-domains = <&etzpc 21>; > + status = "disabled"; > + }; > + > + i2c5: i2c@4c006000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c006000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C5_K>; > + resets = <&rcc I2C5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 115 0x400 0x1>, > + <&dmamux1 116 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x10>; > + i2c-analog-filter; > + feature-domains = <&etzpc 22>; > + status = "disabled"; > + }; > + > + sdmmc1: mmc@58005000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC1_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC1_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 50>; > + status = "disabled"; > + }; > + > + sdmmc2: mmc@58007000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC2_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC2_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 51>; > + status = "disabled"; > + }; > + > + usbphyc: usbphyc@5a006000 { > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <0>; > + compatible = "st,stm32mp1-usbphyc"; > + reg = <0x5a006000 0x1000>; > + clocks = <&rcc USBPHY_K>; > + resets = <&rcc USBPHY_R>; > + vdda1v1-supply = <®11>; > + vdda1v8-supply = <®18>; > + feature-domains = <&etzpc 5>; > + status = "disabled"; > + > + usbphyc_port0: usb-phy@0 { > + #phy-cells = <0>; > + reg = <0>; > + }; > + > + usbphyc_port1: usb-phy@1 { > + #phy-cells = <1>; > + reg = <1>; > + }; > + }; > + > + }; > + > /* > * Break node order to solve dependency probe issue between > * pinctrl and exti. > diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi > index df451c3c2a26..be6061552683 100644 > --- a/arch/arm/boot/dts/stm32mp133.dtsi > +++ b/arch/arm/boot/dts/stm32mp133.dtsi > @@ -33,35 +33,38 @@ m_can2: can@4400f000 { > bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; > status = "disabled"; > }; > + }; > +}; > > - adc_1: adc@48003000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48003000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC1>, <&rcc ADC1_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > +&etzpc { > + adc_1: adc@48003000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48003000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC1>, <&rcc ADC1_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 32>; > + status = "disabled"; > + > + adc1: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > #address-cells = <1>; > #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_1>; > + interrupts = <0>; > + dmas = <&dmamux1 9 0x400 0x80000001>; > + dma-names = "rx"; > status = "disabled"; > > - adc1: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_1>; > - interrupts = <0>; > - dmas = <&dmamux1 9 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@18 { > - reg = <18>; > - label = "vrefint"; > - }; > + channel@18 { > + reg = <18>; > + label = "vrefint"; > }; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xc.dtsi b/arch/arm/boot/dts/stm32mp13xc.dtsi > index 4d00e7592882..a1a7a40c2a3e 100644 > --- a/arch/arm/boot/dts/stm32mp13xc.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xc.dtsi > @@ -4,15 +4,14 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + feature-domains = <&etzpc 42>; > + status = "disabled"; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xf.dtsi b/arch/arm/boot/dts/stm32mp13xf.dtsi > index 4d00e7592882..b9fb071a1471 100644 > --- a/arch/arm/boot/dts/stm32mp13xf.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xf.dtsi > @@ -4,15 +4,13 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + status = "disabled"; > }; > }; -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A773FC61DA4 for ; Thu, 9 Feb 2023 07:48:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dFoeFhoacvttNlSip5j+C/fJuyqWyD3qTZaOUrnTHLU=; b=34yrdQ5lG5aer0 DbWkfk/uzu9nLg6MuFOhP9w1ulSqZycP+3CvDXQCo3Ir18L1eB7nILYpLUrP2Di71NDgfyTNJG3yR PUu2k4BGKAmZGTSjG+qPLM/R6/HkE9nGkhMyus7bNodwxliuLDr4uCt+IwE/d/zQi9jTn7VK/6WXf QNLZcEyMhcys+Z2YQhShjZGYzUAM/0VjOEeGbMNlUgVibWd848h1SaaSxzp9CXOvhhHVZC66U0h5Z KWlQJKr68orpprtPUI/2kJqOSnMeRZgzee9mnBBqTRb4EbPSBKUsS8NnEijBSVoyLjiwXGBYNW0kp nmJE4t+qGKf6WoGD3/mw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQ1eZ-000S5M-1O; Thu, 09 Feb 2023 07:47:35 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQ1eU-000S3A-5E for linux-arm-kernel@lists.infradead.org; Thu, 09 Feb 2023 07:47:33 +0000 Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[127.0.0.1]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1pQ1dS-0004fZ-Fe; Thu, 09 Feb 2023 08:46:26 +0100 Message-ID: Date: Thu, 9 Feb 2023 08:46:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [Linux-stm32] [PATCH v3 6/6] ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards Content-Language: en-US To: Gatien Chevallier , Oleksii_Moisieiev@epam.com, gregkh@linuxfoundation.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, alexandre.torgue@foss.st.com, vkoul@kernel.org, jic23@kernel.org, olivier.moysan@foss.st.com, arnaud.pouliquen@foss.st.com, mchehab@kernel.org, fabrice.gasnier@foss.st.com, ulf.hansson@linaro.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-iio@vger.kernel.org, netdev@vger.kernel.org, linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-phy@lists.infradead.org, linux-crypto@vger.kernel.org, linux-serial@vger.kernel.org, dmaengine@vger.kernel.org, linux-media@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-7-gatien.chevallier@foss.st.com> From: Ahmad Fatoum In-Reply-To: <20230127164040.1047583-7-gatien.chevallier@foss.st.com> X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: a.fatoum@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230208_234730_540352_6C14124B X-CRM114-Status: GOOD ( 18.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Gatien, On 27.01.23 17:40, Gatien Chevallier wrote: > The STM32 System Bus is an internal bus on which devices are connected. > ETZPC is a peripheral overseeing the firewall bus that configures > and control access to the peripherals connected on it. > > For more information on which peripheral is securable, please read > the STM32MP13 reference manual. Diff is way too big. Please split up the alphabetic reordering into its own commit, so actual functional changes are apparent. Thanks, Ahmad > > Signed-off-by: Gatien Chevallier > --- > > No changes in V2. > > Changes in V3: > -Use appriopriate node name: bus > > arch/arm/boot/dts/stm32mp131.dtsi | 407 +++++++++++++++-------------- > arch/arm/boot/dts/stm32mp133.dtsi | 51 ++-- > arch/arm/boot/dts/stm32mp13xc.dtsi | 19 +- > arch/arm/boot/dts/stm32mp13xf.dtsi | 18 +- > 4 files changed, 258 insertions(+), 237 deletions(-) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index accc3824f7e9..24462a647101 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -253,148 +253,6 @@ dmamux1: dma-router@48002000 { > dma-channels = <16>; > }; > > - adc_2: adc@48004000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48004000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC2>, <&rcc ADC2_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - status = "disabled"; > - > - adc2: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_2>; > - interrupts = <0>; > - dmas = <&dmamux1 10 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@13 { > - reg = <13>; > - label = "vrefint"; > - }; > - channel@14 { > - reg = <14>; > - label = "vddcore"; > - }; > - channel@16 { > - reg = <16>; > - label = "vddcpu"; > - }; > - channel@17 { > - reg = <17>; > - label = "vddq_ddr"; > - }; > - }; > - }; > - > - usbotg_hs: usb@49000000 { > - compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > - reg = <0x49000000 0x40000>; > - clocks = <&rcc USBO_K>; > - clock-names = "otg"; > - resets = <&rcc USBO_R>; > - reset-names = "dwc2"; > - interrupts = ; > - g-rx-fifo-size = <512>; > - g-np-tx-fifo-size = <32>; > - g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > - dr_mode = "otg"; > - otg-rev = <0x200>; > - usb33d-supply = <&usb33>; > - status = "disabled"; > - }; > - > - spi4: spi@4c002000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c002000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI4_K>; > - resets = <&rcc SPI4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 83 0x400 0x01>, > - <&dmamux1 84 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - spi5: spi@4c003000 { > - compatible = "st,stm32h7-spi"; > - reg = <0x4c003000 0x400>; > - interrupts = ; > - clocks = <&rcc SPI5_K>; > - resets = <&rcc SPI5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 85 0x400 0x01>, > - <&dmamux1 86 0x400 0x01>; > - dma-names = "rx", "tx"; > - status = "disabled"; > - }; > - > - i2c3: i2c@4c004000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c004000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C3_K>; > - resets = <&rcc I2C3_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 73 0x400 0x1>, > - <&dmamux1 74 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x4>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c4: i2c@4c005000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c005000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C4_K>; > - resets = <&rcc I2C4_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 75 0x400 0x1>, > - <&dmamux1 76 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x8>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > - i2c5: i2c@4c006000 { > - compatible = "st,stm32mp13-i2c"; > - reg = <0x4c006000 0x400>; > - interrupt-names = "event", "error"; > - interrupts = , > - ; > - clocks = <&rcc I2C5_K>; > - resets = <&rcc I2C5_R>; > - #address-cells = <1>; > - #size-cells = <0>; > - dmas = <&dmamux1 115 0x400 0x1>, > - <&dmamux1 116 0x400 0x1>; > - dma-names = "rx", "tx"; > - st,syscfg-fmp = <&syscfg 0x4 0x10>; > - i2c-analog-filter; > - status = "disabled"; > - }; > - > rcc: rcc@50000000 { > compatible = "st,stm32mp13-rcc", "syscon"; > reg = <0x50000000 0x1000>; > @@ -431,34 +289,6 @@ mdma: dma-controller@58000000 { > dma-requests = <48>; > }; > > - sdmmc1: mmc@58005000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC1_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC1_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > - sdmmc2: mmc@58007000 { > - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > - arm,primecell-periphid = <0x20253180>; > - reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > - interrupts = ; > - clocks = <&rcc SDMMC2_K>; > - clock-names = "apb_pclk"; > - resets = <&rcc SDMMC2_R>; > - cap-sd-highspeed; > - cap-mmc-highspeed; > - max-frequency = <130000000>; > - status = "disabled"; > - }; > - > usbh_ohci: usb@5800c000 { > compatible = "generic-ohci"; > reg = <0x5800c000 0x1000>; > @@ -486,29 +316,6 @@ iwdg2: watchdog@5a002000 { > status = "disabled"; > }; > > - usbphyc: usbphyc@5a006000 { > - #address-cells = <1>; > - #size-cells = <0>; > - #clock-cells = <0>; > - compatible = "st,stm32mp1-usbphyc"; > - reg = <0x5a006000 0x1000>; > - clocks = <&rcc USBPHY_K>; > - resets = <&rcc USBPHY_R>; > - vdda1v1-supply = <®11>; > - vdda1v8-supply = <®18>; > - status = "disabled"; > - > - usbphyc_port0: usb-phy@0 { > - #phy-cells = <0>; > - reg = <0>; > - }; > - > - usbphyc_port1: usb-phy@1 { > - #phy-cells = <1>; > - reg = <1>; > - }; > - }; > - > rtc: rtc@5c004000 { > compatible = "st,stm32mp1-rtc"; > reg = <0x5c004000 0x400>; > @@ -536,6 +343,220 @@ ts_cal2: calib@5e { > }; > }; > > + etzpc: bus@5c007000 { > + compatible = "st,stm32mp13-sys-bus"; > + reg = <0x5c007000 0x400>; > + #address-cells = <1>; > + #size-cells = <1>; > + feature-domain-controller; > + #feature-domain-cells = <1>; > + ranges; > + > + adc_2: adc@48004000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48004000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC2>, <&rcc ADC2_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 33>; > + status = "disabled"; > + > + adc2: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_2>; > + interrupts = <0>; > + dmas = <&dmamux1 10 0x400 0x80000001>; > + dma-names = "rx"; > + status = "disabled"; > + > + channel@13 { > + reg = <13>; > + label = "vrefint"; > + }; > + channel@14 { > + reg = <14>; > + label = "vddcore"; > + }; > + channel@16 { > + reg = <16>; > + label = "vddcpu"; > + }; > + channel@17 { > + reg = <17>; > + label = "vddq_ddr"; > + }; > + }; > + }; > + > + usbotg_hs: usb@49000000 { > + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; > + reg = <0x49000000 0x40000>; > + clocks = <&rcc USBO_K>; > + clock-names = "otg"; > + resets = <&rcc USBO_R>; > + reset-names = "dwc2"; > + interrupts = ; > + g-rx-fifo-size = <512>; > + g-np-tx-fifo-size = <32>; > + g-tx-fifo-size = <256 16 16 16 16 16 16 16>; > + dr_mode = "otg"; > + otg-rev = <0x200>; > + usb33d-supply = <&usb33>; > + feature-domains = <&etzpc 34>; > + status = "disabled"; > + }; > + > + spi4: spi@4c002000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c002000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI4_K>; > + resets = <&rcc SPI4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 83 0x400 0x01>, > + <&dmamux1 84 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 18>; > + status = "disabled"; > + }; > + > + spi5: spi@4c003000 { > + compatible = "st,stm32h7-spi"; > + reg = <0x4c003000 0x400>; > + interrupts = ; > + clocks = <&rcc SPI5_K>; > + resets = <&rcc SPI5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 85 0x400 0x01>, > + <&dmamux1 86 0x400 0x01>; > + dma-names = "rx", "tx"; > + feature-domains = <&etzpc 19>; > + status = "disabled"; > + }; > + > + i2c3: i2c@4c004000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c004000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C3_K>; > + resets = <&rcc I2C3_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 73 0x400 0x1>, > + <&dmamux1 74 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x4>; > + i2c-analog-filter; > + feature-domains = <&etzpc 20>; > + status = "disabled"; > + }; > + > + i2c4: i2c@4c005000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c005000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C4_K>; > + resets = <&rcc I2C4_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 75 0x400 0x1>, > + <&dmamux1 76 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x8>; > + i2c-analog-filter; > + feature-domains = <&etzpc 21>; > + status = "disabled"; > + }; > + > + i2c5: i2c@4c006000 { > + compatible = "st,stm32mp13-i2c"; > + reg = <0x4c006000 0x400>; > + interrupt-names = "event", "error"; > + interrupts = , > + ; > + clocks = <&rcc I2C5_K>; > + resets = <&rcc I2C5_R>; > + #address-cells = <1>; > + #size-cells = <0>; > + dmas = <&dmamux1 115 0x400 0x1>, > + <&dmamux1 116 0x400 0x1>; > + dma-names = "rx", "tx"; > + st,syscfg-fmp = <&syscfg 0x4 0x10>; > + i2c-analog-filter; > + feature-domains = <&etzpc 22>; > + status = "disabled"; > + }; > + > + sdmmc1: mmc@58005000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58005000 0x1000>, <0x58006000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC1_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC1_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 50>; > + status = "disabled"; > + }; > + > + sdmmc2: mmc@58007000 { > + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > + arm,primecell-periphid = <0x20253180>; > + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; > + interrupts = ; > + clocks = <&rcc SDMMC2_K>; > + clock-names = "apb_pclk"; > + resets = <&rcc SDMMC2_R>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <130000000>; > + feature-domains = <&etzpc 51>; > + status = "disabled"; > + }; > + > + usbphyc: usbphyc@5a006000 { > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <0>; > + compatible = "st,stm32mp1-usbphyc"; > + reg = <0x5a006000 0x1000>; > + clocks = <&rcc USBPHY_K>; > + resets = <&rcc USBPHY_R>; > + vdda1v1-supply = <®11>; > + vdda1v8-supply = <®18>; > + feature-domains = <&etzpc 5>; > + status = "disabled"; > + > + usbphyc_port0: usb-phy@0 { > + #phy-cells = <0>; > + reg = <0>; > + }; > + > + usbphyc_port1: usb-phy@1 { > + #phy-cells = <1>; > + reg = <1>; > + }; > + }; > + > + }; > + > /* > * Break node order to solve dependency probe issue between > * pinctrl and exti. > diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi > index df451c3c2a26..be6061552683 100644 > --- a/arch/arm/boot/dts/stm32mp133.dtsi > +++ b/arch/arm/boot/dts/stm32mp133.dtsi > @@ -33,35 +33,38 @@ m_can2: can@4400f000 { > bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; > status = "disabled"; > }; > + }; > +}; > > - adc_1: adc@48003000 { > - compatible = "st,stm32mp13-adc-core"; > - reg = <0x48003000 0x400>; > - interrupts = ; > - clocks = <&rcc ADC1>, <&rcc ADC1_K>; > - clock-names = "bus", "adc"; > - interrupt-controller; > - #interrupt-cells = <1>; > +&etzpc { > + adc_1: adc@48003000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48003000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC1>, <&rcc ADC1_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + feature-domains = <&etzpc 32>; > + status = "disabled"; > + > + adc1: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > #address-cells = <1>; > #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_1>; > + interrupts = <0>; > + dmas = <&dmamux1 9 0x400 0x80000001>; > + dma-names = "rx"; > status = "disabled"; > > - adc1: adc@0 { > - compatible = "st,stm32mp13-adc"; > - #io-channel-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0x0>; > - interrupt-parent = <&adc_1>; > - interrupts = <0>; > - dmas = <&dmamux1 9 0x400 0x80000001>; > - dma-names = "rx"; > - status = "disabled"; > - > - channel@18 { > - reg = <18>; > - label = "vrefint"; > - }; > + channel@18 { > + reg = <18>; > + label = "vrefint"; > }; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xc.dtsi b/arch/arm/boot/dts/stm32mp13xc.dtsi > index 4d00e7592882..a1a7a40c2a3e 100644 > --- a/arch/arm/boot/dts/stm32mp13xc.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xc.dtsi > @@ -4,15 +4,14 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + feature-domains = <&etzpc 42>; > + status = "disabled"; > }; > }; > diff --git a/arch/arm/boot/dts/stm32mp13xf.dtsi b/arch/arm/boot/dts/stm32mp13xf.dtsi > index 4d00e7592882..b9fb071a1471 100644 > --- a/arch/arm/boot/dts/stm32mp13xf.dtsi > +++ b/arch/arm/boot/dts/stm32mp13xf.dtsi > @@ -4,15 +4,13 @@ > * Author: Alexandre Torgue for STMicroelectronics. > */ > > -/ { > - soc { > - cryp: crypto@54002000 { > - compatible = "st,stm32mp1-cryp"; > - reg = <0x54002000 0x400>; > - interrupts = ; > - clocks = <&rcc CRYP1>; > - resets = <&rcc CRYP1_R>; > - status = "disabled"; > - }; > +&etzpc { > + cryp: crypto@54002000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54002000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + status = "disabled"; > }; > }; -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel