Re: [PATCH 4/4] bnx2i: Add bnx2i iSCSI driver.

From: Grant Grundler <grundler@google.com>
To: Michael Chan <mchan@broadcom.com>
Cc: James.Bottomley@hansenpartnership.com, michaelc@cs.wisc.edu,
	davem@davemloft.net, linux-scsi@vger.kernel.org,
	open-iscsi@googlegroups.com, anilgv@broadcom.com,
	benli@broadcom.com
Subject: Re: [PATCH 4/4] bnx2i: Add bnx2i iSCSI driver.
Date: Tue, 26 May 2009 09:37:53 -0700	[thread overview]
Message-ID: <da824cf30905260937s4029fe7crc723da03fba08c7b@mail.gmail.com> (raw)
In-Reply-To: <1243113110-29635-5-git-send-email-mchan@broadcom.com>

On Sat, May 23, 2009 at 2:11 PM, Michael Chan <mchan@broadcom.com> wrote:
> New iSCSI driver for Broadcom BNX2 devices.
...
> +/*
> + * iSCSI Async CQE
> + */
> +struct bnx2i_async_msg {
...
> +#if defined(__BIG_ENDIAN)
> +       u8 async_event;
> +       u8 async_vcode;
> +       u16 param1;
> +#elif defined(__LITTLE_ENDIAN)
> +       u16 param1;
> +       u8 async_vcode;
> +       u8 async_event;
> +#endif
...

Michael,
I'm feeling a bit dense and am not seeing why byte data
would have to worry about the 32-bit word endianess of the CPU.
Can you give an example of why defined(__BIG_ENDIAN) is needed?

Normally the _*ENDIAN defines are used for bit fields, not byte fields.

Byte data addressable by the CPU (e.g. host memory) is at the same offset
regardless of endianness of the CPU. I feel like I'm missing
something that should be obvious.

thanks,
grant