Re: [PATCH] drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform

[Shaokun Zhang <zhangshaokun@hisilicon.com>]

Hi Mark,

On 2019/11/7 20:11, Mark Rutland wrote:
> On Thu, Nov 07, 2019 at 12:06:24PM +0000, John Garry wrote:
>> On 07/11/2019 11:56, Mark Rutland wrote:
>>> On Thu, Nov 07, 2019 at 11:50:30AM +0000, John Garry wrote:
>>>> On 07/11/2019 11:40, Will Deacon wrote:
>>>>> Hi,
>>>>>
>>>>> On Thu, Nov 07, 2019 at 03:56:04PM +0800, Shaokun Zhang wrote:
>>>>>> @@ -338,8 +339,10 @@ void hisi_uncore_pmu_disable(struct pmu *pmu)
>>>>>>    /*
>>>>>>     * Read Super CPU cluster and CPU cluster ID from MPIDR_EL1.
>>>>>> - * If multi-threading is supported, CCL_ID is the low 3-bits in MPIDR[Aff2]
>>>>>> - * and SCCL_ID is the upper 5-bits of Aff2 field; if not, SCCL_ID
>>>>>> + * If multi-threading is supported, On Huawei Kunpeng 920 SoC whose cpu
>>>>>> + * core is tsv110, CCL_ID is the low 3-bits in MPIDR[Aff2] and SCCL_ID
>>>>>> + * is the upper 5-bits of Aff2 field; while for other cpu types, SCCL_ID
>>>>>> + * is in MPIDR[Aff3] and CCL_ID is in MPIDR[Aff2], if not, SCCL_ID
>>>>>>     * is in MPIDR[Aff2] and CCL_ID is in MPIDR[Aff1].
>>>>>>     */
>>>>>>    static void hisi_read_sccl_and_ccl_id(int *sccl_id, int *ccl_id)
>>>>>> @@ -347,12 +350,19 @@ static void hisi_read_sccl_and_ccl_id(int *sccl_id, int *ccl_id)
>>>>>>    	u64 mpidr = read_cpuid_mpidr();
>>>>>>    	if (mpidr & MPIDR_MT_BITMASK) {
>>>>>> -		int aff2 = MPIDR_AFFINITY_LEVEL(mpidr, 2);
>>>>>> -
>>>>>> -		if (sccl_id)
>>>>>> -			*sccl_id = aff2 >> 3;
>>>>>> -		if (ccl_id)
>>>>>> -			*ccl_id = aff2 & 0x7;
>>>>>> +		if (read_cpuid_part_number() == HISI_CPU_PART_TSV110) {
>>>>>> +			int aff2 = MPIDR_AFFINITY_LEVEL(mpidr, 2);
>>>>>> +
>>>>>> +			if (sccl_id)
>>>>>> +				*sccl_id = aff2 >> 3;
>>>>>> +			if (ccl_id)
>>>>>> +				*ccl_id = aff2 & 0x7;
>>>>>> +		} else {
>>>>>> +			if (sccl_id)
>>>>>> +				*sccl_id = MPIDR_AFFINITY_LEVEL(mpidr, 3);
>>>>>> +			if (ccl_id)
>>>>>> +				*ccl_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
>>>>>> +		}
>>>>>
>>>>> [I prefer Mark's version, so please reply to indicate whether or not it
>>>>>    works for you]
>>>>
>>>> Replying on Shaokun's behalf as he appears offline now.
>>>>
>>>> In response to "> If TSV110 is always MT, ":
>>>>
>>>> It isn't. There are 2 spins of Huawei Kunpeng 920 SoC which includes
>>>> TaishanV110 aka TSV110: one has the MT bit set and the other without.
>>>
>>> Just to check, for the non-MT variant is the SCCL/CCL assignment
>>> Aff2/Aff1 as with other non-MT parts?
>>
>> We don't support any other non-MT parts for this driver.
> 
> The driver claimed to support non-MT parts before TSV110 came around, so that
> statement confuses me.
> 

Apologies that I reply a little later because of stepout and other things, I was
not online.

My description is a little obscure so the comment is really confused:
Under the condition that MT field is set, TSV110 core on Kunpeng 920:
SCCL is Aff2[7:3], CCL is Aff2[2:0];

If MT field is not, TSV110 core on Kunpeng 920:
SCCL is Aff2[7:0], CCL is Aff1[7:0]
And as John said that "We don't support any other non-MT parts for this driver."

> For a non-MT TSV110, is Aff2 the SCCL and Aff1 the CCL? That's what the

Right.

> existing code (and Shaokun's patch) assumed.
> 
> Assuming that is the case, I'd suggest we have the following:
> 
> /*
>  * The Super CPU Cluster (SCCL) and CPU Cluster (CCL) IDs can be
>  * determined from the MPIDR_EL1, but the encoding varies by CPU:
>  *
>  * - For MT variants of TSV110 (e.g. found in Kunpeng 920):
>  *   SCCL is Aff2[7:3], CCL is Aff2[2:0]
>  *
>  * - For other MT parts:
>  *   SCCL is Aff3[7:0], CCL is Aff2[7:0]
>  *
>  * - For non-MT parts:
>  *   SCCL is Aff2[7:0], CCL is Aff1[7:0]
>  */
> static void hisi_read_sccl_and_ccl_id(int *scclp, int *cclp)
> {
> 	u64 mpidr = read_cpuid_mpidr();
> 	int aff3 = MPIDR_AFFINITY_LEVEL(mpidr, 3);
> 	int aff2 = MPIDR_AFFINITY_LEVEL(mpidr, 2);
> 	int aff1 = MPIDR_AFFINITY_LEVEL(mpidr, 1);
> 	bool mt = mpdir & MPIDR_MT_BITMASK;
> 	int sccl, ccl;
> 
> 	if (mt && read_cpuid_part_number() == HISI_CPU_PART_TSV110) {
> 		sccl = aff2 >> 3;
> 		ccl = aff2 & 0x7;
> 	} else if (mt) {
> 		sccl = aff3;
> 		ccl = aff2;
> 	} else {
> 		sccl = aff2;
> 		ccl = aff1;
> 	}
> 
> 	if (scclp)
> 		*scclp = sccl;
> 	if (cclp)
> 		*cclp = ccl;
> }
> 

It works and Thanks your nice comment.

> Thanks,
> Mark.
> 
> .
> 


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