From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A67C2CA0 for ; Tue, 7 Dec 2021 15:38:41 +0000 (UTC) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mucXu-0004Ow-J8; Tue, 07 Dec 2021 16:38:22 +0100 Message-ID: Subject: Re: [RFC V2 3/6] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support From: Lucas Stach To: Rob Herring , Adam Ford Cc: linux-media@vger.kernel.org, cphealy@gmail.com, benjamin.gaignard@collabora.com, hverkuil@xs4all.nl, Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Date: Tue, 07 Dec 2021 16:38:19 +0100 In-Reply-To: References: <20211207015446.1250854-1-aford173@gmail.com> <20211207015446.1250854-4-aford173@gmail.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-staging@lists.linux.dev Hi Rob, Am Dienstag, dem 07.12.2021 um 09:14 -0600 schrieb Rob Herring: > On Mon, Dec 06, 2021 at 07:54:42PM -0600, Adam Ford wrote: > > From: Benjamin Gaignard > > > > Introducing the G2 hevc video decoder requires modifications of the bindings to allow > > one node per VPU. > > Why? It looks like the G2 part was already described. If you are > changing this because you want 2 drivers for G1 and G2, then NAK. DT > nodes and drivers don't have to be 1:1. This change is breaking > compatibility. We can keep the compatibility by just keeping the code in the VPU driver to handle the G1 block as-is. The VPU block on the imx8mq is really three peripherals: the control block working together with the power domain controller to provide clocks and resets and the G1 and G2 VPU cores. > > > > > VPUs share one hardware control block which is provided as a phandle on > > a syscon. > > That's not really ideal. Is this really a separate block? > This part of the commit message is not accurate anymore. The control block is in fact so separate from the VPU that we even added a new driver to handle those control blocks: the imx8m blk-ctrl driver. The VPU driver doesn't need handle this control block anymore, it's now handled via the power-domain abstraction. Regards, Lucas > > Each node has now one reg and one interrupt. > > Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2. > > > > To be compatible with older DT the driver is still capable to use the 'ctrl' > > reg-name even if it is deprecated now. > > > > Signed-off-by: Benjamin Gaignard > > Signed-off-by: Adam Ford > > > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > index 762be3f96ce9..eaeba4ce262a 100644 > > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > @@ -15,37 +15,36 @@ description: > > > > properties: > > compatible: > > - const: nxp,imx8mq-vpu > > + oneOf: > > + - const: nxp,imx8mq-vpu-g1 > > + - const: nxp,imx8mq-vpu-g2 > > > > reg: > > - maxItems: 3 > > - > > - reg-names: > > - items: > > - - const: g1 > > - - const: g2 > > - - const: ctrl > > + maxItems: 1 > > > > interrupts: > > - maxItems: 2 > > + maxItems: 1 > > > > interrupt-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > > > clocks: > > - maxItems: 3 > > + maxItems: 1 > > > > clock-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > - - const: bus > > > > power-domains: > > maxItems: 1 > > > > + nxp,imx8m-vpu-ctrl: > > + description: Specifies a phandle to syscon VPU hardware control block > > + $ref: "/schemas/types.yaml#/definitions/phandle" > > This is optional? > > > + > > required: > > - compatible > > - reg > > @@ -60,20 +59,27 @@ additionalProperties: false > > examples: > > - | > > #include > > + #include > > #include > > > > - vpu: video-codec@38300000 { > > + vpu_g1: video-codec@38300000 { > > compatible = "nxp,imx8mq-vpu"; > > - reg = <0x38300000 0x10000>, > > - <0x38310000 0x10000>, > > - <0x38320000 0x10000>; > > - reg-names = "g1", "g2", "ctrl"; > > - interrupts = , > > - ; > > - interrupt-names = "g1", "g2"; > > - clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_G2_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; > > - clock-names = "g1", "g2", "bus"; > > - power-domains = <&pgc_vpu>; > > + reg = <0x38300000 0x10000>; > > + reg-names "g1"; > > + interrupts = ; > > + interrupt-names = "g1"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g1"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>; > > + }; > > + > > + vpu_g2: video-codec@38310000 { > > + compatible = "nxp,imx8mq-vpu-g2"; > > + reg = <0x38300000 0x10000>; > > + reg-names "g2"; > > + interrupts = ; > > + interrupt-names = "g2"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g2"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; > > }; > > -- > > 2.32.0 > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0AB35C433EF for ; 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Tue, 07 Dec 2021 15:38:39 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mucY5-009H7n-Fg for linux-rockchip@lists.infradead.org; Tue, 07 Dec 2021 15:38:38 +0000 Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mucXu-0004Ow-J8; Tue, 07 Dec 2021 16:38:22 +0100 Message-ID: Subject: Re: [RFC V2 3/6] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support From: Lucas Stach To: Rob Herring , Adam Ford Cc: linux-media@vger.kernel.org, cphealy@gmail.com, benjamin.gaignard@collabora.com, hverkuil@xs4all.nl, Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Date: Tue, 07 Dec 2021 16:38:19 +0100 In-Reply-To: References: <20211207015446.1250854-1-aford173@gmail.com> <20211207015446.1250854-4-aford173@gmail.com> User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-rockchip@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_073833_573835_FDC5E8B1 X-CRM114-Status: GOOD ( 28.64 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Hi Rob, Am Dienstag, dem 07.12.2021 um 09:14 -0600 schrieb Rob Herring: > On Mon, Dec 06, 2021 at 07:54:42PM -0600, Adam Ford wrote: > > From: Benjamin Gaignard > > > > Introducing the G2 hevc video decoder requires modifications of the bindings to allow > > one node per VPU. > > Why? It looks like the G2 part was already described. If you are > changing this because you want 2 drivers for G1 and G2, then NAK. DT > nodes and drivers don't have to be 1:1. This change is breaking > compatibility. We can keep the compatibility by just keeping the code in the VPU driver to handle the G1 block as-is. The VPU block on the imx8mq is really three peripherals: the control block working together with the power domain controller to provide clocks and resets and the G1 and G2 VPU cores. > > > > > VPUs share one hardware control block which is provided as a phandle on > > a syscon. > > That's not really ideal. Is this really a separate block? > This part of the commit message is not accurate anymore. The control block is in fact so separate from the VPU that we even added a new driver to handle those control blocks: the imx8m blk-ctrl driver. The VPU driver doesn't need handle this control block anymore, it's now handled via the power-domain abstraction. Regards, Lucas > > Each node has now one reg and one interrupt. > > Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2. > > > > To be compatible with older DT the driver is still capable to use the 'ctrl' > > reg-name even if it is deprecated now. > > > > Signed-off-by: Benjamin Gaignard > > Signed-off-by: Adam Ford > > > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > index 762be3f96ce9..eaeba4ce262a 100644 > > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > @@ -15,37 +15,36 @@ description: > > > > properties: > > compatible: > > - const: nxp,imx8mq-vpu > > + oneOf: > > + - const: nxp,imx8mq-vpu-g1 > > + - const: nxp,imx8mq-vpu-g2 > > > > reg: > > - maxItems: 3 > > - > > - reg-names: > > - items: > > - - const: g1 > > - - const: g2 > > - - const: ctrl > > + maxItems: 1 > > > > interrupts: > > - maxItems: 2 > > + maxItems: 1 > > > > interrupt-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > > > clocks: > > - maxItems: 3 > > + maxItems: 1 > > > > clock-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > - - const: bus > > > > power-domains: > > maxItems: 1 > > > > + nxp,imx8m-vpu-ctrl: > > + description: Specifies a phandle to syscon VPU hardware control block > > + $ref: "/schemas/types.yaml#/definitions/phandle" > > This is optional? > > > + > > required: > > - compatible > > - reg > > @@ -60,20 +59,27 @@ additionalProperties: false > > examples: > > - | > > #include > > + #include > > #include > > > > - vpu: video-codec@38300000 { > > + vpu_g1: video-codec@38300000 { > > compatible = "nxp,imx8mq-vpu"; > > - reg = <0x38300000 0x10000>, > > - <0x38310000 0x10000>, > > - <0x38320000 0x10000>; > > - reg-names = "g1", "g2", "ctrl"; > > - interrupts = , > > - ; > > - interrupt-names = "g1", "g2"; > > - clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_G2_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; > > - clock-names = "g1", "g2", "bus"; > > - power-domains = <&pgc_vpu>; > > + reg = <0x38300000 0x10000>; > > + reg-names "g1"; > > + interrupts = ; > > + interrupt-names = "g1"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g1"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>; > > + }; > > + > > + vpu_g2: video-codec@38310000 { > > + compatible = "nxp,imx8mq-vpu-g2"; > > + reg = <0x38300000 0x10000>; > > + reg-names "g2"; > > + interrupts = ; > > + interrupt-names = "g2"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g2"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; > > }; > > -- > > 2.32.0 > > > > _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 96602C433EF for ; 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Tue, 07 Dec 2021 15:38:44 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mucY6-009H8H-05 for linux-arm-kernel@lists.infradead.org; Tue, 07 Dec 2021 15:38:38 +0000 Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mucXu-0004Ow-J8; Tue, 07 Dec 2021 16:38:22 +0100 Message-ID: Subject: Re: [RFC V2 3/6] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support From: Lucas Stach To: Rob Herring , Adam Ford Cc: linux-media@vger.kernel.org, cphealy@gmail.com, benjamin.gaignard@collabora.com, hverkuil@xs4all.nl, Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Date: Tue, 07 Dec 2021 16:38:19 +0100 In-Reply-To: References: <20211207015446.1250854-1-aford173@gmail.com> <20211207015446.1250854-4-aford173@gmail.com> User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_073834_075354_2131DF14 X-CRM114-Status: GOOD ( 29.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, Am Dienstag, dem 07.12.2021 um 09:14 -0600 schrieb Rob Herring: > On Mon, Dec 06, 2021 at 07:54:42PM -0600, Adam Ford wrote: > > From: Benjamin Gaignard > > > > Introducing the G2 hevc video decoder requires modifications of the bindings to allow > > one node per VPU. > > Why? It looks like the G2 part was already described. If you are > changing this because you want 2 drivers for G1 and G2, then NAK. DT > nodes and drivers don't have to be 1:1. This change is breaking > compatibility. We can keep the compatibility by just keeping the code in the VPU driver to handle the G1 block as-is. The VPU block on the imx8mq is really three peripherals: the control block working together with the power domain controller to provide clocks and resets and the G1 and G2 VPU cores. > > > > > VPUs share one hardware control block which is provided as a phandle on > > a syscon. > > That's not really ideal. Is this really a separate block? > This part of the commit message is not accurate anymore. The control block is in fact so separate from the VPU that we even added a new driver to handle those control blocks: the imx8m blk-ctrl driver. The VPU driver doesn't need handle this control block anymore, it's now handled via the power-domain abstraction. Regards, Lucas > > Each node has now one reg and one interrupt. > > Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2. > > > > To be compatible with older DT the driver is still capable to use the 'ctrl' > > reg-name even if it is deprecated now. > > > > Signed-off-by: Benjamin Gaignard > > Signed-off-by: Adam Ford > > > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > index 762be3f96ce9..eaeba4ce262a 100644 > > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml > > @@ -15,37 +15,36 @@ description: > > > > properties: > > compatible: > > - const: nxp,imx8mq-vpu > > + oneOf: > > + - const: nxp,imx8mq-vpu-g1 > > + - const: nxp,imx8mq-vpu-g2 > > > > reg: > > - maxItems: 3 > > - > > - reg-names: > > - items: > > - - const: g1 > > - - const: g2 > > - - const: ctrl > > + maxItems: 1 > > > > interrupts: > > - maxItems: 2 > > + maxItems: 1 > > > > interrupt-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > > > clocks: > > - maxItems: 3 > > + maxItems: 1 > > > > clock-names: > > - items: > > + oneOf: > > - const: g1 > > - const: g2 > > - - const: bus > > > > power-domains: > > maxItems: 1 > > > > + nxp,imx8m-vpu-ctrl: > > + description: Specifies a phandle to syscon VPU hardware control block > > + $ref: "/schemas/types.yaml#/definitions/phandle" > > This is optional? > > > + > > required: > > - compatible > > - reg > > @@ -60,20 +59,27 @@ additionalProperties: false > > examples: > > - | > > #include > > + #include > > #include > > > > - vpu: video-codec@38300000 { > > + vpu_g1: video-codec@38300000 { > > compatible = "nxp,imx8mq-vpu"; > > - reg = <0x38300000 0x10000>, > > - <0x38310000 0x10000>, > > - <0x38320000 0x10000>; > > - reg-names = "g1", "g2", "ctrl"; > > - interrupts = , > > - ; > > - interrupt-names = "g1", "g2"; > > - clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_G2_ROOT>, > > - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; > > - clock-names = "g1", "g2", "bus"; > > - power-domains = <&pgc_vpu>; > > + reg = <0x38300000 0x10000>; > > + reg-names "g1"; > > + interrupts = ; > > + interrupt-names = "g1"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g1"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>; > > + }; > > + > > + vpu_g2: video-codec@38310000 { > > + compatible = "nxp,imx8mq-vpu-g2"; > > + reg = <0x38300000 0x10000>; > > + reg-names "g2"; > > + interrupts = ; > > + interrupt-names = "g2"; > > + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; > > + clock-names = "g2"; > > + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; > > }; > > -- > > 2.32.0 > > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel