From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org ([198.145.29.96]:51032 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755966AbeDZUex (ORCPT ); Thu, 26 Apr 2018 16:34:53 -0400 To: stable@vger.kernel.org Cc: Keith Busch , Bjorn Helgaas From: Sinan Kaya Subject: Please apply commit 821cdad5c46c to v4.9.y Message-ID: Date: Thu, 26 Apr 2018 16:34:50 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: Hi Greg, Upstream commit 821cdad5c46c ("PCI: Wait up to 60 seconds for device to become ready after FLR") fixes a virtualization issue for Intel 750 NVMe drive and potentially other PCIe devices taking longer to recover from functional resets. problem description below from the commit: 'Sporadic reset issues have been observed with an Intel 750 NVMe drive while assigning the physical function to the guest machine. The sequence of events observed is as follows: - perform a Function Level Reset (FLR) - sleep up to 1000ms total - read ~0 from PCI_COMMAND (CRS completion for config read) - warn that the device didn't return from FLR - touch the device before it's ready - device drops config writes when we restore register settings (there's no mechanism for software to learn about CRS completions for writes) - incomplete register restore leaves device in inconsistent state - device probe fails because device is in inconsistent state After reset, an endpoint may respond to config requests with Configuration Request Retry Status (CRS) to indicate that it is not ready to accept new requests. See PCIe r3.1, sec 2.3.1 and 6.6.2.' Please apply commit 821cdad5c46c to fix the resulting regression. Thanks, Sinan -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.