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From: "Arnd Bergmann" <arnd@arndb.de>
To: "WANG Xuerui" <kernel@xen0n.name>,
	"Jianmin Lv" <lvjianmin@loongson.cn>,
	"David Laight" <David.Laight@ACULAB.COM>,
	"Huacai Chen" <chenhuacai@kernel.org>
Cc: "Huacai Chen" <chenhuacai@loongson.cn>,
	"loongarch@lists.linux.dev" <loongarch@lists.linux.dev>,
	Linux-Arch <linux-arch@vger.kernel.org>,
	"Xuefeng Li" <lixuefeng@loongson.cn>, guoren <guoren@kernel.org>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] LoongArch: Make -mstrict-align be configurable
Date: Tue, 07 Feb 2023 11:32:55 +0100	[thread overview]
Message-ID: <dcd17646-4b8d-447b-bd85-c66c4a7b2cf4@app.fastmail.com> (raw)
In-Reply-To: <379bcb55-f75d-02ce-a51b-467e21ade5a3@xen0n.name>

On Tue, Feb 7, 2023, at 06:24, WANG Xuerui wrote:

> (Yes I've partially changed my mind after seeing Arnd's suggestion that 
> indeed some optimized codepaths can be enabled if we can know the CPU's 
> unaligned capability at config time. Now I'm in support of making this 
> codegen aspect tunable, but I still think keeping the default as-is 
> would be a better idea. It won't regress or surprise anyone and embedded 
> people's convenience wouldn't get sacrificed.)

I agree the default should always be to have a kernel that works on
every machine that has been produced, but this also depends on which
models specifically lack the unaligned access. If it's just about
pre-production silicon that is now all but scrapped, things are different
from a situation where users may actually use them for normal workloads.

Is there an overview of the available loongarch CPU cores that have
been produced so far, and which ones support unaligned access?

     Arnd

  reply	other threads:[~2023-02-07 10:33 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-02  8:42 [PATCH] LoongArch: Make -mstrict-align be configurable Huacai Chen
2023-02-02  9:01 ` David Laight
2023-02-03  2:00   ` Huacai Chen
2023-02-03  8:46     ` David Laight
2023-02-06 10:28       ` Jianmin Lv
2023-02-07  5:24         ` WANG Xuerui
2023-02-07 10:32           ` Arnd Bergmann [this message]
2023-02-07 13:28             ` Jianmin Lv
2023-02-07 14:10               ` Arnd Bergmann
2023-02-08 11:17                 ` Huacai Chen
2023-02-02  9:46 ` Arnd Bergmann
2023-02-03  2:08   ` Huacai Chen
2023-02-06 10:33     ` Arnd Bergmann
2023-02-02 10:30 ` WANG Xuerui
2023-02-06 10:24   ` Jianmin Lv
2023-02-06 11:18     ` Xi Ruoyao
2023-02-06 13:13       ` Jianmin Lv
2023-02-06 13:22         ` Arnd Bergmann
2023-02-07  1:13           ` Jianmin Lv
2023-02-06 13:30         ` Xi Ruoyao
2023-02-07  1:27           ` Jianmin Lv

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