From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753013AbdCBTDN (ORCPT ); Thu, 2 Mar 2017 14:03:13 -0500 Received: from mail-lf0-f66.google.com ([209.85.215.66]:34849 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752095AbdCBTC4 (ORCPT ); Thu, 2 Mar 2017 14:02:56 -0500 Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT To: Jon Mason , Hauke Mehrtens References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Cc: Rob Herring , Mark Rutland , Florian Fainelli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Jon Mason From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Message-ID: Date: Thu, 2 Mar 2017 19:54:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/28/2017 09:31 PM, Jon Mason wrote: > From: Jon Mason > > Add support for the ARM TWD Watchdog to the bcm5301x device tree. The > ARM TWD timer allocated the register space for the WDT, so this patch > necessitated shrinking that. Also, the GIC masks were added for these. > > Signed-off-by: Jon Mason > --- > arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi > index 4fbb089..3fbc450 100644 > --- a/arch/arm/boot/dts/bcm5301x.dtsi > +++ b/arch/arm/boot/dts/bcm5301x.dtsi > @@ -70,10 +70,19 @@ > clocks = <&periph_clk>; > }; > > - local-timer@20600 { > + timer@20600 { > compatible = "arm,cortex-a9-twd-timer"; > - reg = <0x20600 0x100>; > - interrupts = ; > + reg = <0x20600 0x20>; > + interrupts = + IRQ_TYPE_LEVEL_HIGH)>; > + clocks = <&periph_clk>; > + }; If you follow my recent e-mail thread: BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be IRQ_TYPE_EDGE_RISING. I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc stable for kernels 4.8+. The same change is needed for "arm,cortex-a9-global-timer". Would you find time to revise this patch? From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT Date: Thu, 2 Mar 2017 19:54:22 +0100 Message-ID: References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Jon Mason , Hauke Mehrtens Cc: Mark Rutland , devicetree@vger.kernel.org, Florian Fainelli , Jon Mason , linux-kernel@vger.kernel.org, Rob Herring , bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On 02/28/2017 09:31 PM, Jon Mason wrote: > From: Jon Mason > > Add support for the ARM TWD Watchdog to the bcm5301x device tree. The > ARM TWD timer allocated the register space for the WDT, so this patch > necessitated shrinking that. Also, the GIC masks were added for these. > > Signed-off-by: Jon Mason > --- > arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi > index 4fbb089..3fbc450 100644 > --- a/arch/arm/boot/dts/bcm5301x.dtsi > +++ b/arch/arm/boot/dts/bcm5301x.dtsi > @@ -70,10 +70,19 @@ > clocks = <&periph_clk>; > }; > > - local-timer@20600 { > + timer@20600 { > compatible = "arm,cortex-a9-twd-timer"; > - reg = <0x20600 0x100>; > - interrupts = ; > + reg = <0x20600 0x20>; > + interrupts = + IRQ_TYPE_LEVEL_HIGH)>; > + clocks = <&periph_clk>; > + }; If you follow my recent e-mail thread: BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be IRQ_TYPE_EDGE_RISING. I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc stable for kernels 4.8+. The same change is needed for "arm,cortex-a9-global-timer". Would you find time to revise this patch? From mboxrd@z Thu Jan 1 00:00:00 1970 From: zajec5@gmail.com (=?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?=) Date: Thu, 2 Mar 2017 19:54:22 +0100 Subject: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT In-Reply-To: <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 02/28/2017 09:31 PM, Jon Mason wrote: > From: Jon Mason > > Add support for the ARM TWD Watchdog to the bcm5301x device tree. The > ARM TWD timer allocated the register space for the WDT, so this patch > necessitated shrinking that. Also, the GIC masks were added for these. > > Signed-off-by: Jon Mason > --- > arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi > index 4fbb089..3fbc450 100644 > --- a/arch/arm/boot/dts/bcm5301x.dtsi > +++ b/arch/arm/boot/dts/bcm5301x.dtsi > @@ -70,10 +70,19 @@ > clocks = <&periph_clk>; > }; > > - local-timer at 20600 { > + timer at 20600 { > compatible = "arm,cortex-a9-twd-timer"; > - reg = <0x20600 0x100>; > - interrupts = ; > + reg = <0x20600 0x20>; > + interrupts = + IRQ_TYPE_LEVEL_HIGH)>; > + clocks = <&periph_clk>; > + }; If you follow my recent e-mail thread: BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be IRQ_TYPE_EDGE_RISING. I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc stable for kernels 4.8+. The same change is needed for "arm,cortex-a9-global-timer". Would you find time to revise this patch?