From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0222C433FE for ; Wed, 27 Oct 2021 04:01:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B0EBD610A5 for ; Wed, 27 Oct 2021 04:01:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231247AbhJ0EDx (ORCPT ); Wed, 27 Oct 2021 00:03:53 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:43896 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229623AbhJ0EDi (ORCPT ); Wed, 27 Oct 2021 00:03:38 -0400 X-UUID: 9168fe3c2a4f47379d3ed8ebafb808aa-20211027 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; 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by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Oct 2021 12:01:06 +0800 Message-ID: Subject: Re: [PATCH v7, 08/15] media: mtk-vcodec: Add msg queue feature for lat and core architecture From: "yunfei.dong@mediatek.com" To: AngeloGioacchino Del Regno , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , "Tiffany Lin" , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Dafna Hirschfeld , Benjamin Gaignard , Daniel Vetter , dri-devel , Irui Wang , , , , , , , Date: Wed, 27 Oct 2021 12:01:06 +0800 In-Reply-To: <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> References: <20211011070247.792-1-yunfei.dong@mediatek.com> <20211011070247.792-9-yunfei.dong@mediatek.com> <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SGkgQW5nZWxvR2lvYWNjaGlubywNCg0KVGhhbmtzIGZvciB5b3VyIHN1Z2dlc3Rpb24uDQoNCk9u IFRodSwgMjAyMS0xMC0xNCBhdCAxMjozNSArMDIwMCwgQW5nZWxvR2lvYWNjaGlubyBEZWwgUmVn bm8gd3JvdGU6DQo+ID4gRm9yIGxhdCBhbmQgY29yZSBhcmNoaXRlY3R1cmUsIGxhdCB0aHJlYWQg d2lsbCBzZW5kIG1lc3NhZ2UgdG8gY29yZQ0KPiA+IHRocmVhZCB3aGVuIGxhdCBkZWNvZGUgZG9u ZS4gQ29yZSBoYXJkd2FyZSB3aWxsIHVzZSB0aGUgbWVzc2FnZQ0KPiA+IGZyb20gbGF0IHRvIGRl Y29kZSwgdGhlbiBmcmVlIG1lc3NhZ2UgdG8gbGF0IHRocmVhZCB3aGVuIGRlY29kZQ0KPiA+IGRv bmUuDQo+ID4gDQo+ID4gU2lnbmVkLW9mZi1ieTogWXVuZmVpIERvbmcgPHl1bmZlaS5kb25nQG1l ZGlhdGVrLmNvbT4NCj4gPiAtLS0NCj4gPiAgIGRyaXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLXZj b2RlYy9NYWtlZmlsZSAgICB8ICAgMSArDQo+ID4gICAuLi4vcGxhdGZvcm0vbXRrLXZjb2RlYy9t dGtfdmNvZGVjX2Rydi5oICAgICAgfCAgIDUgKw0KPiA+ICAgLi4uL3BsYXRmb3JtL210ay12Y29k ZWMvdmRlY19tc2dfcXVldWUuYyAgICAgIHwgMjU4DQo+ID4gKysrKysrKysrKysrKysrKysrDQo+ ID4gICAuLi4vcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX21zZ19xdWV1ZS5oICAgICAgfCAxNTEg KysrKysrKysrKw0KPiA+ICAgNCBmaWxlcyBjaGFuZ2VkLCA0MTUgaW5zZXJ0aW9ucygrKQ0KPiA+ ICAgY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLQ0KPiA+IHZj b2RlYy92ZGVjX21zZ19xdWV1ZS5jDQo+ID4gICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9t ZWRpYS9wbGF0Zm9ybS9tdGstDQo+ID4gdmNvZGVjL3ZkZWNfbXNnX3F1ZXVlLmgNCj4gPiANCj4g PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9tdGstdmNvZGVjL01ha2VmaWxl DQo+ID4gYi9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL210ay12Y29kZWMvTWFrZWZpbGUNCj4gPiBp bmRleCBlZGViM2I2NmU5ZTkuLjUwMDBlNTlkYTU3NiAxMDA2NDQNCj4gPiAtLS0gYS9kcml2ZXJz L21lZGlhL3BsYXRmb3JtL210ay12Y29kZWMvTWFrZWZpbGUNCj4gPiArKysgYi9kcml2ZXJzL21l ZGlhL3BsYXRmb3JtL210ay12Y29kZWMvTWFrZWZpbGUNCj4gPiBAQCAtMTEsNiArMTEsNyBAQCBt dGstdmNvZGVjLWRlYy15IDo9IHZkZWMvdmRlY19oMjY0X2lmLm8gXA0KPiA+ICAgCQltdGtfdmNv ZGVjX2RlY19kcnYubyBcDQo+ID4gICAJCXZkZWNfZHJ2X2lmLm8gXA0KPiA+ICAgCQl2ZGVjX3Zw dV9pZi5vIFwNCj4gPiArCQl2ZGVjX21zZ19xdWV1ZS5vIFwNCj4gPiAgIAkJbXRrX3Zjb2RlY19k ZWMubyBcDQo+ID4gICAJCW10a192Y29kZWNfZGVjX3N0YXRlZnVsLm8gXA0KPiA+ICAgCQltdGtf dmNvZGVjX2RlY19zdGF0ZWxlc3MubyBcDQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvbWVkaWEv cGxhdGZvcm0vbXRrLXZjb2RlYy9tdGtfdmNvZGVjX2Rydi5oDQo+ID4gYi9kcml2ZXJzL21lZGlh L3BsYXRmb3JtL210ay12Y29kZWMvbXRrX3Zjb2RlY19kcnYuaA0KPiA+IGluZGV4IGY4ZThiNWJh NDA4Yi4uYWI0MDFiMmRiMzBlIDEwMDY0NA0KPiA+IC0tLSBhL2RyaXZlcnMvbWVkaWEvcGxhdGZv cm0vbXRrLXZjb2RlYy9tdGtfdmNvZGVjX2Rydi5oDQo+ID4gKysrIGIvZHJpdmVycy9tZWRpYS9w bGF0Zm9ybS9tdGstdmNvZGVjL210a192Y29kZWNfZHJ2LmgNCj4gPiBAQCAtMTUsNyArMTUsOSBA QA0KPiA+ICAgI2luY2x1ZGUgPG1lZGlhL3Y0bDItaW9jdGwuaD4NCj4gPiAgICNpbmNsdWRlIDxt ZWRpYS92NGwyLW1lbTJtZW0uaD4NCj4gPiAgICNpbmNsdWRlIDxtZWRpYS92aWRlb2J1ZjItY29y ZS5oPg0KPiA+ICsNCj4gPiAgICNpbmNsdWRlICJtdGtfdmNvZGVjX3V0aWwuaCINCj4gPiArI2lu Y2x1ZGUgInZkZWNfbXNnX3F1ZXVlLmgiDQo+ID4gICANCj4gPiAgICNkZWZpbmUgTVRLX1ZDT0RF Q19EUlZfTkFNRQkibXRrX3Zjb2RlY19kcnYiDQo+ID4gICAjZGVmaW5lIE1US19WQ09ERUNfREVD X05BTUUJIm10ay12Y29kZWMtZGVjIg0KPiA+IEBAIC0yODIsNiArMjg0LDggQEAgc3RydWN0IHZk ZWNfcGljX2luZm8gew0KPiA+ICAgICogQGRlY29kZWRfZnJhbWVfY250OiBudW1iZXIgb2YgZGVj b2RlZCBmcmFtZXMNCj4gPiAgICAqIEBsb2NrOiBwcm90ZWN0IHZhcmlhYmxlcyBhY2Nlc3NlZCBi eSBWNEwyIHRocmVhZHMgYW5kIHdvcmtlcg0KPiA+IHRocmVhZCBzdWNoIGFzDQo+ID4gICAgKgkg IG10a192aWRlb19kZWNfYnVmLg0KPiA+ICsgKg0KPiA+ICsgKiBAbXNnX3F1ZXVlOiBtc2cgcXVl dWUgdXNlZCB0byBzdG9yZSBsYXQgYnVmZmVyIGluZm9ybWF0aW9uLg0KPiA+ICAgICovDQo+ID4g ICBzdHJ1Y3QgbXRrX3Zjb2RlY19jdHggew0KPiA+ICAgCWVudW0gbXRrX2luc3RhbmNlX3R5cGUg dHlwZTsNCj4gPiBAQCAtMzI1LDYgKzMyOSw3IEBAIHN0cnVjdCBtdGtfdmNvZGVjX2N0eCB7DQo+ ID4gICAJaW50IGRlY29kZWRfZnJhbWVfY250Ow0KPiA+ICAgCXN0cnVjdCBtdXRleCBsb2NrOw0K PiA+ICAgDQo+ID4gKwlzdHJ1Y3QgdmRlY19tc2dfcXVldWUgbXNnX3F1ZXVlOw0KPiA+ICAgfTsN Cj4gPiAgIA0KPiA+ICAgZW51bSBtdGtfY2hpcCB7DQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv bWVkaWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX21zZ19xdWV1ZS5jDQo+ID4gYi9kcml2ZXJz L21lZGlhL3BsYXRmb3JtL210ay12Y29kZWMvdmRlY19tc2dfcXVldWUuYw0KPiA+IG5ldyBmaWxl IG1vZGUgMTAwNjQ0DQo+ID4gaW5kZXggMDAwMDAwMDAwMDAwLi5kNjZlZDk4Yzc5YTkNCj4gPiAt LS0gL2Rldi9udWxsDQo+ID4gKysrIGIvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9tdGstdmNvZGVj L3ZkZWNfbXNnX3F1ZXVlLmMNCj4gPiBAQCAtMCwwICsxLDI1OCBAQA0KPiA+ICsvLyBTUERYLUxp Y2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMA0KPiA+ICsvKg0KPiA+ICsgKiBDb3B5cmlnaHQgKGMp IDIwMjEgTWVkaWFUZWsgSW5jLg0KPiA+ICsgKiBBdXRob3I6IFl1bmZlaSBEb25nIDx5dW5mZWku ZG9uZ0BtZWRpYXRlay5jb20+DQo+ID4gKyAqLw0KPiA+ICsNCj4gPiArI2luY2x1ZGUgPGxpbnV4 L2ZyZWV6ZXIuaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L2ludGVycnVwdC5oPg0KPiA+ICsjaW5j bHVkZSA8bGludXgva3RocmVhZC5oPg0KPiA+ICsNCj4gPiArI2luY2x1ZGUgIm10a192Y29kZWNf ZGVjX3BtLmgiDQo+ID4gKyNpbmNsdWRlICJtdGtfdmNvZGVjX2Rydi5oIg0KPiA+ICsjaW5jbHVk ZSAidmRlY19tc2dfcXVldWUuaCINCj4gPiArDQo+ID4gKyNkZWZpbmUgVkRFQ19MQVRfU0xJQ0Vf SEVBREVSX1NaICAgICg2NDAgKiAxMDI0KQ0KPiANCj4gVGhpcyBjYW4gYmUgNjQwICogU1pfMUss IG9yIDUgKiBTWl8xMjhLLi4uLg0KPiAuLi5pZiBhcHBsaWNhYmxlLCBwbGVhc2UgbXVsdGlwbHkg YXMgdmFsdWUgKiBhbGlnbm1lbnQsIHN1Y2ggdGhhdCwNCj4gZm9yIGV4YW1wbGUsDQo+IGlmIHRo ZSBkYXRhIG5lZWRzIHRvIGJlIDFLIGFsaWduZWQsIHlvdSBzaG91bGQgcHJlZmVyIHdyaXRpbmcg aXQgYXMNCj4gNjQwICogU1pfMUsuDQo+IA0KPiA+ICsjZGVmaW5lIFZERUNfRVJSX01BUF9TWl9B VkMgICAgICAgICAoKDgxOTIgLyAxNikgKiAoNDM1MiAvIDE2KSAvDQo+ID4gOCkNCj4gDQpGaXgg aW4gdjguDQo+IC4uLmFuZCB5b3UgY291bGQgZG8gdGhlIHNhbWUgaGVyZS4uLiBleGNlcHQsIEkg c2VlIHNvbWUgc2l6ZXMgaGVyZQ0KPiBiZWluZyBkaXZpZGVkDQo+IGFuZCBtdWx0aXBsaWVkIGFu ZCBJIHRha2UgdGhhdCBhcyBhIGhpbnQuDQo+IEluIHRoYXQgY2FzZSwgd2hlbiB5b3UgY29udmVy dCBpdCB0byB1c2Ugc2l6ZXMgZGVmaW5pdGlvbnMsIGl0IHdvdWxkDQo+IGJlIHZlcnkgbmljZQ0K PiBpZiB5b3Uga2VlcCB0aGF0IGhpbnQgLyBiZXR0ZXIgZGVzY3JpYmUgaXQgaW4gYSBjb21tZW50 Lg0KPiANCkZpeCBpbiB2OC4NCj4gPiArDQo+ID4gKy8qIGxhdCB3cml0ZSBkZWNvZGVkIGhhcmR3 YXJlIGluZm9ybWF0aW9uIHRvIHRyYW5zIGJ1ZmZlciwNCj4gPiArICogYW5kIGNvcmUgd2lsbCBy ZWFkIHRoZSB0cmFucyBidWZmZXIgdG8gZGVjb2RlIGFnYWluLiBUaGUNCj4gPiArICogdHJhbnMg YnVmZmVyIHNpemUgb2YgRkhEIGFuZCA0SyBiaXRzdHJlYW1zIGFyZSBkaWZmZXJlbnQuDQo+ID4g KyAqLw0KPiA+ICtzdGF0aWMgaW50IHZkZV9tc2dfcXVldWVfZ2V0X3RyYW5zX3NpemUoaW50IHdp ZHRoLCBpbnQgaGVpZ2h0KQ0KPiA+ICt7DQo+ID4gKwlpZiAod2lkdGggPiAxOTIwIHx8IGhlaWdo dCA+IDEwODgpDQo+ID4gKwkJcmV0dXJuICgzMCAqIDEwMjQgKiAxMDI0KTsNCj4gDQo+IFNvIGhl cmUgd2UncmUgcmVmZXJyaW5nIHRvIGJ1ZmZlciBzaXplcy4gMTAyNCAqIDEwMjQgaXMgU1pfMU0s IGFzDQo+IGRlZmluZWQgaW4NCj4gbGludXgvc2l6ZXMuaC4NCj4gDQo+IE1lYW5zIHRoYXQgdGhp cyBjYW4gYmUgc2ltcGx5DQo+IA0KPiAJCXJldHVybiAzMCAqIFNaXzFNOw0KPiANCj4gPiArCWVs c2UNCj4gPiArCQlyZXR1cm4gNiAqIDEwMjQgKiAxMDI0Ow0KPiANCj4gCQlyZXR1cm4gNiAqIFNa XzFNOw0KPiANCkZpeCBpbiB2OC4NCj4gPiArfQ0KPiA+ICsNCj4gPiArdm9pZCB2ZGVjX21zZ19x dWV1ZV9pbml0X2N0eChzdHJ1Y3QgdmRlY19tc2dfcXVldWVfY3R4ICpjdHgsDQo+ID4gKwlpbnQg aGFyZHdhcmVfaW5kZXgpDQo+ID4gK3sNCj4gPiArCWluaXRfd2FpdHF1ZXVlX2hlYWQoJmN0eC0+ cmVhZHlfdG9fdXNlKTsNCj4gPiArCUlOSVRfTElTVF9IRUFEKCZjdHgtPnJlYWR5X3F1ZXVlKTsN Cj4gPiArCXNwaW5fbG9ja19pbml0KCZjdHgtPnJlYWR5X2xvY2spOw0KPiA+ICsJY3R4LT5yZWFk eV9udW0gPSAwOw0KPiA+ICsJY3R4LT5oYXJkd2FyZV9pbmRleCA9IGhhcmR3YXJlX2luZGV4Ow0K PiA+ICt9DQo+ID4gKw0KPiA+ICtpbnQgdmRlY19tc2dfcXVldWVfaW5pdCgNCj4gPiArCXN0cnVj dCB2ZGVjX21zZ19xdWV1ZSAqbXNnX3F1ZXVlLA0KPiA+ICsJc3RydWN0IG10a192Y29kZWNfY3R4 ICpjdHgsDQo+ID4gKwljb3JlX2RlY29kZV9jYl90IGNvcmVfZGVjb2RlLA0KPiA+ICsJaW50IHBy aXZhdGVfc2l6ZSkNCj4gPiArew0KPiA+ICsJc3RydWN0IHZkZWNfbGF0X2J1ZiAqbGF0X2J1ZjsN Cj4gPiArCWludCBpLCBlcnI7DQo+ID4gKw0KPiA+ICsJLyogYWxyZWFkeSBpbml0IG1zZyBxdWV1 ZSAqLw0KPiA+ICsJaWYgKG1zZ19xdWV1ZS0+d2RtYV9hZGRyLnNpemUpDQo+ID4gKwkJcmV0dXJu IDA7DQo+ID4gKw0KPiA+ICsJdmRlY19tc2dfcXVldWVfaW5pdF9jdHgoJm1zZ19xdWV1ZS0+bGF0 X2N0eCwgTVRLX1ZERUNfTEFUMCk7DQo+ID4gKwltc2dfcXVldWUtPndkbWFfYWRkci5zaXplID0g dmRlX21zZ19xdWV1ZV9nZXRfdHJhbnNfc2l6ZSgNCj4gPiArCQljdHgtPnBpY2luZm8uYnVmX3cs IGN0eC0+cGljaW5mby5idWZfaCk7DQo+ID4gKw0KPiA+ICsJZXJyID0gbXRrX3Zjb2RlY19tZW1f YWxsb2MoY3R4LCAmbXNnX3F1ZXVlLT53ZG1hX2FkZHIpOw0KPiA+ICsJaWYgKGVycikgew0KPiA+ ICsJCW10a192NGwyX2VycigiZmFpbGVkIHRvIGFsbG9jYXRlIHdkbWFfYWRkciBidWYiKTsNCj4g PiArCQlyZXR1cm4gLUVOT01FTTsNCj4gPiArCX0NCj4gPiArCW1zZ19xdWV1ZS0+d2RtYV9ycHRy X2FkZHIgPSBtc2dfcXVldWUtPndkbWFfYWRkci5kbWFfYWRkcjsNCj4gPiArCW1zZ19xdWV1ZS0+ d2RtYV93cHRyX2FkZHIgPSBtc2dfcXVldWUtPndkbWFfYWRkci5kbWFfYWRkcjsNCj4gPiArDQo+ ID4gKwlmb3IgKGkgPSAwOyBpIDwgTlVNX0JVRkZFUl9DT1VOVDsgaSsrKSB7DQo+ID4gKwkJbGF0 X2J1ZiA9ICZtc2dfcXVldWUtPmxhdF9idWZbaV07DQo+ID4gKw0KPiA+ICsJCWxhdF9idWYtPndk bWFfZXJyX2FkZHIuc2l6ZSA9IFZERUNfRVJSX01BUF9TWl9BVkM7DQo+ID4gKwkJZXJyID0gbXRr X3Zjb2RlY19tZW1fYWxsb2MoY3R4LCAmbGF0X2J1Zi0NCj4gPiA+d2RtYV9lcnJfYWRkcik7DQo+ ID4gKwkJaWYgKGVycikgew0KPiA+ICsJCQltdGtfdjRsMl9lcnIoImZhaWxlZCB0byBhbGxvY2F0 ZSB3ZG1hX2Vycl9hZGRyDQo+ID4gYnVmWyVkXSIsIGkpOw0KPiA+ICsJCQlnb3RvIG1lbV9hbGxv Y19lcnI7DQo+ID4gKwkJfQ0KPiA+ICsNCj4gPiArCQlsYXRfYnVmLT5zbGljZV9iY19hZGRyLnNp emUgPSBWREVDX0xBVF9TTElDRV9IRUFERVJfU1o7DQo+ID4gKwkJZXJyID0gbXRrX3Zjb2RlY19t ZW1fYWxsb2MoY3R4LCAmbGF0X2J1Zi0NCj4gPiA+c2xpY2VfYmNfYWRkcik7DQo+ID4gKwkJaWYg KGVycikgew0KPiA+ICsJCQltdGtfdjRsMl9lcnIoImZhaWxlZCB0byBhbGxvY2F0ZSB3ZG1hX2Fk ZHINCj4gPiBidWZbJWRdIiwgaSk7DQo+ID4gKwkJCWdvdG8gbWVtX2FsbG9jX2VycjsNCj4gPiAr CQl9DQo+ID4gKw0KPiA+ICsJCWxhdF9idWYtPnByaXZhdGVfZGF0YSA9IGt6YWxsb2MocHJpdmF0 ZV9zaXplLA0KPiA+IEdGUF9LRVJORUwpOw0KPiA+ICsJCWlmICghbGF0X2J1Zi0+cHJpdmF0ZV9k YXRhKSB7DQo+ID4gKwkJCW10a192NGwyX2VycigiZmFpbGVkIHRvIGFsbG9jYXRlDQo+ID4gcHJp dmF0ZV9kYXRhWyVkXSIsIGkpOw0KPiA+ICsJCQlnb3RvIG1lbV9hbGxvY19lcnI7DQo+ID4gKwkJ fQ0KPiA+ICsNCj4gPiArCQlsYXRfYnVmLT5jdHggPSBjdHg7DQo+ID4gKwkJbGF0X2J1Zi0+Y29y ZV9kZWNvZGUgPSBjb3JlX2RlY29kZTsNCj4gPiArCQl2ZGVjX21zZ19xdWV1ZV9xYnVmKCZtc2df cXVldWUtPmxhdF9jdHgsIGxhdF9idWYpOw0KPiA+ICsJfQ0KPiA+ICsJcmV0dXJuIDA7DQo+ID4g Kw0KPiA+ICttZW1fYWxsb2NfZXJyOg0KPiA+ICsJdmRlY19tc2dfcXVldWVfZGVpbml0KG1zZ19x dWV1ZSwgY3R4KTsNCj4gPiArCXJldHVybiAtRU5PTUVNOw0KPiA+ICt9DQo+ID4gKw0KPiA+ICtz dGF0aWMgc3RydWN0IGxpc3RfaGVhZCAqdmRlY19nZXRfYnVmX2xpc3QoaW50IGhhcmR3YXJlX2lu ZGV4LA0KPiA+ICsJc3RydWN0IHZkZWNfbGF0X2J1ZiAqYnVmKQ0KPiA+ICt7DQo+ID4gKwlzd2l0 Y2ggKGhhcmR3YXJlX2luZGV4KSB7DQo+ID4gKwljYXNlIE1US19WREVDX0NPUkU6DQo+ID4gKwkJ cmV0dXJuICZidWYtPmNvcmVfbGlzdDsNCj4gPiArCWNhc2UgTVRLX1ZERUNfTEFUMDoNCj4gPiAr CQlyZXR1cm4gJmJ1Zi0+bGF0X2xpc3Q7DQo+ID4gKwlkZWZhdWx0Og0KPiA+ICsJCXJldHVybiBO VUxMOw0KPiA+ICsJfQ0KPiA+ICt9DQo+ID4gKw0KPiA+ICt2b2lkIHZkZWNfbXNnX3F1ZXVlX3Fi dWYoc3RydWN0IHZkZWNfbXNnX3F1ZXVlX2N0eCAqY3R4LA0KPiA+ICsJc3RydWN0IHZkZWNfbGF0 X2J1ZiAqYnVmKQ0KPiA+ICt7DQo+ID4gKwlzdHJ1Y3QgbGlzdF9oZWFkICpoZWFkOw0KPiA+ICsN Cj4gPiArCWhlYWQgPSB2ZGVjX2dldF9idWZfbGlzdChjdHgtPmhhcmR3YXJlX2luZGV4LCBidWYp Ow0KPiA+ICsJaWYgKCFoZWFkKSB7DQo+ID4gKwkJbXRrX3Y0bDJfZXJyKCJmYWlsIHRvIHFidWY6 ICVkIixjdHgtPmhhcmR3YXJlX2luZGV4KTsNCj4gPiArCQlyZXR1cm47DQo+ID4gKwl9DQo+ID4g Kw0KPiA+ICsJc3Bpbl9sb2NrKCZjdHgtPnJlYWR5X2xvY2spOw0KPiA+ICsJbGlzdF9hZGRfdGFp bChoZWFkLCAmY3R4LT5yZWFkeV9xdWV1ZSk7DQo+ID4gKwljdHgtPnJlYWR5X251bSsrOw0KPiA+ ICsNCj4gPiArCXdha2VfdXBfYWxsKCZjdHgtPnJlYWR5X3RvX3VzZSk7DQo+ID4gKw0KPiA+ICsJ bXRrX3Y0bDJfZGVidWcoMywgImVucXVldWUgYnVmIHR5cGU6ICVkIGFkZHI6IDB4JXAgbnVtOiAl ZCIsDQo+ID4gKwkJY3R4LT5oYXJkd2FyZV9pbmRleCwgYnVmLCBjdHgtPnJlYWR5X251bSk7DQo+ ID4gKwlzcGluX3VubG9jaygmY3R4LT5yZWFkeV9sb2NrKTsNCj4gPiArfQ0KPiA+ICsNCj4gPiAr c3RhdGljIGJvb2wgdmRlY19tc2dfcXVldWVfd2FpdF9ldmVudChzdHJ1Y3QgdmRlY19tc2dfcXVl dWVfY3R4DQo+ID4gKmN0eCkNCj4gPiArew0KPiA+ICsJbG9uZyB0aW1lb3V0X2ppZmY7DQo+ID4g KwlpbnQgcmV0Ow0KPiA+ICsNCj4gPiArCWlmIChjdHgtPmhhcmR3YXJlX2luZGV4ID09IE1US19W REVDX0NPUkUpIHsNCj4gPiArCQlyZXQgPSB3YWl0X2V2ZW50X2ZyZWV6YWJsZShjdHgtPnJlYWR5 X3RvX3VzZSwNCj4gPiArCQkJIWxpc3RfZW1wdHkoJmN0eC0+cmVhZHlfcXVldWUpKTsNCj4gPiAr CQlpZiAocmV0KQ0KPiA+ICsJCQlyZXR1cm4gZmFsc2U7DQo+ID4gKwl9IGVsc2Ugew0KPiA+ICsJ CXRpbWVvdXRfamlmZiA9IG1zZWNzX3RvX2ppZmZpZXMoMTUwMCk7DQo+ID4gKwkJcmV0ID0gd2Fp dF9ldmVudF90aW1lb3V0KGN0eC0+cmVhZHlfdG9fdXNlLA0KPiA+ICsJCQkhbGlzdF9lbXB0eSgm Y3R4LT5yZWFkeV9xdWV1ZSksIHRpbWVvdXRfamlmZik7DQo+IA0KPiBTdWdnZXN0aW9uIChmZWVs IGZyZWUgdG8gbm90IGZvbGxvdyB0aGlzIG9uZSk6IHNpbmNlIHlvdSdyZSB1c2luZw0KPiB0aGF0 DQo+IG1zZWNzX3RvX2ppZmZpZXMoMTUwMCkgcmV0dXJuIHZhbHVlIG9ubHkgZm9yIHRoaXMgd2Fp dF9ldmVudF90aW1lb3V0DQo+IGNhbGwsDQo+IHlvdSBtYXkgYXMgd2VsbCByZW1vdmUgdGhlIHRp bWVvdXRfamlmZiB2YXJpYWJsZSBhbmQgc2ltcGx5IGRvDQo+IA0KPiAJCXJldCA9IHdhaXRfZXZl bnRfdGltZW91dChjdHgtPnJlYWR5X3RvX3VzZSwNCj4gDQo+IAkJCQkJICFsaXN0X2VtcHR5KCZj dHgtDQo+ID5yZWFkeV9xdWV1ZSksDQo+IAkNCkZpeCBpbiB2OC4NCj4gCQkJCSBtc2Vjc190b19q aWZmaWVzKDE1MDApKTsNCj4gDQo+ID4gKwkJaWYgKCFyZXQpDQo+ID4gKwkJCXJldHVybiBmYWxz ZTsNCj4gPiArCX0NCj4gPiArDQo+ID4gKwlyZXR1cm4gdHJ1ZTsNCj4gPiArfQ0KPiA+ICsNCj4g PiArc3RydWN0IHZkZWNfbGF0X2J1ZiAqdmRlY19tc2dfcXVldWVfZHFidWYoc3RydWN0DQo+ID4g dmRlY19tc2dfcXVldWVfY3R4ICpjdHgpDQo+ID4gK3sNCj4gPiArCXN0cnVjdCB2ZGVjX2xhdF9i dWYgKmJ1ZjsNCj4gPiArCXN0cnVjdCBsaXN0X2hlYWQgKmhlYWQ7DQo+ID4gKwlpbnQgcmV0Ow0K PiA+ICsNCj4gPiArCXNwaW5fbG9jaygmY3R4LT5yZWFkeV9sb2NrKTsNCj4gPiArCWlmIChsaXN0 X2VtcHR5KCZjdHgtPnJlYWR5X3F1ZXVlKSkgew0KPiA+ICsJCW10a192NGwyX2RlYnVnKDMsICJx dWV1ZSBpcyBOVUxMLCB0eXBlOiVkIG51bTogJWQiLA0KPiA+ICsJCQljdHgtPmhhcmR3YXJlX2lu ZGV4LCBjdHgtPnJlYWR5X251bSk7DQo+ID4gKwkJc3Bpbl91bmxvY2soJmN0eC0+cmVhZHlfbG9j ayk7DQo+ID4gKwkJcmV0ID0gdmRlY19tc2dfcXVldWVfd2FpdF9ldmVudChjdHgpOw0KPiA+ICsJ CWlmICghcmV0KQ0KPiA+ICsJCQlyZXR1cm4gTlVMTDsNCj4gPiArCQlzcGluX2xvY2soJmN0eC0+ cmVhZHlfbG9jayk7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJaWYgKGN0eC0+aGFyZHdhcmVfaW5k ZXggPT0gTVRLX1ZERUNfQ09SRSkNCj4gPiArCQlidWYgPSBsaXN0X2ZpcnN0X2VudHJ5KCZjdHgt PnJlYWR5X3F1ZXVlLA0KPiA+ICsJCQlzdHJ1Y3QgdmRlY19sYXRfYnVmLCBjb3JlX2xpc3QpOw0K PiA+ICsJZWxzZQ0KPiA+ICsJCWJ1ZiA9IGxpc3RfZmlyc3RfZW50cnkoJmN0eC0+cmVhZHlfcXVl dWUsDQo+ID4gKwkJCXN0cnVjdCB2ZGVjX2xhdF9idWYsIGxhdF9saXN0KTsNCj4gPiArDQo+ID4g KwloZWFkID0gdmRlY19nZXRfYnVmX2xpc3QoY3R4LT5oYXJkd2FyZV9pbmRleCwgYnVmKTsNCj4g PiArCWlmICghaGVhZCkgew0KPiA+ICsJCW10a192NGwyX2VycigiZmFpbCB0byBkcWJ1ZjogJWQi LGN0eC0+aGFyZHdhcmVfaW5kZXgpOw0KPiA+ICsJCXJldHVybiBOVUxMOw0KPiA+ICsJfQ0KPiA+ ICsJbGlzdF9kZWwoaGVhZCk7DQo+ID4gKw0KPiA+ICsJY3R4LT5yZWFkeV9udW0tLTsNCj4gPiAr CW10a192NGwyX2RlYnVnKDMsICJkcXVldWUgYnVmIHR5cGU6JWQgYWRkcjogMHglcCBudW06ICVk IiwNCj4gPiArCQljdHgtPmhhcmR3YXJlX2luZGV4LCBidWYsIGN0eC0+cmVhZHlfbnVtKTsNCj4g PiArCXNwaW5fdW5sb2NrKCZjdHgtPnJlYWR5X2xvY2spOw0KPiA+ICsNCj4gPiArCXJldHVybiBi dWY7DQo+ID4gK30NCj4gPiArDQo+ID4gK3ZvaWQgdmRlY19tc2dfcXVldWVfdXBkYXRlX3ViZV9y cHRyKHN0cnVjdCB2ZGVjX21zZ19xdWV1ZQ0KPiA+ICptc2dfcXVldWUsDQo+ID4gKwl1aW50NjRf dCB1YmVfcnB0cikNCj4gPiArew0KPiA+ICsJc3Bpbl9sb2NrKCZtc2dfcXVldWUtPmxhdF9jdHgu cmVhZHlfbG9jayk7DQo+ID4gKwltc2dfcXVldWUtPndkbWFfcnB0cl9hZGRyID0gdWJlX3JwdHI7 DQo+ID4gKwltdGtfdjRsMl9kZWJ1ZygzLCAidXBkYXRlIHViZSBycHJ0ICgweCVsbHgpIiwgdWJl X3JwdHIpOw0KPiA+ICsJc3Bpbl91bmxvY2soJm1zZ19xdWV1ZS0+bGF0X2N0eC5yZWFkeV9sb2Nr KTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArdm9pZCB2ZGVjX21zZ19xdWV1ZV91cGRhdGVfdWJlX3dw dHIoc3RydWN0IHZkZWNfbXNnX3F1ZXVlDQo+ID4gKm1zZ19xdWV1ZSwNCj4gPiArCXVpbnQ2NF90 IHViZV93cHRyKQ0KPiA+ICt7DQo+ID4gKwlzcGluX2xvY2soJm1zZ19xdWV1ZS0+bGF0X2N0eC5y ZWFkeV9sb2NrKTsNCj4gPiArCW1zZ19xdWV1ZS0+d2RtYV93cHRyX2FkZHIgPSB1YmVfd3B0cjsN Cj4gPiArCW10a192NGwyX2RlYnVnKDMsICJ1cGRhdGUgdWJlIHdwcnQ6ICgweCVsbHggMHglbGx4 KSBvZmZzZXQ6DQo+ID4gMHglbGx4IiwNCj4gPiArCQltc2dfcXVldWUtPndkbWFfcnB0cl9hZGRy LCBtc2dfcXVldWUtPndkbWFfd3B0cl9hZGRyLA0KPiA+IHViZV93cHRyKTsNCj4gPiArCXNwaW5f dW5sb2NrKCZtc2dfcXVldWUtPmxhdF9jdHgucmVhZHlfbG9jayk7DQo+ID4gK30NCj4gPiArDQo+ ID4gK2Jvb2wgdmRlY19tc2dfcXVldWVfd2FpdF9sYXRfYnVmX2Z1bGwoc3RydWN0IHZkZWNfbXNn X3F1ZXVlDQo+ID4gKm1zZ19xdWV1ZSkNCj4gPiArew0KPiA+ICsJbG9uZyB0aW1lb3V0X2ppZmY7 DQo+ID4gKwlpbnQgcmV0Ow0KPiA+ICsNCj4gPiArCXRpbWVvdXRfamlmZiA9IG1zZWNzX3RvX2pp ZmZpZXMoMTAwMCAqIChOVU1fQlVGRkVSX0NPVU5UICsgMikpOw0KPiA+ICsNCj4gPiArCXJldCA9 IHdhaXRfZXZlbnRfdGltZW91dChtc2dfcXVldWUtPmxhdF9jdHgucmVhZHlfdG9fdXNlLA0KPiA+ ICsJCW1zZ19xdWV1ZS0+bGF0X2N0eC5yZWFkeV9udW0gPT0gTlVNX0JVRkZFUl9DT1VOVCwNCj4g PiArCQl0aW1lb3V0X2ppZmYpOw0KPiA+ICsJaWYgKHJldCkgew0KPiA+ICsJCW10a192NGwyX2Rl YnVnKDMsICJzdWNjZXNzIHRvIGdldCBsYXQgYnVmOiAlZCIsDQo+ID4gKwkJCW1zZ19xdWV1ZS0+ bGF0X2N0eC5yZWFkeV9udW0pOw0KPiA+ICsJCXJldHVybiB0cnVlOw0KPiA+ICsJfQ0KPiA+ICsJ bXRrX3Y0bDJfZXJyKCJmYWlsZWQgd2l0aCBsYXQgYnVmIGlzbid0IGZ1bGw6ICVkIiwNCj4gPiAr CQltc2dfcXVldWUtPmxhdF9jdHgucmVhZHlfbnVtKTsNCj4gPiArCXJldHVybiBmYWxzZTsNCj4g PiArfQ0KPiA+ICsNCj4gPiArdm9pZCB2ZGVjX21zZ19xdWV1ZV9kZWluaXQoDQo+ID4gKwlzdHJ1 Y3QgdmRlY19tc2dfcXVldWUgKm1zZ19xdWV1ZSwNCj4gPiArCXN0cnVjdCBtdGtfdmNvZGVjX2N0 eCAqY3R4KQ0KPiA+ICt7DQo+ID4gKwlzdHJ1Y3QgdmRlY19sYXRfYnVmICpsYXRfYnVmOw0KPiA+ ICsJc3RydWN0IG10a192Y29kZWNfbWVtICptZW07DQo+ID4gKwlpbnQgaTsNCj4gPiArDQo+ID4g KwltZW0gPSAmbXNnX3F1ZXVlLT53ZG1hX2FkZHI7DQo+ID4gKwlpZiAobWVtLT52YSkNCj4gPiAr CQltdGtfdmNvZGVjX21lbV9mcmVlKGN0eCwgbWVtKTsNCj4gPiArCWZvciAoaSA9IDA7IGkgPCBO VU1fQlVGRkVSX0NPVU5UOyBpKyspIHsNCj4gPiArCQlsYXRfYnVmID0gJm1zZ19xdWV1ZS0+bGF0 X2J1ZltpXTsNCj4gPiArDQo+ID4gKwkJbWVtID0gJmxhdF9idWYtPndkbWFfZXJyX2FkZHI7DQo+ ID4gKwkJaWYgKG1lbS0+dmEpDQo+ID4gKwkJCW10a192Y29kZWNfbWVtX2ZyZWUoY3R4LCBtZW0p Ow0KPiA+ICsNCj4gPiArCQltZW0gPSAmbGF0X2J1Zi0+c2xpY2VfYmNfYWRkcjsNCj4gPiArCQlp ZiAobWVtLT52YSkNCj4gPiArCQkJbXRrX3Zjb2RlY19tZW1fZnJlZShjdHgsIG1lbSk7DQo+ID4g Kw0KPiA+ICsJCWlmIChsYXRfYnVmLT5wcml2YXRlX2RhdGEpDQo+ID4gKwkJCWtmcmVlKGxhdF9i dWYtPnByaXZhdGVfZGF0YSk7DQo+ID4gKwl9DQo+ID4gK30NCj4gPiBkaWZmIC0tZ2l0IGEvZHJp dmVycy9tZWRpYS9wbGF0Zm9ybS9tdGstdmNvZGVjL3ZkZWNfbXNnX3F1ZXVlLmgNCj4gPiBiL2Ry aXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX21zZ19xdWV1ZS5oDQo+ID4gbmV3 IGZpbGUgbW9kZSAxMDA2NDQNCj4gPiBpbmRleCAwMDAwMDAwMDAwMDAuLjE5MDVjZTcxMzU5Mg0K PiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL210ay12 Y29kZWMvdmRlY19tc2dfcXVldWUuaA0KPiA+IEBAIC0wLDAgKzEsMTUxIEBADQo+ID4gKy8vIFNQ RFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwtMi4wDQo+ID4gKy8qDQo+ID4gKyAqIENvcHlyaWdo dCAoYykgMjAyMSBNZWRpYVRlayBJbmMuDQo+ID4gKyAqIEF1dGhvcjogWXVuZmVpIERvbmcgPHl1 bmZlaS5kb25nQG1lZGlhdGVrLmNvbT4NCj4gPiArICovDQo+ID4gKw0KPiA+ICsjaWZuZGVmIF9W REVDX01TR19RVUVVRV9IXw0KPiA+ICsjZGVmaW5lIF9WREVDX01TR19RVUVVRV9IXw0KPiA+ICsN Cj4gPiArI2luY2x1ZGUgPGxpbnV4L3NjaGVkLmg+DQo+ID4gKyNpbmNsdWRlIDxsaW51eC9zZW1h cGhvcmUuaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L3NsYWIuaD4NCj4gPiArI2luY2x1ZGUgPG1l ZGlhL3ZpZGVvYnVmMi12NGwyLmg+DQo+ID4gKw0KPiA+ICsjaW5jbHVkZSAibXRrX3Zjb2RlY191 dGlsLmgiDQo+ID4gKw0KPiA+ICsjZGVmaW5lIE5VTV9CVUZGRVJfQ09VTlQgMw0KPiA+ICsNCj4g PiArc3RydWN0IHZkZWNfbGF0X2J1ZjsNCj4gPiArc3RydWN0IG10a192Y29kZWNfY3R4Ow0KPiA+ ICtzdHJ1Y3QgbXRrX3Zjb2RlY19kZXY7DQo+ID4gK3R5cGVkZWYgaW50ICgqY29yZV9kZWNvZGVf Y2JfdCkoc3RydWN0IHZkZWNfbGF0X2J1ZiAqbGF0X2J1Zik7DQo+ID4gKw0KPiA+ICsvKioNCj4g PiArICogc3RydWN0IHZkZWNfbXNnX3F1ZXVlX2N0eCAtIHJlcHJlc2VudHMgYSBxdWV1ZSBmb3Ig YnVmZmVycw0KPiA+IHJlYWR5IHRvIGJlDQo+ID4gKyAqCSAgICAgICAgICAgICAgICAgICAgICAg ICAgIHByb2Nlc3NlZA0KPiANCj4gSSB3b3VsZCBwcmVmZXIgaWYgeW91IGRvbid0IGJyZWFrIHRo aXMgbGluZSwgODQgY29sdW1ucyBpcyBmaW5lIHRvDQo+IGhhdmUuDQo+IA0KRml4IGluIHY4Lj4g PiArICogQHJlYWR5X3VzZWQ6IHJlYWR5IHVzZWQgcXVldWUgdXNlZCB0byBzaWduYWxpemUgd2hl biBnZXQgYSBqb2INCj4gPiBxdWV1ZQ0KPiA+ICsgKiBAcmVhZHlfcXVldWU6IGxpc3Qgb2YgcmVh ZHkgbGF0IGJ1ZmZlciBxdWV1ZXMNCj4gPiArICogQHJlYWR5X2xvY2s6IHNwaW4gbG9jayB0byBw cm90ZWN0IHRoZSBsYXQgYnVmZmVyIHVzYWdlDQo+ID4gKyAqIEByZWFkeV9udW06IG51bWJlciBv ZiBidWZmZXJzIHJlYWR5IHRvIGJlIHByb2Nlc3NlZA0KPiA+ICsgKiBAaGFyZHdhcmVfaW5kZXg6 IGhhcmR3YXJlIGlkIHRoYXQgdGhpcyBxdWV1ZSBpcyB1c2VkIGZvcg0KPiA+ICsgKi8NCj4gPiAr c3RydWN0IHZkZWNfbXNnX3F1ZXVlX2N0eCB7DQo+ID4gKwl3YWl0X3F1ZXVlX2hlYWRfdCByZWFk eV90b191c2U7DQo+ID4gKwlzdHJ1Y3QgbGlzdF9oZWFkIHJlYWR5X3F1ZXVlOw0KPiA+ICsJc3Bp bmxvY2tfdCByZWFkeV9sb2NrOw0KPiA+ICsJaW50IHJlYWR5X251bTsNCj4gPiArCWludCBoYXJk d2FyZV9pbmRleDsNCj4gPiArfTsNCj4gPiArDQo+ID4gKy8qKg0KPiA+ICsgKiBzdHJ1Y3QgdmRl Y19sYXRfYnVmIC0gbGF0IGJ1ZmZlciBtZXNzYWdlIHVzZWQgdG8gc3RvcmUgbGF0DQo+ID4gKyAq ICAgICAgICAgICAgICAgICAgICAgICBpbmZvIGZvciBjb3JlIGRlY29kZQ0KPiA+ICsgKiBAd2Rt YV9lcnJfYWRkcjogd2RtYSBlcnJvciBhZGRyZXNzIHVzZWQgZm9yIGxhdCBoYXJkd2FyZQ0KPiA+ ICsgKiBAc2xpY2VfYmNfYWRkcjogc2xpY2UgYmMgYWRkcmVzcyB1c2VkIGZvciBsYXQgaGFyZHdh cmUNCj4gPiArICogQHRzX2luZm86IG5lZWQgdG8gc2V0IHRpbWVzdGFtcCBmcm9tIG91dHB1dCB0 byBjYXB0dXJlDQo+ID4gKyAqDQo+ID4gKyAqIEBwcml2YXRlX2RhdGE6IHNoYXJlZCBpbmZvcm1h dGlvbiB1c2VkIHRvIGxhdCBhbmQgY29yZSBoYXJkd2FyZQ0KPiA+ICsgKiBAY3R4OiBtdGsgdmNv ZGVjIGNvbnRleHQgaW5mb3JtYXRpb24NCj4gPiArICogQGNvcmVfZGVjb2RlOiBkaWZmZXJlbnQg Y29kZWMgdXNlIGRpZmZlcmVudCBkZWNvZGUgY2FsbGJhY2sNCj4gPiBmdW5jdGlvbg0KPiA+ICsg KiBAbGF0X2xpc3Q6IGFkZCBsYXQgYnVmZmVyIHRvIGxhdCBoZWFkIGxpc3QNCj4gPiArICogQGNv cmVfbGlzdDogYWRkIGxhdCBidWZmZXIgdG8gY29yZSBoZWFkIGxpc3QNCj4gPiArICovDQo+ID4g K3N0cnVjdCB2ZGVjX2xhdF9idWYgew0KPiA+ICsJc3RydWN0IG10a192Y29kZWNfbWVtIHdkbWFf ZXJyX2FkZHI7DQo+ID4gKwlzdHJ1Y3QgbXRrX3Zjb2RlY19tZW0gc2xpY2VfYmNfYWRkcjsNCj4g PiArCXN0cnVjdCB2YjJfdjRsMl9idWZmZXIgdHNfaW5mbzsNCj4gPiArDQo+ID4gKwl2b2lkICpw cml2YXRlX2RhdGE7DQo+ID4gKwlzdHJ1Y3QgbXRrX3Zjb2RlY19jdHggKmN0eDsNCj4gPiArCWNv cmVfZGVjb2RlX2NiX3QgY29yZV9kZWNvZGU7DQo+ID4gKwlzdHJ1Y3QgbGlzdF9oZWFkIGxhdF9s aXN0Ow0KPiA+ICsJc3RydWN0IGxpc3RfaGVhZCBjb3JlX2xpc3Q7DQo+ID4gK307DQo+ID4gKw0K PiA+ICsvKioNCj4gPiArICogc3RydWN0IHZkZWNfbXNnX3F1ZXVlIC0gdXNlZCB0byBzdG9yZSBs YXQgYnVmZmVyIG1lc3NhZ2UNCj4gPiArICogQGxhdF9idWY6IGxhdCBidWZmZXIgdXNlZCB0byBz dG9yZSBsYXQgYnVmZmVyIGluZm9ybWF0aW9uDQo+ID4gKyAqIEB3ZG1hX2FkZHI6IHdkbWEgYWRk cmVzcyB1c2VkIGZvciB1YmUNCj4gPiArICogQHdkbWFfcnB0cl9hZGRyOiB1YmUgcmVhZCBwb2lu dA0KPiA+ICsgKiBAd2RtYV93cHRyX2FkZHI6IHViZSB3cml0ZSBwb2ludA0KPiA+ICsgKiBAbGF0 X2N0eDogdXNlZCB0byBzdG9yZSBsYXQgYnVmZmVyIGxpc3QNCj4gPiArICovDQo+ID4gK3N0cnVj dCB2ZGVjX21zZ19xdWV1ZSB7DQo+ID4gKwlzdHJ1Y3QgdmRlY19sYXRfYnVmIGxhdF9idWZbTlVN X0JVRkZFUl9DT1VOVF07DQo+ID4gKw0KPiA+ICsJc3RydWN0IG10a192Y29kZWNfbWVtIHdkbWFf YWRkcjsNCj4gPiArCXVpbnQ2NF90IHdkbWFfcnB0cl9hZGRyOw0KPiA+ICsJdWludDY0X3Qgd2Rt YV93cHRyX2FkZHI7DQo+ID4gKw0KPiA+ICsJc3RydWN0IHZkZWNfbXNnX3F1ZXVlX2N0eCBsYXRf Y3R4Ow0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArLyoqDQo+ID4gKyAqIHZkZWNfbXNnX3F1ZXVlX2lu aXQgLSBpbml0IGxhdCBidWZmZXIgaW5mb3JtYXRpb24uDQo+ID4gKyAqIEBtc2dfcXVldWU6IHVz ZWQgdG8gc3RvcmUgdGhlIGxhdCBidWZmZXIgaW5mb3JtYXRpb24NCj4gPiArICogQGN0eDogdjRs MiBjdHgNCj4gPiArICogQGNvcmVfZGVjb2RlOiBjb3JlIGRlY29kZSBjYWxsYmFjayBmb3IgZWFj aCBjb2RlYw0KPiA+ICsgKiBAcHJpdmF0ZV9zaXplOiB0aGUgcHJpdmF0ZSBkYXRhIHNpemUgdXNl ZCB0byBzaGFyZSB3aXRoIGNvcmUNCj4gPiArICovDQo+ID4gK2ludCB2ZGVjX21zZ19xdWV1ZV9p bml0KA0KPiA+ICsJc3RydWN0IHZkZWNfbXNnX3F1ZXVlICptc2dfcXVldWUsDQo+ID4gKwlzdHJ1 Y3QgbXRrX3Zjb2RlY19jdHggKmN0eCwNCj4gPiArCWNvcmVfZGVjb2RlX2NiX3QgY29yZV9kZWNv ZGUsDQo+ID4gKwlpbnQgcHJpdmF0ZV9zaXplKTsNCj4gPiArDQo+ID4gKy8qKg0KPiA+ICsgKiB2 ZGVjX21zZ19xdWV1ZV9pbml0X2N0eCAtIHVzZWQgdG8gaW5pdCBtc2cgcXVldWUgY29udGV4dA0K PiA+IGluZm9ybWF0aW9uLg0KPiA+ICsgKiBAY3R4OiBtZXNzYWdlIHF1ZXVlIGNvbnRleHQNCj4g PiArICogQGhhcmR3YXJlX2luZGV4OiBoYXJkd2FyZSBpbmRleA0KPiA+ICsgKi8NCj4gPiArdm9p ZCB2ZGVjX21zZ19xdWV1ZV9pbml0X2N0eChzdHJ1Y3QgdmRlY19tc2dfcXVldWVfY3R4ICpjdHgs DQo+ID4gKwlpbnQgaGFyZHdhcmVfaW5kZXgpOw0KPiA+ICsNCj4gPiArLyoqDQo+ID4gKyAqIHZk ZWNfbXNnX3F1ZXVlX3FidWYgLSBlbnF1ZXVlIGxhdCBidWZmZXIgdG8gcXVldWUgbGlzdC4NCj4g PiArICogQGN0eDogbWVzc2FnZSBxdWV1ZSBjb250ZXh0DQo+ID4gKyAqIEBidWY6IGN1cnJlbnQg bGF0IGJ1ZmZlcg0KPiA+ICsgKi8NCj4gPiArdm9pZCB2ZGVjX21zZ19xdWV1ZV9xYnVmKHN0cnVj dCB2ZGVjX21zZ19xdWV1ZV9jdHggKmN0eCwNCj4gPiArCXN0cnVjdCB2ZGVjX2xhdF9idWYgKmJ1 Zik7DQo+ID4gKw0KPiA+ICsvKioNCj4gPiArICogdmRlY19tc2dfcXVldWVfZHFidWYgLSBkZXF1 ZXVlIGxhdCBidWZmZXIgZnJvbSBxdWV1ZSBsaXN0Lg0KPiA+ICsgKiBAY3R4OiBtZXNzYWdlIHF1 ZXVlIGNvbnRleHQNCj4gPiArICovDQo+ID4gK3N0cnVjdCB2ZGVjX2xhdF9idWYgKnZkZWNfbXNn X3F1ZXVlX2RxYnVmKHN0cnVjdA0KPiA+IHZkZWNfbXNnX3F1ZXVlX2N0eCAqY3R4KTsNCj4gPiAr DQo+ID4gKy8qKg0KPiA+ICsgKiB2ZGVjX21zZ19xdWV1ZV91cGRhdGVfdWJlX3JwdHIgLSB1c2Vk IHRvIHVwZGF0YSB0aGUgdWJlIHJlYWQNCj4gPiBwb2ludC4NCj4gPiArICogQG1zZ19xdWV1ZTog dXNlZCB0byBzdG9yZSB0aGUgbGF0IGJ1ZmZlciBpbmZvcm1hdGlvbg0KPiA+ICsgKiBAdWJlX3Jw dHI6IGN1cnJlbnQgdWJlIHJlYWQgcG9pbnQNCj4gPiArICovDQo+ID4gK3ZvaWQgdmRlY19tc2df cXVldWVfdXBkYXRlX3ViZV9ycHRyKHN0cnVjdCB2ZGVjX21zZ19xdWV1ZQ0KPiA+ICptc2dfcXVl dWUsDQo+ID4gKwl1aW50NjRfdCB1YmVfcnB0cik7DQo+ID4gKw0KPiA+ICsvKioNCj4gPiArICog dmRlY19tc2dfcXVldWVfdXBkYXRlX3ViZV93cHRyIC0gdXNlZCB0byB1cGRhdGEgdGhlIHViZSB3 cml0ZQ0KPiA+IHBvaW50Lg0KPiA+ICsgKiBAbXNnX3F1ZXVlOiB1c2VkIHRvIHN0b3JlIHRoZSBs YXQgYnVmZmVyIGluZm9ybWF0aW9uDQo+ID4gKyAqIEB1YmVfd3B0cjogY3VycmVudCB1YmUgd3Jp dGUgcG9pbnQNCj4gPiArICovDQo+ID4gK3ZvaWQgdmRlY19tc2dfcXVldWVfdXBkYXRlX3ViZV93 cHRyKHN0cnVjdCB2ZGVjX21zZ19xdWV1ZQ0KPiA+ICptc2dfcXVldWUsDQo+ID4gKwl1aW50NjRf dCB1YmVfd3B0cik7DQo+ID4gKw0KPiA+ICsvKioNCj4gPiArICogdmRlY19tc2dfcXVldWVfd2Fp dF9sYXRfYnVmX2Z1bGwgLSB1c2VkIHRvIGNoZWNrIHdoZXRoZXIgYWxsDQo+ID4gbGF0IGJ1ZmZl cg0KPiA+ICsgKiAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGluIGxhdCBsaXN0 Lg0KPiA+ICsgKiBAbXNnX3F1ZXVlOiB1c2VkIHRvIHN0b3JlIHRoZSBsYXQgYnVmZmVyIGluZm9y bWF0aW9uDQo+ID4gKyAqLw0KPiA+ICtib29sIHZkZWNfbXNnX3F1ZXVlX3dhaXRfbGF0X2J1Zl9m dWxsKHN0cnVjdCB2ZGVjX21zZ19xdWV1ZQ0KPiA+ICptc2dfcXVldWUpOw0KPiA+ICsNCj4gPiAr LyoqDQo+ID4gKyAqIHZkZWNfbXNnX3F1ZXVlX2RlaW5pdCAtIGRlaW5pdCBsYXQgYnVmZmVyIGlu Zm9ybWF0aW9uLg0KPiA+ICsgKiBAbXNnX3F1ZXVlOiB1c2VkIHRvIHN0b3JlIHRoZSBsYXQgYnVm ZmVyIGluZm9ybWF0aW9uDQo+ID4gKyAqIEBjdHg6IHY0bDIgY3R4DQo+ID4gKyAqLw0KPiA+ICt2 b2lkIHZkZWNfbXNnX3F1ZXVlX2RlaW5pdCgNCj4gPiArCXN0cnVjdCB2ZGVjX21zZ19xdWV1ZSAq bXNnX3F1ZXVlLA0KPiA+ICsJc3RydWN0IG10a192Y29kZWNfY3R4ICpjdHgpOw0KPiA+ICsNCj4g DQo+IHZvaWQgdmRlY19tc2dfcXVldWVfZGVpbml0KHN0cnVjdCB2ZGVjX21zZ19xdWV1ZSAqbXNn X3F1ZXVlLA0KPiAJCQkgICBzdHJ1Y3QgbXRrX3Zjb2RlY19jdHggKmN0eCk7DQo+ID4gKyNlbmRp Zg0KPiA+IA0KPiANCj4gUmVnYXJkcywNCj4gLSBBbmdlbG8NCkJlc3QgUmVnYXJkcywNCll1bmZl aSBEb25nDQo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 412AAC433F5 for ; Wed, 27 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(10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Oct 2021 12:01:06 +0800 Message-ID: Subject: Re: [PATCH v7, 08/15] media: mtk-vcodec: Add msg queue feature for lat and core architecture From: "yunfei.dong@mediatek.com" To: AngeloGioacchino Del Regno , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , "Tiffany Lin" , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Dafna Hirschfeld , Benjamin Gaignard , Daniel Vetter , dri-devel , Irui Wang , , , , , , , Date: Wed, 27 Oct 2021 12:01:06 +0800 In-Reply-To: <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> References: <20211011070247.792-1-yunfei.dong@mediatek.com> <20211011070247.792-9-yunfei.dong@mediatek.com> <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211026_210125_179099_29376D20 X-CRM114-Status: GOOD ( 41.89 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi AngeloGioacchino, Thanks for your suggestion. On Thu, 2021-10-14 at 12:35 +0200, AngeloGioacchino Del Regno wrote: > > For lat and core architecture, lat thread will send message to core > > thread when lat decode done. Core hardware will use the message > > from lat to decode, then free message to lat thread when decode > > done. > > > > Signed-off-by: Yunfei Dong > > --- > > drivers/media/platform/mtk-vcodec/Makefile | 1 + > > .../platform/mtk-vcodec/mtk_vcodec_drv.h | 5 + > > .../platform/mtk-vcodec/vdec_msg_queue.c | 258 > > ++++++++++++++++++ > > .../platform/mtk-vcodec/vdec_msg_queue.h | 151 ++++++++++ > > 4 files changed, 415 insertions(+) > > create mode 100644 drivers/media/platform/mtk- > > vcodec/vdec_msg_queue.c > > create mode 100644 drivers/media/platform/mtk- > > vcodec/vdec_msg_queue.h > > > > diff --git a/drivers/media/platform/mtk-vcodec/Makefile > > b/drivers/media/platform/mtk-vcodec/Makefile > > index edeb3b66e9e9..5000e59da576 100644 > > --- a/drivers/media/platform/mtk-vcodec/Makefile > > +++ b/drivers/media/platform/mtk-vcodec/Makefile > > @@ -11,6 +11,7 @@ mtk-vcodec-dec-y := vdec/vdec_h264_if.o \ > > mtk_vcodec_dec_drv.o \ > > vdec_drv_if.o \ > > vdec_vpu_if.o \ > > + vdec_msg_queue.o \ > > mtk_vcodec_dec.o \ > > mtk_vcodec_dec_stateful.o \ > > mtk_vcodec_dec_stateless.o \ > > diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > index f8e8b5ba408b..ab401b2db30e 100644 > > --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > @@ -15,7 +15,9 @@ > > #include > > #include > > #include > > + > > #include "mtk_vcodec_util.h" > > +#include "vdec_msg_queue.h" > > > > #define MTK_VCODEC_DRV_NAME "mtk_vcodec_drv" > > #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec" > > @@ -282,6 +284,8 @@ struct vdec_pic_info { > > * @decoded_frame_cnt: number of decoded frames > > * @lock: protect variables accessed by V4L2 threads and worker > > thread such as > > * mtk_video_dec_buf. > > + * > > + * @msg_queue: msg queue used to store lat buffer information. > > */ > > struct mtk_vcodec_ctx { > > enum mtk_instance_type type; > > @@ -325,6 +329,7 @@ struct mtk_vcodec_ctx { > > int decoded_frame_cnt; > > struct mutex lock; > > > > + struct vdec_msg_queue msg_queue; > > }; > > > > enum mtk_chip { > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > new file mode 100644 > > index 000000000000..d66ed98c79a9 > > --- /dev/null > > +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > @@ -0,0 +1,258 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2021 MediaTek Inc. > > + * Author: Yunfei Dong > > + */ > > + > > +#include > > +#include > > +#include > > + > > +#include "mtk_vcodec_dec_pm.h" > > +#include "mtk_vcodec_drv.h" > > +#include "vdec_msg_queue.h" > > + > > +#define VDEC_LAT_SLICE_HEADER_SZ (640 * 1024) > > This can be 640 * SZ_1K, or 5 * SZ_128K.... > ...if applicable, please multiply as value * alignment, such that, > for example, > if the data needs to be 1K aligned, you should prefer writing it as > 640 * SZ_1K. > > > +#define VDEC_ERR_MAP_SZ_AVC ((8192 / 16) * (4352 / 16) / > > 8) > Fix in v8. > ...and you could do the same here... except, I see some sizes here > being divided > and multiplied and I take that as a hint. > In that case, when you convert it to use sizes definitions, it would > be very nice > if you keep that hint / better describe it in a comment. > Fix in v8. > > + > > +/* lat write decoded hardware information to trans buffer, > > + * and core will read the trans buffer to decode again. The > > + * trans buffer size of FHD and 4K bitstreams are different. > > + */ > > +static int vde_msg_queue_get_trans_size(int width, int height) > > +{ > > + if (width > 1920 || height > 1088) > > + return (30 * 1024 * 1024); > > So here we're referring to buffer sizes. 1024 * 1024 is SZ_1M, as > defined in > linux/sizes.h. > > Means that this can be simply > > return 30 * SZ_1M; > > > + else > > + return 6 * 1024 * 1024; > > return 6 * SZ_1M; > Fix in v8. > > +} > > + > > +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, > > + int hardware_index) > > +{ > > + init_waitqueue_head(&ctx->ready_to_use); > > + INIT_LIST_HEAD(&ctx->ready_queue); > > + spin_lock_init(&ctx->ready_lock); > > + ctx->ready_num = 0; > > + ctx->hardware_index = hardware_index; > > +} > > + > > +int vdec_msg_queue_init( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx, > > + core_decode_cb_t core_decode, > > + int private_size) > > +{ > > + struct vdec_lat_buf *lat_buf; > > + int i, err; > > + > > + /* already init msg queue */ > > + if (msg_queue->wdma_addr.size) > > + return 0; > > + > > + vdec_msg_queue_init_ctx(&msg_queue->lat_ctx, MTK_VDEC_LAT0); > > + msg_queue->wdma_addr.size = vde_msg_queue_get_trans_size( > > + ctx->picinfo.buf_w, ctx->picinfo.buf_h); > > + > > + err = mtk_vcodec_mem_alloc(ctx, &msg_queue->wdma_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_addr buf"); > > + return -ENOMEM; > > + } > > + msg_queue->wdma_rptr_addr = msg_queue->wdma_addr.dma_addr; > > + msg_queue->wdma_wptr_addr = msg_queue->wdma_addr.dma_addr; > > + > > + for (i = 0; i < NUM_BUFFER_COUNT; i++) { > > + lat_buf = &msg_queue->lat_buf[i]; > > + > > + lat_buf->wdma_err_addr.size = VDEC_ERR_MAP_SZ_AVC; > > + err = mtk_vcodec_mem_alloc(ctx, &lat_buf- > > >wdma_err_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_err_addr > > buf[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->slice_bc_addr.size = VDEC_LAT_SLICE_HEADER_SZ; > > + err = mtk_vcodec_mem_alloc(ctx, &lat_buf- > > >slice_bc_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_addr > > buf[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->private_data = kzalloc(private_size, > > GFP_KERNEL); > > + if (!lat_buf->private_data) { > > + mtk_v4l2_err("failed to allocate > > private_data[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->ctx = ctx; > > + lat_buf->core_decode = core_decode; > > + vdec_msg_queue_qbuf(&msg_queue->lat_ctx, lat_buf); > > + } > > + return 0; > > + > > +mem_alloc_err: > > + vdec_msg_queue_deinit(msg_queue, ctx); > > + return -ENOMEM; > > +} > > + > > +static struct list_head *vdec_get_buf_list(int hardware_index, > > + struct vdec_lat_buf *buf) > > +{ > > + switch (hardware_index) { > > + case MTK_VDEC_CORE: > > + return &buf->core_list; > > + case MTK_VDEC_LAT0: > > + return &buf->lat_list; > > + default: > > + return NULL; > > + } > > +} > > + > > +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, > > + struct vdec_lat_buf *buf) > > +{ > > + struct list_head *head; > > + > > + head = vdec_get_buf_list(ctx->hardware_index, buf); > > + if (!head) { > > + mtk_v4l2_err("fail to qbuf: %d",ctx->hardware_index); > > + return; > > + } > > + > > + spin_lock(&ctx->ready_lock); > > + list_add_tail(head, &ctx->ready_queue); > > + ctx->ready_num++; > > + > > + wake_up_all(&ctx->ready_to_use); > > + > > + mtk_v4l2_debug(3, "enqueue buf type: %d addr: 0x%p num: %d", > > + ctx->hardware_index, buf, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > +} > > + > > +static bool vdec_msg_queue_wait_event(struct vdec_msg_queue_ctx > > *ctx) > > +{ > > + long timeout_jiff; > > + int ret; > > + > > + if (ctx->hardware_index == MTK_VDEC_CORE) { > > + ret = wait_event_freezable(ctx->ready_to_use, > > + !list_empty(&ctx->ready_queue)); > > + if (ret) > > + return false; > > + } else { > > + timeout_jiff = msecs_to_jiffies(1500); > > + ret = wait_event_timeout(ctx->ready_to_use, > > + !list_empty(&ctx->ready_queue), timeout_jiff); > > Suggestion (feel free to not follow this one): since you're using > that > msecs_to_jiffies(1500) return value only for this wait_event_timeout > call, > you may as well remove the timeout_jiff variable and simply do > > ret = wait_event_timeout(ctx->ready_to_use, > > !list_empty(&ctx- > >ready_queue), > Fix in v8. > msecs_to_jiffies(1500)); > > > + if (!ret) > > + return false; > > + } > > + > > + return true; > > +} > > + > > +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct > > vdec_msg_queue_ctx *ctx) > > +{ > > + struct vdec_lat_buf *buf; > > + struct list_head *head; > > + int ret; > > + > > + spin_lock(&ctx->ready_lock); > > + if (list_empty(&ctx->ready_queue)) { > > + mtk_v4l2_debug(3, "queue is NULL, type:%d num: %d", > > + ctx->hardware_index, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > + ret = vdec_msg_queue_wait_event(ctx); > > + if (!ret) > > + return NULL; > > + spin_lock(&ctx->ready_lock); > > + } > > + > > + if (ctx->hardware_index == MTK_VDEC_CORE) > > + buf = list_first_entry(&ctx->ready_queue, > > + struct vdec_lat_buf, core_list); > > + else > > + buf = list_first_entry(&ctx->ready_queue, > > + struct vdec_lat_buf, lat_list); > > + > > + head = vdec_get_buf_list(ctx->hardware_index, buf); > > + if (!head) { > > + mtk_v4l2_err("fail to dqbuf: %d",ctx->hardware_index); > > + return NULL; > > + } > > + list_del(head); > > + > > + ctx->ready_num--; > > + mtk_v4l2_debug(3, "dqueue buf type:%d addr: 0x%p num: %d", > > + ctx->hardware_index, buf, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > + > > + return buf; > > +} > > + > > +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_rptr) > > +{ > > + spin_lock(&msg_queue->lat_ctx.ready_lock); > > + msg_queue->wdma_rptr_addr = ube_rptr; > > + mtk_v4l2_debug(3, "update ube rprt (0x%llx)", ube_rptr); > > + spin_unlock(&msg_queue->lat_ctx.ready_lock); > > +} > > + > > +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_wptr) > > +{ > > + spin_lock(&msg_queue->lat_ctx.ready_lock); > > + msg_queue->wdma_wptr_addr = ube_wptr; > > + mtk_v4l2_debug(3, "update ube wprt: (0x%llx 0x%llx) offset: > > 0x%llx", > > + msg_queue->wdma_rptr_addr, msg_queue->wdma_wptr_addr, > > ube_wptr); > > + spin_unlock(&msg_queue->lat_ctx.ready_lock); > > +} > > + > > +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue > > *msg_queue) > > +{ > > + long timeout_jiff; > > + int ret; > > + > > + timeout_jiff = msecs_to_jiffies(1000 * (NUM_BUFFER_COUNT + 2)); > > + > > + ret = wait_event_timeout(msg_queue->lat_ctx.ready_to_use, > > + msg_queue->lat_ctx.ready_num == NUM_BUFFER_COUNT, > > + timeout_jiff); > > + if (ret) { > > + mtk_v4l2_debug(3, "success to get lat buf: %d", > > + msg_queue->lat_ctx.ready_num); > > + return true; > > + } > > + mtk_v4l2_err("failed with lat buf isn't full: %d", > > + msg_queue->lat_ctx.ready_num); > > + return false; > > +} > > + > > +void vdec_msg_queue_deinit( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx) > > +{ > > + struct vdec_lat_buf *lat_buf; > > + struct mtk_vcodec_mem *mem; > > + int i; > > + > > + mem = &msg_queue->wdma_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + for (i = 0; i < NUM_BUFFER_COUNT; i++) { > > + lat_buf = &msg_queue->lat_buf[i]; > > + > > + mem = &lat_buf->wdma_err_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + > > + mem = &lat_buf->slice_bc_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + > > + if (lat_buf->private_data) > > + kfree(lat_buf->private_data); > > + } > > +} > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > new file mode 100644 > > index 000000000000..1905ce713592 > > --- /dev/null > > +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > @@ -0,0 +1,151 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2021 MediaTek Inc. > > + * Author: Yunfei Dong > > + */ > > + > > +#ifndef _VDEC_MSG_QUEUE_H_ > > +#define _VDEC_MSG_QUEUE_H_ > > + > > +#include > > +#include > > +#include > > +#include > > + > > +#include "mtk_vcodec_util.h" > > + > > +#define NUM_BUFFER_COUNT 3 > > + > > +struct vdec_lat_buf; > > +struct mtk_vcodec_ctx; > > +struct mtk_vcodec_dev; > > +typedef int (*core_decode_cb_t)(struct vdec_lat_buf *lat_buf); > > + > > +/** > > + * struct vdec_msg_queue_ctx - represents a queue for buffers > > ready to be > > + * processed > > I would prefer if you don't break this line, 84 columns is fine to > have. > Fix in v8.> > + * @ready_used: ready used queue used to signalize when get a job > > queue > > + * @ready_queue: list of ready lat buffer queues > > + * @ready_lock: spin lock to protect the lat buffer usage > > + * @ready_num: number of buffers ready to be processed > > + * @hardware_index: hardware id that this queue is used for > > + */ > > +struct vdec_msg_queue_ctx { > > + wait_queue_head_t ready_to_use; > > + struct list_head ready_queue; > > + spinlock_t ready_lock; > > + int ready_num; > > + int hardware_index; > > +}; > > + > > +/** > > + * struct vdec_lat_buf - lat buffer message used to store lat > > + * info for core decode > > + * @wdma_err_addr: wdma error address used for lat hardware > > + * @slice_bc_addr: slice bc address used for lat hardware > > + * @ts_info: need to set timestamp from output to capture > > + * > > + * @private_data: shared information used to lat and core hardware > > + * @ctx: mtk vcodec context information > > + * @core_decode: different codec use different decode callback > > function > > + * @lat_list: add lat buffer to lat head list > > + * @core_list: add lat buffer to core head list > > + */ > > +struct vdec_lat_buf { > > + struct mtk_vcodec_mem wdma_err_addr; > > + struct mtk_vcodec_mem slice_bc_addr; > > + struct vb2_v4l2_buffer ts_info; > > + > > + void *private_data; > > + struct mtk_vcodec_ctx *ctx; > > + core_decode_cb_t core_decode; > > + struct list_head lat_list; > > + struct list_head core_list; > > +}; > > + > > +/** > > + * struct vdec_msg_queue - used to store lat buffer message > > + * @lat_buf: lat buffer used to store lat buffer information > > + * @wdma_addr: wdma address used for ube > > + * @wdma_rptr_addr: ube read point > > + * @wdma_wptr_addr: ube write point > > + * @lat_ctx: used to store lat buffer list > > + */ > > +struct vdec_msg_queue { > > + struct vdec_lat_buf lat_buf[NUM_BUFFER_COUNT]; > > + > > + struct mtk_vcodec_mem wdma_addr; > > + uint64_t wdma_rptr_addr; > > + uint64_t wdma_wptr_addr; > > + > > + struct vdec_msg_queue_ctx lat_ctx; > > +}; > > + > > +/** > > + * vdec_msg_queue_init - init lat buffer information. > > + * @msg_queue: used to store the lat buffer information > > + * @ctx: v4l2 ctx > > + * @core_decode: core decode callback for each codec > > + * @private_size: the private data size used to share with core > > + */ > > +int vdec_msg_queue_init( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx, > > + core_decode_cb_t core_decode, > > + int private_size); > > + > > +/** > > + * vdec_msg_queue_init_ctx - used to init msg queue context > > information. > > + * @ctx: message queue context > > + * @hardware_index: hardware index > > + */ > > +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, > > + int hardware_index); > > + > > +/** > > + * vdec_msg_queue_qbuf - enqueue lat buffer to queue list. > > + * @ctx: message queue context > > + * @buf: current lat buffer > > + */ > > +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, > > + struct vdec_lat_buf *buf); > > + > > +/** > > + * vdec_msg_queue_dqbuf - dequeue lat buffer from queue list. > > + * @ctx: message queue context > > + */ > > +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct > > vdec_msg_queue_ctx *ctx); > > + > > +/** > > + * vdec_msg_queue_update_ube_rptr - used to updata the ube read > > point. > > + * @msg_queue: used to store the lat buffer information > > + * @ube_rptr: current ube read point > > + */ > > +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_rptr); > > + > > +/** > > + * vdec_msg_queue_update_ube_wptr - used to updata the ube write > > point. > > + * @msg_queue: used to store the lat buffer information > > + * @ube_wptr: current ube write point > > + */ > > +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_wptr); > > + > > +/** > > + * vdec_msg_queue_wait_lat_buf_full - used to check whether all > > lat buffer > > + * in lat list. > > + * @msg_queue: used to store the lat buffer information > > + */ > > +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue > > *msg_queue); > > + > > +/** > > + * vdec_msg_queue_deinit - deinit lat buffer information. > > + * @msg_queue: used to store the lat buffer information > > + * @ctx: v4l2 ctx > > + */ > > +void vdec_msg_queue_deinit( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx); > > + > > void vdec_msg_queue_deinit(struct vdec_msg_queue *msg_queue, > struct mtk_vcodec_ctx *ctx); > > +#endif > > > > Regards, > - Angelo Best Regards, Yunfei Dong _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BF71C433EF for ; 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Wed, 27 Oct 2021 12:01:06 +0800 Message-ID: Subject: Re: [PATCH v7, 08/15] media: mtk-vcodec: Add msg queue feature for lat and core architecture From: "yunfei.dong@mediatek.com" To: AngeloGioacchino Del Regno , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , "Tiffany Lin" , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Dafna Hirschfeld , Benjamin Gaignard , Daniel Vetter , dri-devel , Irui Wang , , , , , , , Date: Wed, 27 Oct 2021 12:01:06 +0800 In-Reply-To: <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> References: <20211011070247.792-1-yunfei.dong@mediatek.com> <20211011070247.792-9-yunfei.dong@mediatek.com> <4e06a32c-872f-6dcd-fd83-2a597d0c3785@collabora.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211026_210125_179099_29376D20 X-CRM114-Status: GOOD ( 41.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi AngeloGioacchino, Thanks for your suggestion. On Thu, 2021-10-14 at 12:35 +0200, AngeloGioacchino Del Regno wrote: > > For lat and core architecture, lat thread will send message to core > > thread when lat decode done. Core hardware will use the message > > from lat to decode, then free message to lat thread when decode > > done. > > > > Signed-off-by: Yunfei Dong > > --- > > drivers/media/platform/mtk-vcodec/Makefile | 1 + > > .../platform/mtk-vcodec/mtk_vcodec_drv.h | 5 + > > .../platform/mtk-vcodec/vdec_msg_queue.c | 258 > > ++++++++++++++++++ > > .../platform/mtk-vcodec/vdec_msg_queue.h | 151 ++++++++++ > > 4 files changed, 415 insertions(+) > > create mode 100644 drivers/media/platform/mtk- > > vcodec/vdec_msg_queue.c > > create mode 100644 drivers/media/platform/mtk- > > vcodec/vdec_msg_queue.h > > > > diff --git a/drivers/media/platform/mtk-vcodec/Makefile > > b/drivers/media/platform/mtk-vcodec/Makefile > > index edeb3b66e9e9..5000e59da576 100644 > > --- a/drivers/media/platform/mtk-vcodec/Makefile > > +++ b/drivers/media/platform/mtk-vcodec/Makefile > > @@ -11,6 +11,7 @@ mtk-vcodec-dec-y := vdec/vdec_h264_if.o \ > > mtk_vcodec_dec_drv.o \ > > vdec_drv_if.o \ > > vdec_vpu_if.o \ > > + vdec_msg_queue.o \ > > mtk_vcodec_dec.o \ > > mtk_vcodec_dec_stateful.o \ > > mtk_vcodec_dec_stateless.o \ > > diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > index f8e8b5ba408b..ab401b2db30e 100644 > > --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h > > @@ -15,7 +15,9 @@ > > #include > > #include > > #include > > + > > #include "mtk_vcodec_util.h" > > +#include "vdec_msg_queue.h" > > > > #define MTK_VCODEC_DRV_NAME "mtk_vcodec_drv" > > #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec" > > @@ -282,6 +284,8 @@ struct vdec_pic_info { > > * @decoded_frame_cnt: number of decoded frames > > * @lock: protect variables accessed by V4L2 threads and worker > > thread such as > > * mtk_video_dec_buf. > > + * > > + * @msg_queue: msg queue used to store lat buffer information. > > */ > > struct mtk_vcodec_ctx { > > enum mtk_instance_type type; > > @@ -325,6 +329,7 @@ struct mtk_vcodec_ctx { > > int decoded_frame_cnt; > > struct mutex lock; > > > > + struct vdec_msg_queue msg_queue; > > }; > > > > enum mtk_chip { > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > new file mode 100644 > > index 000000000000..d66ed98c79a9 > > --- /dev/null > > +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c > > @@ -0,0 +1,258 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2021 MediaTek Inc. > > + * Author: Yunfei Dong > > + */ > > + > > +#include > > +#include > > +#include > > + > > +#include "mtk_vcodec_dec_pm.h" > > +#include "mtk_vcodec_drv.h" > > +#include "vdec_msg_queue.h" > > + > > +#define VDEC_LAT_SLICE_HEADER_SZ (640 * 1024) > > This can be 640 * SZ_1K, or 5 * SZ_128K.... > ...if applicable, please multiply as value * alignment, such that, > for example, > if the data needs to be 1K aligned, you should prefer writing it as > 640 * SZ_1K. > > > +#define VDEC_ERR_MAP_SZ_AVC ((8192 / 16) * (4352 / 16) / > > 8) > Fix in v8. > ...and you could do the same here... except, I see some sizes here > being divided > and multiplied and I take that as a hint. > In that case, when you convert it to use sizes definitions, it would > be very nice > if you keep that hint / better describe it in a comment. > Fix in v8. > > + > > +/* lat write decoded hardware information to trans buffer, > > + * and core will read the trans buffer to decode again. The > > + * trans buffer size of FHD and 4K bitstreams are different. > > + */ > > +static int vde_msg_queue_get_trans_size(int width, int height) > > +{ > > + if (width > 1920 || height > 1088) > > + return (30 * 1024 * 1024); > > So here we're referring to buffer sizes. 1024 * 1024 is SZ_1M, as > defined in > linux/sizes.h. > > Means that this can be simply > > return 30 * SZ_1M; > > > + else > > + return 6 * 1024 * 1024; > > return 6 * SZ_1M; > Fix in v8. > > +} > > + > > +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, > > + int hardware_index) > > +{ > > + init_waitqueue_head(&ctx->ready_to_use); > > + INIT_LIST_HEAD(&ctx->ready_queue); > > + spin_lock_init(&ctx->ready_lock); > > + ctx->ready_num = 0; > > + ctx->hardware_index = hardware_index; > > +} > > + > > +int vdec_msg_queue_init( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx, > > + core_decode_cb_t core_decode, > > + int private_size) > > +{ > > + struct vdec_lat_buf *lat_buf; > > + int i, err; > > + > > + /* already init msg queue */ > > + if (msg_queue->wdma_addr.size) > > + return 0; > > + > > + vdec_msg_queue_init_ctx(&msg_queue->lat_ctx, MTK_VDEC_LAT0); > > + msg_queue->wdma_addr.size = vde_msg_queue_get_trans_size( > > + ctx->picinfo.buf_w, ctx->picinfo.buf_h); > > + > > + err = mtk_vcodec_mem_alloc(ctx, &msg_queue->wdma_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_addr buf"); > > + return -ENOMEM; > > + } > > + msg_queue->wdma_rptr_addr = msg_queue->wdma_addr.dma_addr; > > + msg_queue->wdma_wptr_addr = msg_queue->wdma_addr.dma_addr; > > + > > + for (i = 0; i < NUM_BUFFER_COUNT; i++) { > > + lat_buf = &msg_queue->lat_buf[i]; > > + > > + lat_buf->wdma_err_addr.size = VDEC_ERR_MAP_SZ_AVC; > > + err = mtk_vcodec_mem_alloc(ctx, &lat_buf- > > >wdma_err_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_err_addr > > buf[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->slice_bc_addr.size = VDEC_LAT_SLICE_HEADER_SZ; > > + err = mtk_vcodec_mem_alloc(ctx, &lat_buf- > > >slice_bc_addr); > > + if (err) { > > + mtk_v4l2_err("failed to allocate wdma_addr > > buf[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->private_data = kzalloc(private_size, > > GFP_KERNEL); > > + if (!lat_buf->private_data) { > > + mtk_v4l2_err("failed to allocate > > private_data[%d]", i); > > + goto mem_alloc_err; > > + } > > + > > + lat_buf->ctx = ctx; > > + lat_buf->core_decode = core_decode; > > + vdec_msg_queue_qbuf(&msg_queue->lat_ctx, lat_buf); > > + } > > + return 0; > > + > > +mem_alloc_err: > > + vdec_msg_queue_deinit(msg_queue, ctx); > > + return -ENOMEM; > > +} > > + > > +static struct list_head *vdec_get_buf_list(int hardware_index, > > + struct vdec_lat_buf *buf) > > +{ > > + switch (hardware_index) { > > + case MTK_VDEC_CORE: > > + return &buf->core_list; > > + case MTK_VDEC_LAT0: > > + return &buf->lat_list; > > + default: > > + return NULL; > > + } > > +} > > + > > +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, > > + struct vdec_lat_buf *buf) > > +{ > > + struct list_head *head; > > + > > + head = vdec_get_buf_list(ctx->hardware_index, buf); > > + if (!head) { > > + mtk_v4l2_err("fail to qbuf: %d",ctx->hardware_index); > > + return; > > + } > > + > > + spin_lock(&ctx->ready_lock); > > + list_add_tail(head, &ctx->ready_queue); > > + ctx->ready_num++; > > + > > + wake_up_all(&ctx->ready_to_use); > > + > > + mtk_v4l2_debug(3, "enqueue buf type: %d addr: 0x%p num: %d", > > + ctx->hardware_index, buf, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > +} > > + > > +static bool vdec_msg_queue_wait_event(struct vdec_msg_queue_ctx > > *ctx) > > +{ > > + long timeout_jiff; > > + int ret; > > + > > + if (ctx->hardware_index == MTK_VDEC_CORE) { > > + ret = wait_event_freezable(ctx->ready_to_use, > > + !list_empty(&ctx->ready_queue)); > > + if (ret) > > + return false; > > + } else { > > + timeout_jiff = msecs_to_jiffies(1500); > > + ret = wait_event_timeout(ctx->ready_to_use, > > + !list_empty(&ctx->ready_queue), timeout_jiff); > > Suggestion (feel free to not follow this one): since you're using > that > msecs_to_jiffies(1500) return value only for this wait_event_timeout > call, > you may as well remove the timeout_jiff variable and simply do > > ret = wait_event_timeout(ctx->ready_to_use, > > !list_empty(&ctx- > >ready_queue), > Fix in v8. > msecs_to_jiffies(1500)); > > > + if (!ret) > > + return false; > > + } > > + > > + return true; > > +} > > + > > +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct > > vdec_msg_queue_ctx *ctx) > > +{ > > + struct vdec_lat_buf *buf; > > + struct list_head *head; > > + int ret; > > + > > + spin_lock(&ctx->ready_lock); > > + if (list_empty(&ctx->ready_queue)) { > > + mtk_v4l2_debug(3, "queue is NULL, type:%d num: %d", > > + ctx->hardware_index, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > + ret = vdec_msg_queue_wait_event(ctx); > > + if (!ret) > > + return NULL; > > + spin_lock(&ctx->ready_lock); > > + } > > + > > + if (ctx->hardware_index == MTK_VDEC_CORE) > > + buf = list_first_entry(&ctx->ready_queue, > > + struct vdec_lat_buf, core_list); > > + else > > + buf = list_first_entry(&ctx->ready_queue, > > + struct vdec_lat_buf, lat_list); > > + > > + head = vdec_get_buf_list(ctx->hardware_index, buf); > > + if (!head) { > > + mtk_v4l2_err("fail to dqbuf: %d",ctx->hardware_index); > > + return NULL; > > + } > > + list_del(head); > > + > > + ctx->ready_num--; > > + mtk_v4l2_debug(3, "dqueue buf type:%d addr: 0x%p num: %d", > > + ctx->hardware_index, buf, ctx->ready_num); > > + spin_unlock(&ctx->ready_lock); > > + > > + return buf; > > +} > > + > > +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_rptr) > > +{ > > + spin_lock(&msg_queue->lat_ctx.ready_lock); > > + msg_queue->wdma_rptr_addr = ube_rptr; > > + mtk_v4l2_debug(3, "update ube rprt (0x%llx)", ube_rptr); > > + spin_unlock(&msg_queue->lat_ctx.ready_lock); > > +} > > + > > +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_wptr) > > +{ > > + spin_lock(&msg_queue->lat_ctx.ready_lock); > > + msg_queue->wdma_wptr_addr = ube_wptr; > > + mtk_v4l2_debug(3, "update ube wprt: (0x%llx 0x%llx) offset: > > 0x%llx", > > + msg_queue->wdma_rptr_addr, msg_queue->wdma_wptr_addr, > > ube_wptr); > > + spin_unlock(&msg_queue->lat_ctx.ready_lock); > > +} > > + > > +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue > > *msg_queue) > > +{ > > + long timeout_jiff; > > + int ret; > > + > > + timeout_jiff = msecs_to_jiffies(1000 * (NUM_BUFFER_COUNT + 2)); > > + > > + ret = wait_event_timeout(msg_queue->lat_ctx.ready_to_use, > > + msg_queue->lat_ctx.ready_num == NUM_BUFFER_COUNT, > > + timeout_jiff); > > + if (ret) { > > + mtk_v4l2_debug(3, "success to get lat buf: %d", > > + msg_queue->lat_ctx.ready_num); > > + return true; > > + } > > + mtk_v4l2_err("failed with lat buf isn't full: %d", > > + msg_queue->lat_ctx.ready_num); > > + return false; > > +} > > + > > +void vdec_msg_queue_deinit( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx) > > +{ > > + struct vdec_lat_buf *lat_buf; > > + struct mtk_vcodec_mem *mem; > > + int i; > > + > > + mem = &msg_queue->wdma_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + for (i = 0; i < NUM_BUFFER_COUNT; i++) { > > + lat_buf = &msg_queue->lat_buf[i]; > > + > > + mem = &lat_buf->wdma_err_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + > > + mem = &lat_buf->slice_bc_addr; > > + if (mem->va) > > + mtk_vcodec_mem_free(ctx, mem); > > + > > + if (lat_buf->private_data) > > + kfree(lat_buf->private_data); > > + } > > +} > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > new file mode 100644 > > index 000000000000..1905ce713592 > > --- /dev/null > > +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h > > @@ -0,0 +1,151 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2021 MediaTek Inc. > > + * Author: Yunfei Dong > > + */ > > + > > +#ifndef _VDEC_MSG_QUEUE_H_ > > +#define _VDEC_MSG_QUEUE_H_ > > + > > +#include > > +#include > > +#include > > +#include > > + > > +#include "mtk_vcodec_util.h" > > + > > +#define NUM_BUFFER_COUNT 3 > > + > > +struct vdec_lat_buf; > > +struct mtk_vcodec_ctx; > > +struct mtk_vcodec_dev; > > +typedef int (*core_decode_cb_t)(struct vdec_lat_buf *lat_buf); > > + > > +/** > > + * struct vdec_msg_queue_ctx - represents a queue for buffers > > ready to be > > + * processed > > I would prefer if you don't break this line, 84 columns is fine to > have. > Fix in v8.> > + * @ready_used: ready used queue used to signalize when get a job > > queue > > + * @ready_queue: list of ready lat buffer queues > > + * @ready_lock: spin lock to protect the lat buffer usage > > + * @ready_num: number of buffers ready to be processed > > + * @hardware_index: hardware id that this queue is used for > > + */ > > +struct vdec_msg_queue_ctx { > > + wait_queue_head_t ready_to_use; > > + struct list_head ready_queue; > > + spinlock_t ready_lock; > > + int ready_num; > > + int hardware_index; > > +}; > > + > > +/** > > + * struct vdec_lat_buf - lat buffer message used to store lat > > + * info for core decode > > + * @wdma_err_addr: wdma error address used for lat hardware > > + * @slice_bc_addr: slice bc address used for lat hardware > > + * @ts_info: need to set timestamp from output to capture > > + * > > + * @private_data: shared information used to lat and core hardware > > + * @ctx: mtk vcodec context information > > + * @core_decode: different codec use different decode callback > > function > > + * @lat_list: add lat buffer to lat head list > > + * @core_list: add lat buffer to core head list > > + */ > > +struct vdec_lat_buf { > > + struct mtk_vcodec_mem wdma_err_addr; > > + struct mtk_vcodec_mem slice_bc_addr; > > + struct vb2_v4l2_buffer ts_info; > > + > > + void *private_data; > > + struct mtk_vcodec_ctx *ctx; > > + core_decode_cb_t core_decode; > > + struct list_head lat_list; > > + struct list_head core_list; > > +}; > > + > > +/** > > + * struct vdec_msg_queue - used to store lat buffer message > > + * @lat_buf: lat buffer used to store lat buffer information > > + * @wdma_addr: wdma address used for ube > > + * @wdma_rptr_addr: ube read point > > + * @wdma_wptr_addr: ube write point > > + * @lat_ctx: used to store lat buffer list > > + */ > > +struct vdec_msg_queue { > > + struct vdec_lat_buf lat_buf[NUM_BUFFER_COUNT]; > > + > > + struct mtk_vcodec_mem wdma_addr; > > + uint64_t wdma_rptr_addr; > > + uint64_t wdma_wptr_addr; > > + > > + struct vdec_msg_queue_ctx lat_ctx; > > +}; > > + > > +/** > > + * vdec_msg_queue_init - init lat buffer information. > > + * @msg_queue: used to store the lat buffer information > > + * @ctx: v4l2 ctx > > + * @core_decode: core decode callback for each codec > > + * @private_size: the private data size used to share with core > > + */ > > +int vdec_msg_queue_init( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx, > > + core_decode_cb_t core_decode, > > + int private_size); > > + > > +/** > > + * vdec_msg_queue_init_ctx - used to init msg queue context > > information. > > + * @ctx: message queue context > > + * @hardware_index: hardware index > > + */ > > +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, > > + int hardware_index); > > + > > +/** > > + * vdec_msg_queue_qbuf - enqueue lat buffer to queue list. > > + * @ctx: message queue context > > + * @buf: current lat buffer > > + */ > > +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, > > + struct vdec_lat_buf *buf); > > + > > +/** > > + * vdec_msg_queue_dqbuf - dequeue lat buffer from queue list. > > + * @ctx: message queue context > > + */ > > +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct > > vdec_msg_queue_ctx *ctx); > > + > > +/** > > + * vdec_msg_queue_update_ube_rptr - used to updata the ube read > > point. > > + * @msg_queue: used to store the lat buffer information > > + * @ube_rptr: current ube read point > > + */ > > +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_rptr); > > + > > +/** > > + * vdec_msg_queue_update_ube_wptr - used to updata the ube write > > point. > > + * @msg_queue: used to store the lat buffer information > > + * @ube_wptr: current ube write point > > + */ > > +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue > > *msg_queue, > > + uint64_t ube_wptr); > > + > > +/** > > + * vdec_msg_queue_wait_lat_buf_full - used to check whether all > > lat buffer > > + * in lat list. > > + * @msg_queue: used to store the lat buffer information > > + */ > > +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue > > *msg_queue); > > + > > +/** > > + * vdec_msg_queue_deinit - deinit lat buffer information. > > + * @msg_queue: used to store the lat buffer information > > + * @ctx: v4l2 ctx > > + */ > > +void vdec_msg_queue_deinit( > > + struct vdec_msg_queue *msg_queue, > > + struct mtk_vcodec_ctx *ctx); > > + > > void vdec_msg_queue_deinit(struct vdec_msg_queue *msg_queue, > struct mtk_vcodec_ctx *ctx); > > +#endif > > > > Regards, > - Angelo Best Regards, Yunfei Dong _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel