From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756025AbeARNFl (ORCPT ); Thu, 18 Jan 2018 08:05:41 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:45005 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755377AbeARNFV (ORCPT ); Thu, 18 Jan 2018 08:05:21 -0500 X-Google-Smtp-Source: ACJfBou6KKAWAZZx9RisRkQSOhSZw0tVm75wTQuA114MiJK2VOLQTnxNYqZyBB1qVgTHmcjZrGGWeQ== Subject: Re: [PATCH v3 04/12] drm/bridge/synopsys: dw-hdmi: Export some PHY related functions To: Jernej Skrabec , maxime.ripard@free-electrons.com, airlied@linux.ie, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, architt@codeaurora.org, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com Cc: mturquette@baylibre.com, sboyd@codeaurora.org, Jose.Abreu@synopsys.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com References: <20180117201421.25954-1-jernej.skrabec@siol.net> <20180117201421.25954-5-jernej.skrabec@siol.net> From: Neil Armstrong Organization: Baylibre Message-ID: Date: Thu, 18 Jan 2018 14:05:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20180117201421.25954-5-jernej.skrabec@siol.net> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/01/2018 21:14, Jernej Skrabec wrote: > Parts of PHY code could be useful also for custom PHYs. For example, > Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY > with few additional memory mapped registers, so most of the Synopsys PHY > related code could be reused. > > Functions exported here are actually not specific to Synopsys PHYs but > to DWC HDMI controller PHY interface. This means that even if the PHY is > completely custom, i.e. not designed by Synopsys, exported functions can > be useful. > > Reviewed-by: Laurent Pinchart > Signed-off-by: Jernej Skrabec > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 44 +++++++++++++++++++++---------- > drivers/gpu/drm/meson/meson_dw_hdmi.c | 8 +++--- > include/drm/bridge/dw_hdmi.h | 11 ++++++++ > 3 files changed, 45 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > index 7ca14d7325b5..7d80f4b56683 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > @@ -1037,19 +1037,21 @@ static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable) > HDMI_PHY_CONF0_SVSRET_MASK); > } > > -static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) > +void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) > { > hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, > HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET, > HDMI_PHY_CONF0_GEN2_PDDQ_MASK); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_gen2_pddq); > > -static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) > +void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) > { > hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, > HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET, > HDMI_PHY_CONF0_GEN2_TXPWRON_MASK); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_gen2_txpwron); > > static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable) > { > @@ -1065,6 +1067,22 @@ static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) > HDMI_PHY_CONF0_SELDIPIF_MASK); > } > > +void dw_hdmi_phy_reset(struct dw_hdmi *hdmi) > +{ > + /* PHY reset. The reset signal is active high on Gen2 PHYs. */ > + hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > + hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > +} > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset); > + > +void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address) > +{ > + hdmi_phy_test_clear(hdmi, 1); > + hdmi_writeb(hdmi, address, HDMI_PHY_I2CM_SLAVE_ADDR); > + hdmi_phy_test_clear(hdmi, 0); > +} > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_set_addr); > + > static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi) > { > const struct dw_hdmi_phy_data *phy = hdmi->phy.data; > @@ -1203,16 +1221,11 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) > if (phy->has_svsret) > dw_hdmi_phy_enable_svsret(hdmi, 1); > > - /* PHY reset. The reset signal is active high on Gen2 PHYs. */ > - hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > - hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > + dw_hdmi_phy_reset(hdmi); > > hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST); > > - hdmi_phy_test_clear(hdmi, 1); > - hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2, > - HDMI_PHY_I2CM_SLAVE_ADDR); > - hdmi_phy_test_clear(hdmi, 0); > + dw_hdmi_phy_i2c_set_addr(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2); > > /* Write to the PHY as configured by the platform */ > if (pdata->configure_phy) > @@ -1251,15 +1264,16 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data) > dw_hdmi_phy_power_off(hdmi); > } > > -static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > - void *data) > +enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > + void *data) > { > return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? > connector_status_connected : connector_status_disconnected; > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_read_hpd); > > -static void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > - bool force, bool disabled, bool rxsense) > +void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > + bool force, bool disabled, bool rxsense) > { > u8 old_mask = hdmi->phy_mask; > > @@ -1271,8 +1285,9 @@ static void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > if (old_mask != hdmi->phy_mask) > hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_update_hpd); > > -static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > +void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > { > /* > * Configure the PHY RX SENSE and HPD interrupts polarities and clear > @@ -1291,6 +1306,7 @@ static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE), > HDMI_IH_MUTE_PHY_STAT0); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_setup_hpd); > > static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = { > .init = dw_hdmi_phy_init, > diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c > index 17de3afd98f6..e8c3ef8a94ce 100644 > --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c > +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c > @@ -302,7 +302,7 @@ static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi, > } > } > > -static inline void dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi) > +static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi) > { > struct meson_drm *priv = dw_hdmi->priv; > > @@ -409,9 +409,9 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, > msleep(100); > > /* Reset PHY 3 times in a row */ > - dw_hdmi_phy_reset(dw_hdmi); > - dw_hdmi_phy_reset(dw_hdmi); > - dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > > /* Temporary Disable VENC video stream */ > if (priv->venc.hdmi_use_enci) > diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h > index 182f83283e24..f3f3f0e1b2d3 100644 > --- a/include/drm/bridge/dw_hdmi.h > +++ b/include/drm/bridge/dw_hdmi.h > @@ -157,7 +157,18 @@ void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); > void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); > > /* PHY configuration */ > +void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address); > void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, > unsigned char addr); > > +void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable); > +void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable); > +void dw_hdmi_phy_reset(struct dw_hdmi *hdmi); > + > +enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > + void *data); > +void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > + bool force, bool disabled, bool rxsense); > +void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data); > + > #endif /* __IMX_HDMI_H__ */ > Reviewed-by: Neil Armstrong From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Armstrong Subject: Re: [PATCH v3 04/12] drm/bridge/synopsys: dw-hdmi: Export some PHY related functions Date: Thu, 18 Jan 2018 14:05:18 +0100 Message-ID: References: <20180117201421.25954-1-jernej.skrabec@siol.net> <20180117201421.25954-5-jernej.skrabec@siol.net> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180117201421.25954-5-jernej.skrabec@siol.net> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Jernej Skrabec , maxime.ripard@free-electrons.com, airlied@linux.ie, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, architt@codeaurora.org, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com Cc: Jose.Abreu@synopsys.com, devicetree@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org T24gMTcvMDEvMjAxOCAyMToxNCwgSmVybmVqIFNrcmFiZWMgd3JvdGU6Cj4gUGFydHMgb2YgUEhZ IGNvZGUgY291bGQgYmUgdXNlZnVsIGFsc28gZm9yIGN1c3RvbSBQSFlzLiBGb3IgZXhhbXBsZSwK PiBBbGx3aW5uZXIgQTgzVCBoYXMgY3VzdG9tIFBIWSB3aGljaCBpcyBwcm9iYWJseSBTeW5vcHN5 cyBnZW4yIFBIWQo+IHdpdGggZmV3IGFkZGl0aW9uYWwgbWVtb3J5IG1hcHBlZCByZWdpc3RlcnMs IHNvIG1vc3Qgb2YgdGhlIFN5bm9wc3lzIFBIWQo+IHJlbGF0ZWQgY29kZSBjb3VsZCBiZSByZXVz ZWQuCj4gCj4gRnVuY3Rpb25zIGV4cG9ydGVkIGhlcmUgYXJlIGFjdHVhbGx5IG5vdCBzcGVjaWZp YyB0byBTeW5vcHN5cyBQSFlzIGJ1dAo+IHRvIERXQyBIRE1JIGNvbnRyb2xsZXIgUEhZIGludGVy ZmFjZS4gVGhpcyBtZWFucyB0aGF0IGV2ZW4gaWYgdGhlIFBIWSBpcwo+IGNvbXBsZXRlbHkgY3Vz dG9tLCBpLmUuIG5vdCBkZXNpZ25lZCBieSBTeW5vcHN5cywgZXhwb3J0ZWQgZnVuY3Rpb25zIGNh bgo+IGJlIHVzZWZ1bC4KPiAKPiBSZXZpZXdlZC1ieTogTGF1cmVudCBQaW5jaGFydCA8bGF1cmVu dC5waW5jaGFydEBpZGVhc29uYm9hcmQuY29tPgo+IFNpZ25lZC1vZmYtYnk6IEplcm5laiBTa3Jh YmVjIDxqZXJuZWouc2tyYWJlY0BzaW9sLm5ldD4KPiAtLS0KPiAgZHJpdmVycy9ncHUvZHJtL2Jy aWRnZS9zeW5vcHN5cy9kdy1oZG1pLmMgfCA0NCArKysrKysrKysrKysrKysrKysrKystLS0tLS0t LS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9tZXNvbi9tZXNvbl9kd19oZG1pLmMgICAgIHwgIDggKysr LS0tCj4gIGluY2x1ZGUvZHJtL2JyaWRnZS9kd19oZG1pLmggICAgICAgICAgICAgIHwgMTEgKysr KysrKysKPiAgMyBmaWxlcyBjaGFuZ2VkLCA0NSBpbnNlcnRpb25zKCspLCAxOCBkZWxldGlvbnMo LSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2JyaWRnZS9zeW5vcHN5cy9kdy1o ZG1pLmMgYi9kcml2ZXJzL2dwdS9kcm0vYnJpZGdlL3N5bm9wc3lzL2R3LWhkbWkuYwo+IGluZGV4 IDdjYTE0ZDczMjViNS4uN2Q4MGY0YjU2NjgzIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2Ry bS9icmlkZ2Uvc3lub3BzeXMvZHctaGRtaS5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2JyaWRn ZS9zeW5vcHN5cy9kdy1oZG1pLmMKPiBAQCAtMTAzNywxOSArMTAzNywyMSBAQCBzdGF0aWMgdm9p ZCBkd19oZG1pX3BoeV9lbmFibGVfc3ZzcmV0KHN0cnVjdCBkd19oZG1pICpoZG1pLCB1OCBlbmFi bGUpCj4gIAkJCSBIRE1JX1BIWV9DT05GMF9TVlNSRVRfTUFTSyk7Cj4gIH0KPiAgCj4gLXN0YXRp YyB2b2lkIGR3X2hkbWlfcGh5X2dlbjJfcGRkcShzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdTggZW5h YmxlKQo+ICt2b2lkIGR3X2hkbWlfcGh5X2dlbjJfcGRkcShzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwg dTggZW5hYmxlKQo+ICB7Cj4gIAloZG1pX21hc2tfd3JpdGViKGhkbWksIGVuYWJsZSwgSERNSV9Q SFlfQ09ORjAsCj4gIAkJCSBIRE1JX1BIWV9DT05GMF9HRU4yX1BERFFfT0ZGU0VULAo+ICAJCQkg SERNSV9QSFlfQ09ORjBfR0VOMl9QRERRX01BU0spOwo+ICB9Cj4gK0VYUE9SVF9TWU1CT0xfR1BM KGR3X2hkbWlfcGh5X2dlbjJfcGRkcSk7Cj4gIAo+IC1zdGF0aWMgdm9pZCBkd19oZG1pX3BoeV9n ZW4yX3R4cHdyb24oc3RydWN0IGR3X2hkbWkgKmhkbWksIHU4IGVuYWJsZSkKPiArdm9pZCBkd19o ZG1pX3BoeV9nZW4yX3R4cHdyb24oc3RydWN0IGR3X2hkbWkgKmhkbWksIHU4IGVuYWJsZSkKPiAg ewo+ICAJaGRtaV9tYXNrX3dyaXRlYihoZG1pLCBlbmFibGUsIEhETUlfUEhZX0NPTkYwLAo+ICAJ CQkgSERNSV9QSFlfQ09ORjBfR0VOMl9UWFBXUk9OX09GRlNFVCwKPiAgCQkJIEhETUlfUEhZX0NP TkYwX0dFTjJfVFhQV1JPTl9NQVNLKTsKPiAgfQo+ICtFWFBPUlRfU1lNQk9MX0dQTChkd19oZG1p X3BoeV9nZW4yX3R4cHdyb24pOwo+ICAKPiAgc3RhdGljIHZvaWQgZHdfaGRtaV9waHlfc2VsX2Rh dGFfZW5fcG9sKHN0cnVjdCBkd19oZG1pICpoZG1pLCB1OCBlbmFibGUpCj4gIHsKPiBAQCAtMTA2 NSw2ICsxMDY3LDIyIEBAIHN0YXRpYyB2b2lkIGR3X2hkbWlfcGh5X3NlbF9pbnRlcmZhY2VfY29u dHJvbChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdTggZW5hYmxlKQo+ICAJCQkgSERNSV9QSFlfQ09O RjBfU0VMRElQSUZfTUFTSyk7Cj4gIH0KPiAgCj4gK3ZvaWQgZHdfaGRtaV9waHlfcmVzZXQoc3Ry dWN0IGR3X2hkbWkgKmhkbWkpCj4gK3sKPiArCS8qIFBIWSByZXNldC4gVGhlIHJlc2V0IHNpZ25h bCBpcyBhY3RpdmUgaGlnaCBvbiBHZW4yIFBIWXMuICovCj4gKwloZG1pX3dyaXRlYihoZG1pLCBI RE1JX01DX1BIWVJTVFpfUEhZUlNUWiwgSERNSV9NQ19QSFlSU1RaKTsKPiArCWhkbWlfd3JpdGVi KGhkbWksIDAsIEhETUlfTUNfUEhZUlNUWik7Cj4gK30KPiArRVhQT1JUX1NZTUJPTF9HUEwoZHdf aGRtaV9waHlfcmVzZXQpOwo+ICsKPiArdm9pZCBkd19oZG1pX3BoeV9pMmNfc2V0X2FkZHIoc3Ry dWN0IGR3X2hkbWkgKmhkbWksIHU4IGFkZHJlc3MpCj4gK3sKPiArCWhkbWlfcGh5X3Rlc3RfY2xl YXIoaGRtaSwgMSk7Cj4gKwloZG1pX3dyaXRlYihoZG1pLCBhZGRyZXNzLCBIRE1JX1BIWV9JMkNN X1NMQVZFX0FERFIpOwo+ICsJaGRtaV9waHlfdGVzdF9jbGVhcihoZG1pLCAwKTsKPiArfQo+ICtF WFBPUlRfU1lNQk9MX0dQTChkd19oZG1pX3BoeV9pMmNfc2V0X2FkZHIpOwo+ICsKPiAgc3RhdGlj IHZvaWQgZHdfaGRtaV9waHlfcG93ZXJfb2ZmKHN0cnVjdCBkd19oZG1pICpoZG1pKQo+ICB7Cj4g IAljb25zdCBzdHJ1Y3QgZHdfaGRtaV9waHlfZGF0YSAqcGh5ID0gaGRtaS0+cGh5LmRhdGE7Cj4g QEAgLTEyMDMsMTYgKzEyMjEsMTEgQEAgc3RhdGljIGludCBoZG1pX3BoeV9jb25maWd1cmUoc3Ry dWN0IGR3X2hkbWkgKmhkbWkpCj4gIAlpZiAocGh5LT5oYXNfc3ZzcmV0KQo+ICAJCWR3X2hkbWlf cGh5X2VuYWJsZV9zdnNyZXQoaGRtaSwgMSk7Cj4gIAo+IC0JLyogUEhZIHJlc2V0LiBUaGUgcmVz ZXQgc2lnbmFsIGlzIGFjdGl2ZSBoaWdoIG9uIEdlbjIgUEhZcy4gKi8KPiAtCWhkbWlfd3JpdGVi KGhkbWksIEhETUlfTUNfUEhZUlNUWl9QSFlSU1RaLCBIRE1JX01DX1BIWVJTVFopOwo+IC0JaGRt aV93cml0ZWIoaGRtaSwgMCwgSERNSV9NQ19QSFlSU1RaKTsKPiArCWR3X2hkbWlfcGh5X3Jlc2V0 KGhkbWkpOwo+ICAKPiAgCWhkbWlfd3JpdGViKGhkbWksIEhETUlfTUNfSEVBQ1BIWV9SU1RfQVNT RVJULCBIRE1JX01DX0hFQUNQSFlfUlNUKTsKPiAgCj4gLQloZG1pX3BoeV90ZXN0X2NsZWFyKGhk bWksIDEpOwo+IC0JaGRtaV93cml0ZWIoaGRtaSwgSERNSV9QSFlfSTJDTV9TTEFWRV9BRERSX1BI WV9HRU4yLAo+IC0JCSAgICBIRE1JX1BIWV9JMkNNX1NMQVZFX0FERFIpOwo+IC0JaGRtaV9waHlf dGVzdF9jbGVhcihoZG1pLCAwKTsKPiArCWR3X2hkbWlfcGh5X2kyY19zZXRfYWRkcihoZG1pLCBI RE1JX1BIWV9JMkNNX1NMQVZFX0FERFJfUEhZX0dFTjIpOwo+ICAKPiAgCS8qIFdyaXRlIHRvIHRo ZSBQSFkgYXMgY29uZmlndXJlZCBieSB0aGUgcGxhdGZvcm0gKi8KPiAgCWlmIChwZGF0YS0+Y29u ZmlndXJlX3BoeSkKPiBAQCAtMTI1MSwxNSArMTI2NCwxNiBAQCBzdGF0aWMgdm9pZCBkd19oZG1p X3BoeV9kaXNhYmxlKHN0cnVjdCBkd19oZG1pICpoZG1pLCB2b2lkICpkYXRhKQo+ICAJZHdfaGRt aV9waHlfcG93ZXJfb2ZmKGhkbWkpOwo+ICB9Cj4gIAo+IC1zdGF0aWMgZW51bSBkcm1fY29ubmVj dG9yX3N0YXR1cyBkd19oZG1pX3BoeV9yZWFkX2hwZChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwKPiAt CQkJCQkJICAgICAgdm9pZCAqZGF0YSkKPiArZW51bSBkcm1fY29ubmVjdG9yX3N0YXR1cyBkd19o ZG1pX3BoeV9yZWFkX2hwZChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwKPiArCQkJCQkgICAgICAgdm9p ZCAqZGF0YSkKPiAgewo+ICAJcmV0dXJuIGhkbWlfcmVhZGIoaGRtaSwgSERNSV9QSFlfU1RBVDAp ICYgSERNSV9QSFlfSFBEID8KPiAgCQljb25uZWN0b3Jfc3RhdHVzX2Nvbm5lY3RlZCA6IGNvbm5l Y3Rvcl9zdGF0dXNfZGlzY29ubmVjdGVkOwo+ICB9Cj4gK0VYUE9SVF9TWU1CT0xfR1BMKGR3X2hk bWlfcGh5X3JlYWRfaHBkKTsKPiAgCj4gLXN0YXRpYyB2b2lkIGR3X2hkbWlfcGh5X3VwZGF0ZV9o cGQoc3RydWN0IGR3X2hkbWkgKmhkbWksIHZvaWQgKmRhdGEsCj4gLQkJCQkgICBib29sIGZvcmNl LCBib29sIGRpc2FibGVkLCBib29sIHJ4c2Vuc2UpCj4gK3ZvaWQgZHdfaGRtaV9waHlfdXBkYXRl X2hwZChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdm9pZCAqZGF0YSwKPiArCQkJICAgIGJvb2wgZm9y Y2UsIGJvb2wgZGlzYWJsZWQsIGJvb2wgcnhzZW5zZSkKPiAgewo+ICAJdTggb2xkX21hc2sgPSBo ZG1pLT5waHlfbWFzazsKPiAgCj4gQEAgLTEyNzEsOCArMTI4NSw5IEBAIHN0YXRpYyB2b2lkIGR3 X2hkbWlfcGh5X3VwZGF0ZV9ocGQoc3RydWN0IGR3X2hkbWkgKmhkbWksIHZvaWQgKmRhdGEsCj4g IAlpZiAob2xkX21hc2sgIT0gaGRtaS0+cGh5X21hc2spCj4gIAkJaGRtaV93cml0ZWIoaGRtaSwg aGRtaS0+cGh5X21hc2ssIEhETUlfUEhZX01BU0swKTsKPiAgfQo+ICtFWFBPUlRfU1lNQk9MX0dQ TChkd19oZG1pX3BoeV91cGRhdGVfaHBkKTsKPiAgCj4gLXN0YXRpYyB2b2lkIGR3X2hkbWlfcGh5 X3NldHVwX2hwZChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdm9pZCAqZGF0YSkKPiArdm9pZCBkd19o ZG1pX3BoeV9zZXR1cF9ocGQoc3RydWN0IGR3X2hkbWkgKmhkbWksIHZvaWQgKmRhdGEpCj4gIHsK PiAgCS8qCj4gIAkgKiBDb25maWd1cmUgdGhlIFBIWSBSWCBTRU5TRSBhbmQgSFBEIGludGVycnVw dHMgcG9sYXJpdGllcyBhbmQgY2xlYXIKPiBAQCAtMTI5MSw2ICsxMzA2LDcgQEAgc3RhdGljIHZv aWQgZHdfaGRtaV9waHlfc2V0dXBfaHBkKHN0cnVjdCBkd19oZG1pICpoZG1pLCB2b2lkICpkYXRh KQo+ICAJaGRtaV93cml0ZWIoaGRtaSwgfihIRE1JX0lIX1BIWV9TVEFUMF9IUEQgfCBIRE1JX0lI X1BIWV9TVEFUMF9SWF9TRU5TRSksCj4gIAkJICAgIEhETUlfSUhfTVVURV9QSFlfU1RBVDApOwo+ ICB9Cj4gK0VYUE9SVF9TWU1CT0xfR1BMKGR3X2hkbWlfcGh5X3NldHVwX2hwZCk7Cj4gIAo+ICBz dGF0aWMgY29uc3Qgc3RydWN0IGR3X2hkbWlfcGh5X29wcyBkd19oZG1pX3N5bm9wc3lzX3BoeV9v cHMgPSB7Cj4gIAkuaW5pdCA9IGR3X2hkbWlfcGh5X2luaXQsCj4gZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9tZXNvbi9tZXNvbl9kd19oZG1pLmMgYi9kcml2ZXJzL2dwdS9kcm0vbWVzb24v bWVzb25fZHdfaGRtaS5jCj4gaW5kZXggMTdkZTNhZmQ5OGY2Li5lOGMzZWY4YTk0Y2UgMTAwNjQ0 Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL21lc29uL21lc29uX2R3X2hkbWkuYwo+ICsrKyBiL2Ry aXZlcnMvZ3B1L2RybS9tZXNvbi9tZXNvbl9kd19oZG1pLmMKPiBAQCAtMzAyLDcgKzMwMiw3IEBA IHN0YXRpYyB2b2lkIG1lc29uX2hkbWlfcGh5X3NldHVwX21vZGUoc3RydWN0IG1lc29uX2R3X2hk bWkgKmR3X2hkbWksCj4gIAl9Cj4gIH0KPiAgCj4gLXN0YXRpYyBpbmxpbmUgdm9pZCBkd19oZG1p X3BoeV9yZXNldChzdHJ1Y3QgbWVzb25fZHdfaGRtaSAqZHdfaGRtaSkKPiArc3RhdGljIGlubGlu ZSB2b2lkIG1lc29uX2R3X2hkbWlfcGh5X3Jlc2V0KHN0cnVjdCBtZXNvbl9kd19oZG1pICpkd19o ZG1pKQo+ICB7Cj4gIAlzdHJ1Y3QgbWVzb25fZHJtICpwcml2ID0gZHdfaGRtaS0+cHJpdjsKPiAg Cj4gQEAgLTQwOSw5ICs0MDksOSBAQCBzdGF0aWMgaW50IGR3X2hkbWlfcGh5X2luaXQoc3RydWN0 IGR3X2hkbWkgKmhkbWksIHZvaWQgKmRhdGEsCj4gIAltc2xlZXAoMTAwKTsKPiAgCj4gIAkvKiBS ZXNldCBQSFkgMyB0aW1lcyBpbiBhIHJvdyAqLwo+IC0JZHdfaGRtaV9waHlfcmVzZXQoZHdfaGRt aSk7Cj4gLQlkd19oZG1pX3BoeV9yZXNldChkd19oZG1pKTsKPiAtCWR3X2hkbWlfcGh5X3Jlc2V0 KGR3X2hkbWkpOwo+ICsJbWVzb25fZHdfaGRtaV9waHlfcmVzZXQoZHdfaGRtaSk7Cj4gKwltZXNv bl9kd19oZG1pX3BoeV9yZXNldChkd19oZG1pKTsKPiArCW1lc29uX2R3X2hkbWlfcGh5X3Jlc2V0 KGR3X2hkbWkpOwo+ICAKPiAgCS8qIFRlbXBvcmFyeSBEaXNhYmxlIFZFTkMgdmlkZW8gc3RyZWFt ICovCj4gIAlpZiAocHJpdi0+dmVuYy5oZG1pX3VzZV9lbmNpKQo+IGRpZmYgLS1naXQgYS9pbmNs dWRlL2RybS9icmlkZ2UvZHdfaGRtaS5oIGIvaW5jbHVkZS9kcm0vYnJpZGdlL2R3X2hkbWkuaAo+ IGluZGV4IDE4MmY4MzI4M2UyNC4uZjNmM2YwZTFiMmQzIDEwMDY0NAo+IC0tLSBhL2luY2x1ZGUv ZHJtL2JyaWRnZS9kd19oZG1pLmgKPiArKysgYi9pbmNsdWRlL2RybS9icmlkZ2UvZHdfaGRtaS5o Cj4gQEAgLTE1Nyw3ICsxNTcsMTggQEAgdm9pZCBkd19oZG1pX2F1ZGlvX2VuYWJsZShzdHJ1Y3Qg ZHdfaGRtaSAqaGRtaSk7Cj4gIHZvaWQgZHdfaGRtaV9hdWRpb19kaXNhYmxlKHN0cnVjdCBkd19o ZG1pICpoZG1pKTsKPiAgCj4gIC8qIFBIWSBjb25maWd1cmF0aW9uICovCj4gK3ZvaWQgZHdfaGRt aV9waHlfaTJjX3NldF9hZGRyKHN0cnVjdCBkd19oZG1pICpoZG1pLCB1OCBhZGRyZXNzKTsKPiAg dm9pZCBkd19oZG1pX3BoeV9pMmNfd3JpdGUoc3RydWN0IGR3X2hkbWkgKmhkbWksIHVuc2lnbmVk IHNob3J0IGRhdGEsCj4gIAkJCSAgIHVuc2lnbmVkIGNoYXIgYWRkcik7Cj4gIAo+ICt2b2lkIGR3 X2hkbWlfcGh5X2dlbjJfcGRkcShzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdTggZW5hYmxlKTsKPiAr dm9pZCBkd19oZG1pX3BoeV9nZW4yX3R4cHdyb24oc3RydWN0IGR3X2hkbWkgKmhkbWksIHU4IGVu YWJsZSk7Cj4gK3ZvaWQgZHdfaGRtaV9waHlfcmVzZXQoc3RydWN0IGR3X2hkbWkgKmhkbWkpOwo+ ICsKPiArZW51bSBkcm1fY29ubmVjdG9yX3N0YXR1cyBkd19oZG1pX3BoeV9yZWFkX2hwZChzdHJ1 Y3QgZHdfaGRtaSAqaGRtaSwKPiArCQkJCQkgICAgICAgdm9pZCAqZGF0YSk7Cj4gK3ZvaWQgZHdf aGRtaV9waHlfdXBkYXRlX2hwZChzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwgdm9pZCAqZGF0YSwKPiAr CQkJICAgIGJvb2wgZm9yY2UsIGJvb2wgZGlzYWJsZWQsIGJvb2wgcnhzZW5zZSk7Cj4gK3ZvaWQg ZHdfaGRtaV9waHlfc2V0dXBfaHBkKHN0cnVjdCBkd19oZG1pICpoZG1pLCB2b2lkICpkYXRhKTsK PiArCj4gICNlbmRpZiAvKiBfX0lNWF9IRE1JX0hfXyAqLwo+IAoKUmV2aWV3ZWQtYnk6IE5laWwg QXJtc3Ryb25nIDxuYXJtc3Ryb25nQGJheWxpYnJlLmNvbT4KX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2 ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21h aWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Thu, 18 Jan 2018 14:05:18 +0100 Subject: [PATCH v3 04/12] drm/bridge/synopsys: dw-hdmi: Export some PHY related functions In-Reply-To: <20180117201421.25954-5-jernej.skrabec@siol.net> References: <20180117201421.25954-1-jernej.skrabec@siol.net> <20180117201421.25954-5-jernej.skrabec@siol.net> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 17/01/2018 21:14, Jernej Skrabec wrote: > Parts of PHY code could be useful also for custom PHYs. For example, > Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY > with few additional memory mapped registers, so most of the Synopsys PHY > related code could be reused. > > Functions exported here are actually not specific to Synopsys PHYs but > to DWC HDMI controller PHY interface. This means that even if the PHY is > completely custom, i.e. not designed by Synopsys, exported functions can > be useful. > > Reviewed-by: Laurent Pinchart > Signed-off-by: Jernej Skrabec > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 44 +++++++++++++++++++++---------- > drivers/gpu/drm/meson/meson_dw_hdmi.c | 8 +++--- > include/drm/bridge/dw_hdmi.h | 11 ++++++++ > 3 files changed, 45 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > index 7ca14d7325b5..7d80f4b56683 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > @@ -1037,19 +1037,21 @@ static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable) > HDMI_PHY_CONF0_SVSRET_MASK); > } > > -static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) > +void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) > { > hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, > HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET, > HDMI_PHY_CONF0_GEN2_PDDQ_MASK); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_gen2_pddq); > > -static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) > +void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) > { > hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, > HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET, > HDMI_PHY_CONF0_GEN2_TXPWRON_MASK); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_gen2_txpwron); > > static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable) > { > @@ -1065,6 +1067,22 @@ static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) > HDMI_PHY_CONF0_SELDIPIF_MASK); > } > > +void dw_hdmi_phy_reset(struct dw_hdmi *hdmi) > +{ > + /* PHY reset. The reset signal is active high on Gen2 PHYs. */ > + hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > + hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > +} > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset); > + > +void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address) > +{ > + hdmi_phy_test_clear(hdmi, 1); > + hdmi_writeb(hdmi, address, HDMI_PHY_I2CM_SLAVE_ADDR); > + hdmi_phy_test_clear(hdmi, 0); > +} > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_set_addr); > + > static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi) > { > const struct dw_hdmi_phy_data *phy = hdmi->phy.data; > @@ -1203,16 +1221,11 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) > if (phy->has_svsret) > dw_hdmi_phy_enable_svsret(hdmi, 1); > > - /* PHY reset. The reset signal is active high on Gen2 PHYs. */ > - hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > - hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > + dw_hdmi_phy_reset(hdmi); > > hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST); > > - hdmi_phy_test_clear(hdmi, 1); > - hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2, > - HDMI_PHY_I2CM_SLAVE_ADDR); > - hdmi_phy_test_clear(hdmi, 0); > + dw_hdmi_phy_i2c_set_addr(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2); > > /* Write to the PHY as configured by the platform */ > if (pdata->configure_phy) > @@ -1251,15 +1264,16 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data) > dw_hdmi_phy_power_off(hdmi); > } > > -static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > - void *data) > +enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > + void *data) > { > return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? > connector_status_connected : connector_status_disconnected; > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_read_hpd); > > -static void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > - bool force, bool disabled, bool rxsense) > +void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > + bool force, bool disabled, bool rxsense) > { > u8 old_mask = hdmi->phy_mask; > > @@ -1271,8 +1285,9 @@ static void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > if (old_mask != hdmi->phy_mask) > hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_update_hpd); > > -static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > +void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > { > /* > * Configure the PHY RX SENSE and HPD interrupts polarities and clear > @@ -1291,6 +1306,7 @@ static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) > hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE), > HDMI_IH_MUTE_PHY_STAT0); > } > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_setup_hpd); > > static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = { > .init = dw_hdmi_phy_init, > diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c > index 17de3afd98f6..e8c3ef8a94ce 100644 > --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c > +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c > @@ -302,7 +302,7 @@ static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi, > } > } > > -static inline void dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi) > +static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi) > { > struct meson_drm *priv = dw_hdmi->priv; > > @@ -409,9 +409,9 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, > msleep(100); > > /* Reset PHY 3 times in a row */ > - dw_hdmi_phy_reset(dw_hdmi); > - dw_hdmi_phy_reset(dw_hdmi); > - dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > + meson_dw_hdmi_phy_reset(dw_hdmi); > > /* Temporary Disable VENC video stream */ > if (priv->venc.hdmi_use_enci) > diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h > index 182f83283e24..f3f3f0e1b2d3 100644 > --- a/include/drm/bridge/dw_hdmi.h > +++ b/include/drm/bridge/dw_hdmi.h > @@ -157,7 +157,18 @@ void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); > void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); > > /* PHY configuration */ > +void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address); > void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, > unsigned char addr); > > +void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable); > +void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable); > +void dw_hdmi_phy_reset(struct dw_hdmi *hdmi); > + > +enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > + void *data); > +void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data, > + bool force, bool disabled, bool rxsense); > +void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data); > + > #endif /* __IMX_HDMI_H__ */ > Reviewed-by: Neil Armstrong