[PATCH v2 0/2] iio: allow to set STM32 ADC resolution

[PATCH v2 0/2] iio: allow to set STM32 ADC resolution

[Fabrice Gasnier]

STM32 ADC supports several resolution. Add dt option so resolution
can be tuned at probe time. By default, maximum resolution is used
when it isn't set.

---
Changes in v2:
 - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
 is more common.

Fabrice Gasnier (2):
  dt-bindings: iio: stm32-adc: add option to set resolution
  iio: adc: stm32: add dt option to set resolution

 .../devicetree/bindings/iio/adc/st,stm32-adc.txt   |  4 ++
 drivers/iio/adc/stm32-adc.c                        | 50 +++++++++++++++++++++-
 2 files changed, 53 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 0/2] iio: allow to set STM32 ADC resolution

[Fabrice Gasnier]

STM32 ADC supports several resolution. Add dt option so resolution
can be tuned at probe time. By default, maximum resolution is used
when it isn't set.

---
Changes in v2:
 - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
 is more common.

Fabrice Gasnier (2):
  dt-bindings: iio: stm32-adc: add option to set resolution
  iio: adc: stm32: add dt option to set resolution

 .../devicetree/bindings/iio/adc/st,stm32-adc.txt   |  4 ++
 drivers/iio/adc/stm32-adc.c                        | 50 +++++++++++++++++++++-
 2 files changed, 53 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 0/2] iio: allow to set STM32 ADC resolution

[Fabrice Gasnier]

STM32 ADC supports several resolution. Add dt option so resolution
can be tuned at probe time. By default, maximum resolution is used
when it isn't set.

---
Changes in v2:
 - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
 is more common.

Fabrice Gasnier (2):
  dt-bindings: iio: stm32-adc: add option to set resolution
  iio: adc: stm32: add dt option to set resolution

 .../devicetree/bindings/iio/adc/st,stm32-adc.txt   |  4 ++
 drivers/iio/adc/stm32-adc.c                        | 50 +++++++++++++++++++++-
 2 files changed, 53 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Fabrice Gasnier]

Add documentation for 'assigned-resolution-bits' dt optional property.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
  is more common.
---
 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
index 5dfc88e..e35f9f1 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
@@ -57,6 +57,9 @@ Optional properties:
 - dmas: Phandle to dma channel for this ADC instance.
   See ../../dma/dma.txt for details.
 - dma-names: Must be "rx" when dmas property is being used.
+- assigned-resolution-bits: Resolution (bits) to use for conversions. Must
+  match device available resolutions (e.g. can be 6, 8, 10 or 12 on stm32f4).
+  Default is maximum resolution if unset.
 
 Example:
 	adc: adc@40012000 {
@@ -84,6 +87,7 @@ Example:
 			st,adc-channels = <8>;
 			dmas = <&dma2 0 0 0x400 0x0>;
 			dma-names = "rx";
+			assigned-resolution-bits = <8>;
 		};
 		...
 		other adc child nodes follow...
-- 
1.9.1

[PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Fabrice Gasnier]

Add documentation for 'assigned-resolution-bits' dt optional property.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
  is more common.
---
 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
index 5dfc88e..e35f9f1 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
@@ -57,6 +57,9 @@ Optional properties:
 - dmas: Phandle to dma channel for this ADC instance.
   See ../../dma/dma.txt for details.
 - dma-names: Must be "rx" when dmas property is being used.
+- assigned-resolution-bits: Resolution (bits) to use for conversions. Must
+  match device available resolutions (e.g. can be 6, 8, 10 or 12 on stm32f4).
+  Default is maximum resolution if unset.
 
 Example:
 	adc: adc@40012000 {
@@ -84,6 +87,7 @@ Example:
 			st,adc-channels = <8>;
 			dmas = <&dma2 0 0 0x400 0x0>;
 			dma-names = "rx";
+			assigned-resolution-bits = <8>;
 		};
 		...
 		other adc child nodes follow...
-- 
1.9.1

[PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Fabrice Gasnier]

Add documentation for 'assigned-resolution-bits' dt optional property.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
  is more common.
---
 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
index 5dfc88e..e35f9f1 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
@@ -57,6 +57,9 @@ Optional properties:
 - dmas: Phandle to dma channel for this ADC instance.
   See ../../dma/dma.txt for details.
 - dma-names: Must be "rx" when dmas property is being used.
+- assigned-resolution-bits: Resolution (bits) to use for conversions. Must
+  match device available resolutions (e.g. can be 6, 8, 10 or 12 on stm32f4).
+  Default is maximum resolution if unset.
 
 Example:
 	adc: adc at 40012000 {
@@ -84,6 +87,7 @@ Example:
 			st,adc-channels = <8>;
 			dmas = <&dma2 0 0 0x400 0x0>;
 			dma-names = "rx";
+			assigned-resolution-bits = <8>;
 		};
 		...
 		other adc child nodes follow...
-- 
1.9.1

[PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Fabrice Gasnier]

stm32 adc supports several resolution. Add 'assigned-resolution-bits'
dt optional property to set it. Default to maximum resolution in case
it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
  is more common.
---
 drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 9b49a6ad..c28e7ff 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -60,6 +60,8 @@
 #define STM32F4_EOC			BIT(1)
 
 /* STM32F4_ADC_CR1 - bit fields */
+#define STM32F4_RES_SHIFT		24
+#define STM32F4_RES_MASK		GENMASK(25, 24)
 #define STM32F4_SCAN			BIT(8)
 #define STM32F4_EOCIE			BIT(5)
 
@@ -141,6 +143,7 @@ struct stm32_adc_regs {
  * @lock:		spinlock
  * @bufi:		data buffer index
  * @num_conv:		expected number of scan conversions
+ * @res:		data resolution (e.g. RES bitfield value)
  * @trigger_polarity:	external trigger polarity (e.g. exten)
  * @dma_chan:		dma channel
  * @rx_buf:		dma rx buffer cpu address
@@ -157,6 +160,7 @@ struct stm32_adc {
 	spinlock_t		lock;		/* interrupt lock */
 	unsigned int		bufi;
 	unsigned int		num_conv;
+	u32			res;
 	u32			trigger_polarity;
 	struct dma_chan		*dma_chan;
 	u8			*rx_buf;
@@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
 	{ IIO_VOLTAGE, 15, "in15" },
 };
 
+static const unsigned int stm32f4_adc_resolutions[] = {
+	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
+	12, 10, 8, 6,
+};
+
 /**
  * stm32f4_sq - describe regular sequence registers
  * - L: sequence len (register & bit field)
@@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
 }
 
+static void stm32_adc_set_res(struct stm32_adc *adc)
+{
+	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
+
+	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
+	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
+}
+
 /**
  * stm32_adc_start_conv() - Start conversions for regular channels.
  * @adc: stm32 adc instance
@@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
 	{},
 };
 
+static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
+{
+	struct device_node *node = indio_dev->dev.of_node;
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	unsigned int i;
+	u32 res;
+
+	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
+		res = stm32f4_adc_resolutions[0];
+
+	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
+		if (res == stm32f4_adc_resolutions[i])
+			break;
+	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
+		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
+		return -EINVAL;
+	}
+
+	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
+	adc->res = i;
+
+	return 0;
+}
+
 static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 				    struct iio_chan_spec *chan,
 				    const struct stm32_adc_chan_spec *channel,
 				    int scan_index)
 {
+	struct stm32_adc *adc = iio_priv(indio_dev);
+
 	chan->type = channel->type;
 	chan->channel = channel->channel;
 	chan->datasheet_name = channel->name;
@@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 	chan->scan_type.sign = 'u';
-	chan->scan_type.realbits = 12;
+	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
 	chan->scan_type.storagebits = 16;
 	chan->ext_info = stm32_adc_ext_info;
 }
@@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = stm32_adc_of_get_resolution(indio_dev);
+	if (ret < 0)
+		goto err_clk_disable;
+	stm32_adc_set_res(adc);
+
 	ret = stm32_adc_chan_of_init(indio_dev);
 	if (ret < 0)
 		goto err_clk_disable;
-- 
1.9.1

[PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Fabrice Gasnier]

stm32 adc supports several resolution. Add 'assigned-resolution-bits'
dt optional property to set it. Default to maximum resolution in case
it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
  is more common.
---
 drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 9b49a6ad..c28e7ff 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -60,6 +60,8 @@
 #define STM32F4_EOC			BIT(1)
 
 /* STM32F4_ADC_CR1 - bit fields */
+#define STM32F4_RES_SHIFT		24
+#define STM32F4_RES_MASK		GENMASK(25, 24)
 #define STM32F4_SCAN			BIT(8)
 #define STM32F4_EOCIE			BIT(5)
 
@@ -141,6 +143,7 @@ struct stm32_adc_regs {
  * @lock:		spinlock
  * @bufi:		data buffer index
  * @num_conv:		expected number of scan conversions
+ * @res:		data resolution (e.g. RES bitfield value)
  * @trigger_polarity:	external trigger polarity (e.g. exten)
  * @dma_chan:		dma channel
  * @rx_buf:		dma rx buffer cpu address
@@ -157,6 +160,7 @@ struct stm32_adc {
 	spinlock_t		lock;		/* interrupt lock */
 	unsigned int		bufi;
 	unsigned int		num_conv;
+	u32			res;
 	u32			trigger_polarity;
 	struct dma_chan		*dma_chan;
 	u8			*rx_buf;
@@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
 	{ IIO_VOLTAGE, 15, "in15" },
 };
 
+static const unsigned int stm32f4_adc_resolutions[] = {
+	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
+	12, 10, 8, 6,
+};
+
 /**
  * stm32f4_sq - describe regular sequence registers
  * - L: sequence len (register & bit field)
@@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
 }
 
+static void stm32_adc_set_res(struct stm32_adc *adc)
+{
+	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
+
+	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
+	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
+}
+
 /**
  * stm32_adc_start_conv() - Start conversions for regular channels.
  * @adc: stm32 adc instance
@@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
 	{},
 };
 
+static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
+{
+	struct device_node *node = indio_dev->dev.of_node;
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	unsigned int i;
+	u32 res;
+
+	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
+		res = stm32f4_adc_resolutions[0];
+
+	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
+		if (res == stm32f4_adc_resolutions[i])
+			break;
+	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
+		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
+		return -EINVAL;
+	}
+
+	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
+	adc->res = i;
+
+	return 0;
+}
+
 static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 				    struct iio_chan_spec *chan,
 				    const struct stm32_adc_chan_spec *channel,
 				    int scan_index)
 {
+	struct stm32_adc *adc = iio_priv(indio_dev);
+
 	chan->type = channel->type;
 	chan->channel = channel->channel;
 	chan->datasheet_name = channel->name;
@@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 	chan->scan_type.sign = 'u';
-	chan->scan_type.realbits = 12;
+	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
 	chan->scan_type.storagebits = 16;
 	chan->ext_info = stm32_adc_ext_info;
 }
@@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = stm32_adc_of_get_resolution(indio_dev);
+	if (ret < 0)
+		goto err_clk_disable;
+	stm32_adc_set_res(adc);
+
 	ret = stm32_adc_chan_of_init(indio_dev);
 	if (ret < 0)
 		goto err_clk_disable;
-- 
1.9.1

[PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Fabrice Gasnier]

stm32 adc supports several resolution. Add 'assigned-resolution-bits'
dt optional property to set it. Default to maximum resolution in case
it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
Changes in v2:
- rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
  is more common.
---
 drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 9b49a6ad..c28e7ff 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -60,6 +60,8 @@
 #define STM32F4_EOC			BIT(1)
 
 /* STM32F4_ADC_CR1 - bit fields */
+#define STM32F4_RES_SHIFT		24
+#define STM32F4_RES_MASK		GENMASK(25, 24)
 #define STM32F4_SCAN			BIT(8)
 #define STM32F4_EOCIE			BIT(5)
 
@@ -141,6 +143,7 @@ struct stm32_adc_regs {
  * @lock:		spinlock
  * @bufi:		data buffer index
  * @num_conv:		expected number of scan conversions
+ * @res:		data resolution (e.g. RES bitfield value)
  * @trigger_polarity:	external trigger polarity (e.g. exten)
  * @dma_chan:		dma channel
  * @rx_buf:		dma rx buffer cpu address
@@ -157,6 +160,7 @@ struct stm32_adc {
 	spinlock_t		lock;		/* interrupt lock */
 	unsigned int		bufi;
 	unsigned int		num_conv;
+	u32			res;
 	u32			trigger_polarity;
 	struct dma_chan		*dma_chan;
 	u8			*rx_buf;
@@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
 	{ IIO_VOLTAGE, 15, "in15" },
 };
 
+static const unsigned int stm32f4_adc_resolutions[] = {
+	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
+	12, 10, 8, 6,
+};
+
 /**
  * stm32f4_sq - describe regular sequence registers
  * - L: sequence len (register & bit field)
@@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
 }
 
+static void stm32_adc_set_res(struct stm32_adc *adc)
+{
+	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
+
+	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
+	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
+}
+
 /**
  * stm32_adc_start_conv() - Start conversions for regular channels.
  * @adc: stm32 adc instance
@@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
 	{},
 };
 
+static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
+{
+	struct device_node *node = indio_dev->dev.of_node;
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	unsigned int i;
+	u32 res;
+
+	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
+		res = stm32f4_adc_resolutions[0];
+
+	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
+		if (res == stm32f4_adc_resolutions[i])
+			break;
+	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
+		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
+		return -EINVAL;
+	}
+
+	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
+	adc->res = i;
+
+	return 0;
+}
+
 static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 				    struct iio_chan_spec *chan,
 				    const struct stm32_adc_chan_spec *channel,
 				    int scan_index)
 {
+	struct stm32_adc *adc = iio_priv(indio_dev);
+
 	chan->type = channel->type;
 	chan->channel = channel->channel;
 	chan->datasheet_name = channel->name;
@@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 	chan->scan_type.sign = 'u';
-	chan->scan_type.realbits = 12;
+	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
 	chan->scan_type.storagebits = 16;
 	chan->ext_info = stm32_adc_ext_info;
 }
@@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = stm32_adc_of_get_resolution(indio_dev);
+	if (ret < 0)
+		goto err_clk_disable;
+	stm32_adc_set_res(adc);
+
 	ret = stm32_adc_chan_of_init(indio_dev);
 	if (ret < 0)
 		goto err_clk_disable;
-- 
1.9.1

Re: [PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 31/03/17 13:32, Fabrice Gasnier wrote:
> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
> dt optional property to set it. Default to maximum resolution in case
> it isn't set.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
The code is fine.  Just waiting on review of the binding.

Give me a poke if I seem to have dropped this in a week or two.

Thanks,

Jonathan
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>   is more common.
> ---
>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
> index 9b49a6ad..c28e7ff 100644
> --- a/drivers/iio/adc/stm32-adc.c
> +++ b/drivers/iio/adc/stm32-adc.c
> @@ -60,6 +60,8 @@
>  #define STM32F4_EOC			BIT(1)
>  
>  /* STM32F4_ADC_CR1 - bit fields */
> +#define STM32F4_RES_SHIFT		24
> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>  #define STM32F4_SCAN			BIT(8)
>  #define STM32F4_EOCIE			BIT(5)
>  
> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>   * @lock:		spinlock
>   * @bufi:		data buffer index
>   * @num_conv:		expected number of scan conversions
> + * @res:		data resolution (e.g. RES bitfield value)
>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>   * @dma_chan:		dma channel
>   * @rx_buf:		dma rx buffer cpu address
> @@ -157,6 +160,7 @@ struct stm32_adc {
>  	spinlock_t		lock;		/* interrupt lock */
>  	unsigned int		bufi;
>  	unsigned int		num_conv;
> +	u32			res;
>  	u32			trigger_polarity;
>  	struct dma_chan		*dma_chan;
>  	u8			*rx_buf;
> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>  	{ IIO_VOLTAGE, 15, "in15" },
>  };
>  
> +static const unsigned int stm32f4_adc_resolutions[] = {
> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
> +	12, 10, 8, 6,
> +};
> +
>  /**
>   * stm32f4_sq - describe regular sequence registers
>   * - L: sequence len (register & bit field)
> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>  }
>  
> +static void stm32_adc_set_res(struct stm32_adc *adc)
> +{
> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
> +
> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
> +}
> +
>  /**
>   * stm32_adc_start_conv() - Start conversions for regular channels.
>   * @adc: stm32 adc instance
> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>  	{},
>  };
>  
> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
> +{
> +	struct device_node *node = indio_dev->dev.of_node;
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +	unsigned int i;
> +	u32 res;
> +
> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
> +		res = stm32f4_adc_resolutions[0];
> +
> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
> +		if (res == stm32f4_adc_resolutions[i])
> +			break;
> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
> +		return -EINVAL;
> +	}
> +
> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
> +	adc->res = i;
> +
> +	return 0;
> +}
> +
>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  				    struct iio_chan_spec *chan,
>  				    const struct stm32_adc_chan_spec *channel,
>  				    int scan_index)
>  {
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +
>  	chan->type = channel->type;
>  	chan->channel = channel->channel;
>  	chan->datasheet_name = channel->name;
> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>  	chan->scan_type.sign = 'u';
> -	chan->scan_type.realbits = 12;
> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>  	chan->scan_type.storagebits = 16;
>  	chan->ext_info = stm32_adc_ext_info;
>  }
> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	ret = stm32_adc_of_get_resolution(indio_dev);
> +	if (ret < 0)
> +		goto err_clk_disable;
> +	stm32_adc_set_res(adc);
> +
>  	ret = stm32_adc_chan_of_init(indio_dev);
>  	if (ret < 0)
>  		goto err_clk_disable;
> 

Re: [PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 31/03/17 13:32, Fabrice Gasnier wrote:
> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
> dt optional property to set it. Default to maximum resolution in case
> it isn't set.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
The code is fine.  Just waiting on review of the binding.

Give me a poke if I seem to have dropped this in a week or two.

Thanks,

Jonathan
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>   is more common.
> ---
>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
> index 9b49a6ad..c28e7ff 100644
> --- a/drivers/iio/adc/stm32-adc.c
> +++ b/drivers/iio/adc/stm32-adc.c
> @@ -60,6 +60,8 @@
>  #define STM32F4_EOC			BIT(1)
>  
>  /* STM32F4_ADC_CR1 - bit fields */
> +#define STM32F4_RES_SHIFT		24
> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>  #define STM32F4_SCAN			BIT(8)
>  #define STM32F4_EOCIE			BIT(5)
>  
> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>   * @lock:		spinlock
>   * @bufi:		data buffer index
>   * @num_conv:		expected number of scan conversions
> + * @res:		data resolution (e.g. RES bitfield value)
>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>   * @dma_chan:		dma channel
>   * @rx_buf:		dma rx buffer cpu address
> @@ -157,6 +160,7 @@ struct stm32_adc {
>  	spinlock_t		lock;		/* interrupt lock */
>  	unsigned int		bufi;
>  	unsigned int		num_conv;
> +	u32			res;
>  	u32			trigger_polarity;
>  	struct dma_chan		*dma_chan;
>  	u8			*rx_buf;
> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>  	{ IIO_VOLTAGE, 15, "in15" },
>  };
>  
> +static const unsigned int stm32f4_adc_resolutions[] = {
> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
> +	12, 10, 8, 6,
> +};
> +
>  /**
>   * stm32f4_sq - describe regular sequence registers
>   * - L: sequence len (register & bit field)
> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>  }
>  
> +static void stm32_adc_set_res(struct stm32_adc *adc)
> +{
> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
> +
> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
> +}
> +
>  /**
>   * stm32_adc_start_conv() - Start conversions for regular channels.
>   * @adc: stm32 adc instance
> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>  	{},
>  };
>  
> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
> +{
> +	struct device_node *node = indio_dev->dev.of_node;
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +	unsigned int i;
> +	u32 res;
> +
> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
> +		res = stm32f4_adc_resolutions[0];
> +
> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
> +		if (res == stm32f4_adc_resolutions[i])
> +			break;
> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
> +		return -EINVAL;
> +	}
> +
> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
> +	adc->res = i;
> +
> +	return 0;
> +}
> +
>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  				    struct iio_chan_spec *chan,
>  				    const struct stm32_adc_chan_spec *channel,
>  				    int scan_index)
>  {
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +
>  	chan->type = channel->type;
>  	chan->channel = channel->channel;
>  	chan->datasheet_name = channel->name;
> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>  	chan->scan_type.sign = 'u';
> -	chan->scan_type.realbits = 12;
> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>  	chan->scan_type.storagebits = 16;
>  	chan->ext_info = stm32_adc_ext_info;
>  }
> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	ret = stm32_adc_of_get_resolution(indio_dev);
> +	if (ret < 0)
> +		goto err_clk_disable;
> +	stm32_adc_set_res(adc);
> +
>  	ret = stm32_adc_chan_of_init(indio_dev);
>  	if (ret < 0)
>  		goto err_clk_disable;
> 

[PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 31/03/17 13:32, Fabrice Gasnier wrote:
> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
> dt optional property to set it. Default to maximum resolution in case
> it isn't set.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
The code is fine.  Just waiting on review of the binding.

Give me a poke if I seem to have dropped this in a week or two.

Thanks,

Jonathan
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>   is more common.
> ---
>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
> index 9b49a6ad..c28e7ff 100644
> --- a/drivers/iio/adc/stm32-adc.c
> +++ b/drivers/iio/adc/stm32-adc.c
> @@ -60,6 +60,8 @@
>  #define STM32F4_EOC			BIT(1)
>  
>  /* STM32F4_ADC_CR1 - bit fields */
> +#define STM32F4_RES_SHIFT		24
> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>  #define STM32F4_SCAN			BIT(8)
>  #define STM32F4_EOCIE			BIT(5)
>  
> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>   * @lock:		spinlock
>   * @bufi:		data buffer index
>   * @num_conv:		expected number of scan conversions
> + * @res:		data resolution (e.g. RES bitfield value)
>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>   * @dma_chan:		dma channel
>   * @rx_buf:		dma rx buffer cpu address
> @@ -157,6 +160,7 @@ struct stm32_adc {
>  	spinlock_t		lock;		/* interrupt lock */
>  	unsigned int		bufi;
>  	unsigned int		num_conv;
> +	u32			res;
>  	u32			trigger_polarity;
>  	struct dma_chan		*dma_chan;
>  	u8			*rx_buf;
> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>  	{ IIO_VOLTAGE, 15, "in15" },
>  };
>  
> +static const unsigned int stm32f4_adc_resolutions[] = {
> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
> +	12, 10, 8, 6,
> +};
> +
>  /**
>   * stm32f4_sq - describe regular sequence registers
>   * - L: sequence len (register & bit field)
> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>  }
>  
> +static void stm32_adc_set_res(struct stm32_adc *adc)
> +{
> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
> +
> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
> +}
> +
>  /**
>   * stm32_adc_start_conv() - Start conversions for regular channels.
>   * @adc: stm32 adc instance
> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>  	{},
>  };
>  
> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
> +{
> +	struct device_node *node = indio_dev->dev.of_node;
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +	unsigned int i;
> +	u32 res;
> +
> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
> +		res = stm32f4_adc_resolutions[0];
> +
> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
> +		if (res == stm32f4_adc_resolutions[i])
> +			break;
> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
> +		return -EINVAL;
> +	}
> +
> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
> +	adc->res = i;
> +
> +	return 0;
> +}
> +
>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  				    struct iio_chan_spec *chan,
>  				    const struct stm32_adc_chan_spec *channel,
>  				    int scan_index)
>  {
> +	struct stm32_adc *adc = iio_priv(indio_dev);
> +
>  	chan->type = channel->type;
>  	chan->channel = channel->channel;
>  	chan->datasheet_name = channel->name;
> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>  	chan->scan_type.sign = 'u';
> -	chan->scan_type.realbits = 12;
> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>  	chan->scan_type.storagebits = 16;
>  	chan->ext_info = stm32_adc_ext_info;
>  }
> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	ret = stm32_adc_of_get_resolution(indio_dev);
> +	if (ret < 0)
> +		goto err_clk_disable;
> +	stm32_adc_set_res(adc);
> +
>  	ret = stm32_adc_chan_of_init(indio_dev);
>  	if (ret < 0)
>  		goto err_clk_disable;
> 

Re: [PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Rob Herring]

On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
> Add documentation for 'assigned-resolution-bits' dt optional property.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>   is more common.
> ---
>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>  1 file changed, 4 insertions(+)

Acked-by: Rob Herring <robh@kernel.org> 

Re: [PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Rob Herring]

On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
> Add documentation for 'assigned-resolution-bits' dt optional property.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>   is more common.
> ---
>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>  1 file changed, 4 insertions(+)

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> 
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[PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Rob Herring]

On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
> Add documentation for 'assigned-resolution-bits' dt optional property.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
> Changes in v2:
> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>   is more common.
> ---
>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>  1 file changed, 4 insertions(+)

Acked-by: Rob Herring <robh@kernel.org> 

Re: [PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Jonathan Cameron]

On 03/04/17 17:46, Rob Herring wrote:
> On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
>> Add documentation for 'assigned-resolution-bits' dt optional property.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>>   is more common.
>> ---
>>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>>  1 file changed, 4 insertions(+)
> 
> Acked-by: Rob Herring <robh@kernel.org> 
Thanks.

Applied to the togreg branch of iio.git.  Will push out as testing for
the autobuilders to have a chance to play with it.

Jonathan
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Jonathan Cameron]

On 03/04/17 17:46, Rob Herring wrote:
> On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
>> Add documentation for 'assigned-resolution-bits' dt optional property.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>>   is more common.
>> ---
>>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>>  1 file changed, 4 insertions(+)
> 
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> 
Thanks.

Applied to the togreg branch of iio.git.  Will push out as testing for
the autobuilders to have a chance to play with it.

Jonathan
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
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[PATCH v2 1/2] dt-bindings: iio: stm32-adc: add option to set resolution

[Jonathan Cameron]

On 03/04/17 17:46, Rob Herring wrote:
> On Fri, Mar 31, 2017 at 02:32:37PM +0200, Fabrice Gasnier wrote:
>> Add documentation for 'assigned-resolution-bits' dt optional property.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits' so it
>>   is more common.
>> ---
>>  Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 4 ++++
>>  1 file changed, 4 insertions(+)
> 
> Acked-by: Rob Herring <robh@kernel.org> 
Thanks.

Applied to the togreg branch of iio.git.  Will push out as testing for
the autobuilders to have a chance to play with it.

Jonathan
> --
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> 

Re: [PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 02/04/17 09:54, Jonathan Cameron wrote:
> On 31/03/17 13:32, Fabrice Gasnier wrote:
>> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
>> dt optional property to set it. Default to maximum resolution in case
>> it isn't set.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> The code is fine.  Just waiting on review of the binding.
> 
> Give me a poke if I seem to have dropped this in a week or two.
Applied to the togreg branch of iio.git and pushed out as
testing for the autobuilders to play with it.

Thanks,

Jonathan
> 
> Thanks,
> 
> Jonathan
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>>   is more common.
>> ---
>>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>>  1 file changed, 49 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
>> index 9b49a6ad..c28e7ff 100644
>> --- a/drivers/iio/adc/stm32-adc.c
>> +++ b/drivers/iio/adc/stm32-adc.c
>> @@ -60,6 +60,8 @@
>>  #define STM32F4_EOC			BIT(1)
>>  
>>  /* STM32F4_ADC_CR1 - bit fields */
>> +#define STM32F4_RES_SHIFT		24
>> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>>  #define STM32F4_SCAN			BIT(8)
>>  #define STM32F4_EOCIE			BIT(5)
>>  
>> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>>   * @lock:		spinlock
>>   * @bufi:		data buffer index
>>   * @num_conv:		expected number of scan conversions
>> + * @res:		data resolution (e.g. RES bitfield value)
>>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>>   * @dma_chan:		dma channel
>>   * @rx_buf:		dma rx buffer cpu address
>> @@ -157,6 +160,7 @@ struct stm32_adc {
>>  	spinlock_t		lock;		/* interrupt lock */
>>  	unsigned int		bufi;
>>  	unsigned int		num_conv;
>> +	u32			res;
>>  	u32			trigger_polarity;
>>  	struct dma_chan		*dma_chan;
>>  	u8			*rx_buf;
>> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>>  	{ IIO_VOLTAGE, 15, "in15" },
>>  };
>>  
>> +static const unsigned int stm32f4_adc_resolutions[] = {
>> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
>> +	12, 10, 8, 6,
>> +};
>> +
>>  /**
>>   * stm32f4_sq - describe regular sequence registers
>>   * - L: sequence len (register & bit field)
>> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>>  }
>>  
>> +static void stm32_adc_set_res(struct stm32_adc *adc)
>> +{
>> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
>> +
>> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
>> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
>> +}
>> +
>>  /**
>>   * stm32_adc_start_conv() - Start conversions for regular channels.
>>   * @adc: stm32 adc instance
>> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>>  	{},
>>  };
>>  
>> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
>> +{
>> +	struct device_node *node = indio_dev->dev.of_node;
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +	unsigned int i;
>> +	u32 res;
>> +
>> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
>> +		res = stm32f4_adc_resolutions[0];
>> +
>> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
>> +		if (res == stm32f4_adc_resolutions[i])
>> +			break;
>> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
>> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
>> +		return -EINVAL;
>> +	}
>> +
>> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
>> +	adc->res = i;
>> +
>> +	return 0;
>> +}
>> +
>>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  				    struct iio_chan_spec *chan,
>>  				    const struct stm32_adc_chan_spec *channel,
>>  				    int scan_index)
>>  {
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +
>>  	chan->type = channel->type;
>>  	chan->channel = channel->channel;
>>  	chan->datasheet_name = channel->name;
>> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>>  	chan->scan_type.sign = 'u';
>> -	chan->scan_type.realbits = 12;
>> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>>  	chan->scan_type.storagebits = 16;
>>  	chan->ext_info = stm32_adc_ext_info;
>>  }
>> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>>  		return ret;
>>  	}
>>  
>> +	ret = stm32_adc_of_get_resolution(indio_dev);
>> +	if (ret < 0)
>> +		goto err_clk_disable;
>> +	stm32_adc_set_res(adc);
>> +
>>  	ret = stm32_adc_chan_of_init(indio_dev);
>>  	if (ret < 0)
>>  		goto err_clk_disable;
>>
> 
> --
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> the body of a message to majordomo@vger.kernel.org
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> 

Re: [PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 02/04/17 09:54, Jonathan Cameron wrote:
> On 31/03/17 13:32, Fabrice Gasnier wrote:
>> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
>> dt optional property to set it. Default to maximum resolution in case
>> it isn't set.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
> The code is fine.  Just waiting on review of the binding.
> 
> Give me a poke if I seem to have dropped this in a week or two.
Applied to the togreg branch of iio.git and pushed out as
testing for the autobuilders to play with it.

Thanks,

Jonathan
> 
> Thanks,
> 
> Jonathan
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>>   is more common.
>> ---
>>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>>  1 file changed, 49 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
>> index 9b49a6ad..c28e7ff 100644
>> --- a/drivers/iio/adc/stm32-adc.c
>> +++ b/drivers/iio/adc/stm32-adc.c
>> @@ -60,6 +60,8 @@
>>  #define STM32F4_EOC			BIT(1)
>>  
>>  /* STM32F4_ADC_CR1 - bit fields */
>> +#define STM32F4_RES_SHIFT		24
>> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>>  #define STM32F4_SCAN			BIT(8)
>>  #define STM32F4_EOCIE			BIT(5)
>>  
>> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>>   * @lock:		spinlock
>>   * @bufi:		data buffer index
>>   * @num_conv:		expected number of scan conversions
>> + * @res:		data resolution (e.g. RES bitfield value)
>>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>>   * @dma_chan:		dma channel
>>   * @rx_buf:		dma rx buffer cpu address
>> @@ -157,6 +160,7 @@ struct stm32_adc {
>>  	spinlock_t		lock;		/* interrupt lock */
>>  	unsigned int		bufi;
>>  	unsigned int		num_conv;
>> +	u32			res;
>>  	u32			trigger_polarity;
>>  	struct dma_chan		*dma_chan;
>>  	u8			*rx_buf;
>> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>>  	{ IIO_VOLTAGE, 15, "in15" },
>>  };
>>  
>> +static const unsigned int stm32f4_adc_resolutions[] = {
>> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
>> +	12, 10, 8, 6,
>> +};
>> +
>>  /**
>>   * stm32f4_sq - describe regular sequence registers
>>   * - L: sequence len (register & bit field)
>> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>>  }
>>  
>> +static void stm32_adc_set_res(struct stm32_adc *adc)
>> +{
>> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
>> +
>> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
>> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
>> +}
>> +
>>  /**
>>   * stm32_adc_start_conv() - Start conversions for regular channels.
>>   * @adc: stm32 adc instance
>> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>>  	{},
>>  };
>>  
>> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
>> +{
>> +	struct device_node *node = indio_dev->dev.of_node;
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +	unsigned int i;
>> +	u32 res;
>> +
>> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
>> +		res = stm32f4_adc_resolutions[0];
>> +
>> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
>> +		if (res == stm32f4_adc_resolutions[i])
>> +			break;
>> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
>> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
>> +		return -EINVAL;
>> +	}
>> +
>> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
>> +	adc->res = i;
>> +
>> +	return 0;
>> +}
>> +
>>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  				    struct iio_chan_spec *chan,
>>  				    const struct stm32_adc_chan_spec *channel,
>>  				    int scan_index)
>>  {
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +
>>  	chan->type = channel->type;
>>  	chan->channel = channel->channel;
>>  	chan->datasheet_name = channel->name;
>> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>>  	chan->scan_type.sign = 'u';
>> -	chan->scan_type.realbits = 12;
>> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>>  	chan->scan_type.storagebits = 16;
>>  	chan->ext_info = stm32_adc_ext_info;
>>  }
>> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>>  		return ret;
>>  	}
>>  
>> +	ret = stm32_adc_of_get_resolution(indio_dev);
>> +	if (ret < 0)
>> +		goto err_clk_disable;
>> +	stm32_adc_set_res(adc);
>> +
>>  	ret = stm32_adc_chan_of_init(indio_dev);
>>  	if (ret < 0)
>>  		goto err_clk_disable;
>>
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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> 

[PATCH v2 2/2] iio: adc: stm32: add dt option to set resolution

[Jonathan Cameron]

On 02/04/17 09:54, Jonathan Cameron wrote:
> On 31/03/17 13:32, Fabrice Gasnier wrote:
>> stm32 adc supports several resolution. Add 'assigned-resolution-bits'
>> dt optional property to set it. Default to maximum resolution in case
>> it isn't set.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> The code is fine.  Just waiting on review of the binding.
> 
> Give me a poke if I seem to have dropped this in a week or two.
Applied to the togreg branch of iio.git and pushed out as
testing for the autobuilders to play with it.

Thanks,

Jonathan
> 
> Thanks,
> 
> Jonathan
>> ---
>> Changes in v2:
>> - rename property from 'st,adc-res' to 'assigned-resolution-bits', so it
>>   is more common.
>> ---
>>  drivers/iio/adc/stm32-adc.c | 50 ++++++++++++++++++++++++++++++++++++++++++++-
>>  1 file changed, 49 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
>> index 9b49a6ad..c28e7ff 100644
>> --- a/drivers/iio/adc/stm32-adc.c
>> +++ b/drivers/iio/adc/stm32-adc.c
>> @@ -60,6 +60,8 @@
>>  #define STM32F4_EOC			BIT(1)
>>  
>>  /* STM32F4_ADC_CR1 - bit fields */
>> +#define STM32F4_RES_SHIFT		24
>> +#define STM32F4_RES_MASK		GENMASK(25, 24)
>>  #define STM32F4_SCAN			BIT(8)
>>  #define STM32F4_EOCIE			BIT(5)
>>  
>> @@ -141,6 +143,7 @@ struct stm32_adc_regs {
>>   * @lock:		spinlock
>>   * @bufi:		data buffer index
>>   * @num_conv:		expected number of scan conversions
>> + * @res:		data resolution (e.g. RES bitfield value)
>>   * @trigger_polarity:	external trigger polarity (e.g. exten)
>>   * @dma_chan:		dma channel
>>   * @rx_buf:		dma rx buffer cpu address
>> @@ -157,6 +160,7 @@ struct stm32_adc {
>>  	spinlock_t		lock;		/* interrupt lock */
>>  	unsigned int		bufi;
>>  	unsigned int		num_conv;
>> +	u32			res;
>>  	u32			trigger_polarity;
>>  	struct dma_chan		*dma_chan;
>>  	u8			*rx_buf;
>> @@ -196,6 +200,11 @@ struct stm32_adc_chan_spec {
>>  	{ IIO_VOLTAGE, 15, "in15" },
>>  };
>>  
>> +static const unsigned int stm32f4_adc_resolutions[] = {
>> +	/* sorted values so the index matches RES[1:0] in STM32F4_ADC_CR1 */
>> +	12, 10, 8, 6,
>> +};
>> +
>>  /**
>>   * stm32f4_sq - describe regular sequence registers
>>   * - L: sequence len (register & bit field)
>> @@ -302,6 +311,14 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
>>  	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
>>  }
>>  
>> +static void stm32_adc_set_res(struct stm32_adc *adc)
>> +{
>> +	u32 val = stm32_adc_readl(adc, STM32F4_ADC_CR1);
>> +
>> +	val = (val & ~STM32F4_RES_MASK) | (adc->res << STM32F4_RES_SHIFT);
>> +	stm32_adc_writel(adc, STM32F4_ADC_CR1, val);
>> +}
>> +
>>  /**
>>   * stm32_adc_start_conv() - Start conversions for regular channels.
>>   * @adc: stm32 adc instance
>> @@ -870,11 +887,37 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>>  	{},
>>  };
>>  
>> +static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
>> +{
>> +	struct device_node *node = indio_dev->dev.of_node;
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +	unsigned int i;
>> +	u32 res;
>> +
>> +	if (of_property_read_u32(node, "assigned-resolution-bits", &res))
>> +		res = stm32f4_adc_resolutions[0];
>> +
>> +	for (i = 0; i < ARRAY_SIZE(stm32f4_adc_resolutions); i++)
>> +		if (res == stm32f4_adc_resolutions[i])
>> +			break;
>> +	if (i >= ARRAY_SIZE(stm32f4_adc_resolutions)) {
>> +		dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
>> +		return -EINVAL;
>> +	}
>> +
>> +	dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
>> +	adc->res = i;
>> +
>> +	return 0;
>> +}
>> +
>>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  				    struct iio_chan_spec *chan,
>>  				    const struct stm32_adc_chan_spec *channel,
>>  				    int scan_index)
>>  {
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +
>>  	chan->type = channel->type;
>>  	chan->channel = channel->channel;
>>  	chan->datasheet_name = channel->name;
>> @@ -883,7 +926,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
>>  	chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
>>  	chan->scan_type.sign = 'u';
>> -	chan->scan_type.realbits = 12;
>> +	chan->scan_type.realbits = stm32f4_adc_resolutions[adc->res];
>>  	chan->scan_type.storagebits = 16;
>>  	chan->ext_info = stm32_adc_ext_info;
>>  }
>> @@ -1022,6 +1065,11 @@ static int stm32_adc_probe(struct platform_device *pdev)
>>  		return ret;
>>  	}
>>  
>> +	ret = stm32_adc_of_get_resolution(indio_dev);
>> +	if (ret < 0)
>> +		goto err_clk_disable;
>> +	stm32_adc_set_res(adc);
>> +
>>  	ret = stm32_adc_chan_of_init(indio_dev);
>>  	if (ret < 0)
>>  		goto err_clk_disable;
>>
> 
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