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([2001:b07:6468:f312:5e2c:eb9a:a8b6:fd3e]) by smtp.googlemail.com with ESMTPSA id a7-20020a170906274700b008b2aba5fb22sm5896759ejd.206.2023.03.07.03.26.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Mar 2023 03:26:28 -0800 (PST) Message-ID: Date: Tue, 7 Mar 2023 12:26:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH] hw/acpi: Set memory regions to native endian as a work around To: BALATON Zoltan Cc: "Michael S. Tsirkin" , Igor Mammedov , qemu-devel References: <20211108130934.59B48748F52@zero.eik.bme.hu> <20220119041842-mutt-send-email-mst@kernel.org> <20220222094021-mutt-send-email-mst@kernel.org> <20230220172659-mutt-send-email-mst@kernel.org> <04f178bb-2407-232f-e843-386bf04b3024@eik.bme.hu> <4714e0f2-ccfb-1e9a-149e-aceefef62a9d@redhat.com> <48cdc7ae-8e7c-6b6d-76d1-96228ac597c2@eik.bme.hu> Content-Language: en-US From: Paolo Bonzini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/7/23 11:01, BALATON Zoltan wrote: >> >>> I'm not sure I follow what you mean so I'd need a patch to see then I >>> can >>> test it with the clients I run on pegasos2. >> >> Do you have a spec, or pointer to the morphos kernel sources, to >> figure out how the hardware works? > > No, that's closed source and only available as a demo iso but it's known > to work on real hardware and freely downloadable so is a good test. > (AFAIK those who developed MorphOS had close connection to those who > wrote the firmware for Pegasos II.) Maybe the VT8231 datasheet or > similar parts (we only emulate VT82C686B and VT8231 in QEMU) has some > info on this. I agree it's a good test, but it's not clear what it means to do sub-word writes to the register. For example, in the dump I posted you have: evt 3 1 write 1 // enable timer evt 0 2 read evt 0 2 write 1 // just writes again the same value, clearing sts It's important to note that the comments are just my guess. Before even looking at the effect of the write, the trace tells us that your patch is incomplete. With both current QEMU and your patch it would do nothing because addr is not 0 or 2; but since the firmware of your machine does use addr == 3, you need to handle it. In other words, before looking at this trace, I was wary of accepting your patch because it made no sense to me; but I couldn't exclude that I was missing something. Now, instead, I am certain it shouldn't be accepted. I am quite confident that the second guess is correct, because "write the same value that was read" only makes sense for evt_sts and not for evt_en. We learnt something: no matter what bus this device sits on, it does not flip bit 1 of the address for subword writes. As I mentioned yesterday, we also observe that the load and store use lhbrx and sthbrx. Assuming this is not a harmless bug in the firmware, this means the device is indeed little endian. This means that the first write is almost certainly to evt_en. On a little-endian machine the write would set bit 8 of evt.en (power button), but what about a big-endian machine like yours? Should it set bit 0 or bit 8? If it's bit 0 (which resides at offset 2 according to the device), who flips the low bit of the address? Why is bit 0 flipped but not bit 1? You simply cannot fix the emulation of this machine until you can answer the above questions. If there is no source and no spec, the two ways to do it are: - get a real machine, and figure out whether the write to offset 3 corresponds to the PM timer or the power button. - continue the trace up to the point the OS runs, and see if you get some clues similar to the one above that placed evt_sts at offset 2. Paolo