From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752902AbeAQMKv (ORCPT + 1 other); Wed, 17 Jan 2018 07:10:51 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:39566 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752662AbeAQMKu (ORCPT ); Wed, 17 Jan 2018 07:10:50 -0500 Subject: Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3 To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mark.rutland@arm.com, marc.zyngier@arm.com, james.morse@arm.com, daniel.thompson@linaro.org References: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> From: Julien Thierry Message-ID: Date: Wed, 17 Jan 2018 12:10:47 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Hi, On 17/01/18 11:54, Julien Thierry wrote: > This series is a continuation of the work started by Daniel [1]. The goal > is to use GICv3 interrupt priorities to simulate an NMI. > I have submitted a separate series making use of this feature for the ARM PMUv3 interrupt [1]. [1] https://www.spinics.net/lists/arm-kernel/msg629402.html Cheers, -- Julien Thierry From mboxrd@z Thu Jan 1 00:00:00 1970 From: julien.thierry@arm.com (Julien Thierry) Date: Wed, 17 Jan 2018 12:10:47 +0000 Subject: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3 In-Reply-To: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> References: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On 17/01/18 11:54, Julien Thierry wrote: > This series is a continuation of the work started by Daniel [1]. The goal > is to use GICv3 interrupt priorities to simulate an NMI. > I have submitted a separate series making use of this feature for the ARM PMUv3 interrupt [1]. [1] https://www.spinics.net/lists/arm-kernel/msg629402.html Cheers, -- Julien Thierry