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[94.29.62.108]) by smtp.googlemail.com with ESMTPSA id o19sm1528364ljp.58.2022.01.12.03.02.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jan 2022 03:02:12 -0800 (PST) Subject: Re: [Patch V1 3/4] memory: tegra: add mc-err support for T186 To: Ashish Mhetre , thierry.reding@gmail.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, krzysztof.kozlowski@canonical.com, linux-kernel@vger.kernel.org Cc: Snikam@nvidia.com, vdumpa@nvidia.com References: <1641926750-27544-1-git-send-email-amhetre@nvidia.com> <1641926750-27544-4-git-send-email-amhetre@nvidia.com> From: Dmitry Osipenko Message-ID: Date: Wed, 12 Jan 2022 14:02:11 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <1641926750-27544-4-git-send-email-amhetre@nvidia.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org 11.01.2022 21:45, Ashish Mhetre пишет: > +static const struct tegra_mc_error int_mc_errors[] = { > + { > + .int_bit = MC_INT_DECERR_EMEM, > + .msg = "EMEM address decode error", > + .status_reg = MC_ERR_STATUS, > + .addr_reg = MC_ERR_ADR, > + }, > + { > + .int_bit = MC_INT_SECURITY_VIOLATION, > + .msg = "non secure access to secure region", > + .status_reg = MC_ERR_STATUS, > + .addr_reg = MC_ERR_ADR, > + }, > + { > + .int_bit = MC_INT_DECERR_VPR, > + .msg = "MC request violates VPR requirements", > + .status_reg = MC_ERR_VPR_STATUS, > + .addr_reg = MC_ERR_VPR_ADR, > + }, > + { > + .int_bit = MC_INT_SECERR_SEC, > + .msg = "MC request violated SEC carveout requirements", > + .status_reg = MC_ERR_SEC_STATUS, > + .addr_reg = MC_ERR_SEC_ADR, > + }, > + { > + .int_bit = MC_INT_DECERR_MTS, > + .msg = "MTS carveout access violation", > + .status_reg = MC_ERR_MTS_STATUS, > + .addr_reg = MC_ERR_MTS_ADR, > + }, > + { > + .int_bit = MC_INT_DECERR_GENERALIZED_CARVEOUT, > + .msg = "GSC access violation", > + .status_reg = MC_ERR_GENERALIZED_CARVEOUT_STATUS, > + .addr_reg = MC_ERR_GENERALIZED_CARVEOUT_ADR, > + }, > +}; > + > +static irqreturn_t tegra186_mc_handle_irq(int irq, void *data) > +{ > + struct tegra_mc *mc = data; > + unsigned long status; > + unsigned int bit; > + > + status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask; > + if (!status) > + return IRQ_NONE; > + > + for_each_set_bit(bit, &status, 32) { > + const char *error = int_mc_errors[bit].msg ?: "unknown"; int_mc_errors[bit] isn't what you need and .int_bit is unused, which suggests that all this code doesn't work and was untested. Please don't send untested patches.