From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B72DBC47082 for ; Tue, 8 Jun 2021 07:06:12 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1B9106124B for ; Tue, 8 Jun 2021 07:06:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1B9106124B Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C99D282E8E; Tue, 8 Jun 2021 09:06:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="vAYNT4zw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4344882E80; Tue, 8 Jun 2021 09:06:02 +0200 (CEST) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4556482E7F for ; Tue, 8 Jun 2021 09:05:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=lokeshvutla@ti.com Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 15875uQE071149 for ; Tue, 8 Jun 2021 02:05:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1623135956; bh=WtKQhedENY8vJQwTXXSJHtgNyAuWtX/AM+Fuyt72Qzo=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=vAYNT4zwfVAdW6hMMjnJEthaBTH0dyldzFsArLEzzN3xEOPSipjQJQsO5nb7mr2UQ zRV+LuF11zp/HQRzR7xo99LZng0yKTAqMfZCga1J53jkoS1PjdnoeCp89UzGfDH6nI Z/dtELMWrLU+fOkU8I5E184pkGPcPm9gHZtIhFYs= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 15875uI5015873 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Tue, 8 Jun 2021 02:05:56 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 8 Jun 2021 02:05:56 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 8 Jun 2021 02:05:56 -0500 Received: from [10.24.69.20] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15875r8j097192; Tue, 8 Jun 2021 02:05:55 -0500 Subject: Re: [PATCH v2 0/7] J72xx: R5 SPL DMA support post HSM Rearch To: Vignesh Raghavendra CC: References: <20210607141753.28796-1-vigneshr@ti.com> From: Lokesh Vutla Message-ID: Date: Tue, 8 Jun 2021 12:35:52 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210607141753.28796-1-vigneshr@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean On 07/06/21 7:47 pm, Vignesh Raghavendra wrote: > This series add DMA support for R5 SPL on J721e/J7200 SoCs post HSM > Rearch. > > Depends on Tero's base HSM rearch support series. > > v2: > Use IS_ENABLED() consistentially instead of #ifdef > Reword commit msg for 5/7 as suggested by Lokesh > Rebase on Tero's latest HSM base series. I see the folloiwing build warnings with this series: arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (reg_format): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000:reg: property has invalid length (80 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000: Relying on default #address-cells value arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000: Relying on default #size-cells value arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/dma-controller@285c0000: Relying on default #address-cells value arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/dma-controller@285c0000: Relying on default #size-cells value arch/arm/dts/k3-j7200-r5-common-proc-board.dtb: Warning (reg_format): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000:reg: property has invalid length (80 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/dts/k3-j7200-r5-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000: Relying on default #address-cells value arch/arm/dts/k3-j7200-r5-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/ringacc@2b800000: Relying on default #size-cells value arch/arm/dts/k3-j7200-r5-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/dma-controller@285c0000: Relying on default #address-cells value arch/arm/dts/k3-j7200-r5-common-proc-board.dtb: Warning (avoid_default_addr_size): /bus@100000/bus@28380000/mcu-navss/dma-controller@285c0000: Relying on default #size-cells value Can you fix it or send me fix, Ill can squash? Thanks and regards, Lokesh > > > Vignesh Raghavendra (7): > mailbox: k3-sec-proxy: Add DM to DMSC communication thread > firmware: ti_sci: Implement GET_RANGE with static data > firmware: ti_sci: Add support for Resoure Management at R5 SPL stage. > ARM: dts: j72xx-r5-common-proc-board: Add DM firmware node > ARM: dts: k3: Add cfg register space for ringacc and udmap > soc: ti: k3-navss-ringacc: Add support for native configuration of > rings > dma: ti: k3-udma: Add support for native configuration of chan/flow > > arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 14 ++ > .../k3-j7200-common-proc-board-u-boot.dtsi | 26 +++ > .../arm/dts/k3-j7200-r5-common-proc-board.dts | 17 ++ > .../k3-j721e-common-proc-board-u-boot.dtsi | 14 ++ > .../arm/dts/k3-j721e-r5-common-proc-board.dts | 18 ++ > .../firmware/ti,j721e-dm-sci.txt | 32 ++++ > drivers/dma/ti/k3-udma-u-boot.c | 177 ++++++++++++++++++ > drivers/dma/ti/k3-udma.c | 42 ++++- > drivers/firmware/ti_sci.c | 107 +++++++++++ > drivers/firmware/ti_sci_static_data.h | 92 +++++++++ > drivers/mailbox/k3-sec-proxy.c | 2 +- > drivers/soc/ti/k3-navss-ringacc-u-boot.c | 61 ++++++ > drivers/soc/ti/k3-navss-ringacc.c | 36 +++- > 13 files changed, 630 insertions(+), 8 deletions(-) > create mode 100644 doc/device-tree-bindings/firmware/ti,j721e-dm-sci.txt > create mode 100644 drivers/dma/ti/k3-udma-u-boot.c > create mode 100644 drivers/firmware/ti_sci_static_data.h > create mode 100644 drivers/soc/ti/k3-navss-ringacc-u-boot.c >