From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from kirsty.vergenet.net ([202.4.237.240]:35788 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751942AbdLGJzk (ORCPT ); Thu, 7 Dec 2017 04:55:40 -0500 From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Sergei Shtylyov , Simon Horman Subject: [PATCH 53/54] arm64: dts: renesas: r8a77970: use CPG core clock macros Date: Thu, 7 Dec 2017 10:53:56 +0100 Message-Id: In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: From: Sergei Shtylyov Now that the commit ecadea00f588 ("dt-bindings: clock: Add R8A77970 CPG core clock definitions") has hit Linus' tree, we can replace the bare numbers (we had to use to avoid a cross tree dependency) with these macro definitions... Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 636b57a2edde..7bb224595c95 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -9,7 +9,7 @@ * kind, whether express or implied. */ -#include +#include #include #include #include @@ -32,7 +32,7 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0>; - clocks = <&cpg CPG_CORE 0>; + clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; power-domains = <&sysc 5>; next-level-cache = <&L2_CA53>; enable-method = "psci"; @@ -262,7 +262,7 @@ reg = <0 0xe6540000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>, @@ -280,7 +280,7 @@ reg = <0 0xe6550000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>, @@ -298,7 +298,7 @@ reg = <0 0xe6560000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>, @@ -315,7 +315,7 @@ reg = <0 0xe66a0000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x37>, <&dmac1 0x36>, @@ -333,7 +333,7 @@ reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>, @@ -351,7 +351,7 @@ reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>, @@ -369,7 +369,7 @@ reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x57>, <&dmac1 0x56>, @@ -386,7 +386,7 @@ reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x59>, <&dmac1 0x58>, -- 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: horms+renesas@verge.net.au (Simon Horman) Date: Thu, 7 Dec 2017 10:53:56 +0100 Subject: [PATCH 53/54] arm64: dts: renesas: r8a77970: use CPG core clock macros In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Sergei Shtylyov Now that the commit ecadea00f588 ("dt-bindings: clock: Add R8A77970 CPG core clock definitions") has hit Linus' tree, we can replace the bare numbers (we had to use to avoid a cross tree dependency) with these macro definitions... Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 636b57a2edde..7bb224595c95 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -9,7 +9,7 @@ * kind, whether express or implied. */ -#include +#include #include #include #include @@ -32,7 +32,7 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0>; - clocks = <&cpg CPG_CORE 0>; + clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; power-domains = <&sysc 5>; next-level-cache = <&L2_CA53>; enable-method = "psci"; @@ -262,7 +262,7 @@ reg = <0 0xe6540000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>, @@ -280,7 +280,7 @@ reg = <0 0xe6550000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>, @@ -298,7 +298,7 @@ reg = <0 0xe6560000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>, @@ -315,7 +315,7 @@ reg = <0 0xe66a0000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x37>, <&dmac1 0x36>, @@ -333,7 +333,7 @@ reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>, @@ -351,7 +351,7 @@ reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>, @@ -369,7 +369,7 @@ reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x57>, <&dmac1 0x56>, @@ -386,7 +386,7 @@ reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE 9>, + <&cpg CPG_CORE R8A77970_CLK_S2D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x59>, <&dmac1 0x58>, -- 2.11.0