From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B3BF133998; Thu, 21 Mar 2024 22:00:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711058408; cv=none; b=RNMu42gWBotNoudOr5+rEC8TyirXP6uZkeMSFJHMKP57VZ3Pm173Rx9+na7bUvBMcoLtancc+m6Z9d99LEnwrs1oI0JZXUl499DWkk5HQSZCw2AgkCPG/ODVw/dtb7Izu6VLBxTN7xIPy3JrYm3v4dfnDUhOU0WGqX+OXMQLl/w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711058408; c=relaxed/simple; bh=t2QmslawEats+EV93HQG0+kSPQ49sMzPwqUo61078Cg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=J9rqWtWJ1iP9efXgS5M/u7NpeyvAy4msQMQQcgbGzb9KtmXNd7Z9C9DLuyO8pvyraMORxt9XtBEMoVsQs2LT46MjrNJWDqQWW7idjiyeHGULbX/steEfDNB+ndL0ApHwi80Diejq8zjueRktO7JMpbqBmrlJJbMFEoMHddSkAlY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=52n0zck7; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="52n0zck7" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=TT+5vkWHgG4JG2zDFc0DxT6DP+1/xW6JuSns2VThGEI=; b=52n0zck7k+vUeE+nu8Ctrwc7Ne 5YWLCUzmuP0BHiG99a9vi2uVwJ4NWyg/aPKrEljnQ54IUg0ZJ/Lf9LhPlyEljuPv8pKm4JKCQ/L+O PtapZuCttFCEENUi8xBRZdV8MQYb1gPLG0kdlZWzdewh5F5tGaY3fNcCH/apvSUvFAaI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rnQS5-00AuVW-Eo; Thu, 21 Mar 2024 22:59:57 +0100 Date: Thu, 21 Mar 2024 22:59:57 +0100 From: Andrew Lunn To: Josua Mayer Cc: Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yazan Shhady , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: dts: add description for solidrun cn9130 som and clearfog boards Message-ID: References: <20240321-cn9130-som-v1-0-711127a409ae@solid-run.com> <20240321-cn9130-som-v1-2-711127a409ae@solid-run.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240321-cn9130-som-v1-2-711127a409ae@solid-run.com> On Thu, Mar 21, 2024 at 10:47:12PM +0100, Josua Mayer wrote: > Add description for the SolidRun CN9130 SoM, and Clearfog Base / Pro > reference boards. > > The SoM has been designed as a pin-compatible replacement for the older > Armada 388 based SoM. Therefore it supports the same boards and a > similar feature set. > > Most notable upgrades: > - 4x Cortex-A72 > - 10Gbps SFP > - Both eMMC and SD supported at the same time > > The developer first supporting this product at SolidRun decided to use > different filenames for the DTBs: Armada 388 uses the full > "clearfog" string while cn9130 uses the abbreviation "cf". > This name is already hard-coded in pre-installed vendor u-boot and can > not be changed easily. > > NOTICE IN CASE ANYBODY WANTS TO SELF-UPGRADE: > CN9130 SoM has a different footprint from Armada 388 SoM. > Components on the carrier board below the SoM may collide causing > damage, such as on Clearfog Base. > > Signed-off-by: Josua Mayer > --- > arch/arm64/boot/dts/marvell/Makefile | 2 + > arch/arm64/boot/dts/marvell/cn9130-cf-base.dts | 138 ++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-cf-pro.dts | 249 +++++++++++++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-cf.dtsi | 198 ++++++++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi | 160 ++++++++++++++++ > 5 files changed, 747 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile > index 99b8cb3c49e1..019f2251d696 100644 > --- a/arch/arm64/boot/dts/marvell/Makefile > +++ b/arch/arm64/boot/dts/marvell/Makefile > @@ -28,3 +28,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb > dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb > dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb > dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb > +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-base.dtb > +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-pro.dtb > diff --git a/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts b/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts > new file mode 100644 > index 000000000000..b0067940d5e4 > --- /dev/null > +++ b/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts > @@ -0,0 +1,138 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2024 Josua Mayer > + * > + * DTS for SolidRun CN9130 Clearfog Base. > + * > + */ > + > +/dts-v1/; > + > +#include > + > +#include "cn9130.dtsi" > +#include "cn9130-sr-som.dtsi" > +#include "cn9130-cf.dtsi" > + > +/ { > + model = "SolidRun CN9130 Clearfog Base"; > + compatible = "solidrun,clearfog-base-a1", "solidrun,clearfog-a1", > + "solidrun,cn9130-sr-som","marvell,cn9130", > + "marvell,armada-ap807-quad", "marvell,armada-ap807"; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-0 = <&rear_button_pins>; > + pinctrl-names = "default"; > + > + button-0 { > + /* The rear SW3 button */ > + label = "Rear Button"; > + gpios = <&cp0_gpio1 31 GPIO_ACTIVE_LOW>; > + linux,can-disable; > + linux,code = ; > + }; > + }; > + > + rfkill-m2-gnss { > + compatible = "rfkill-gpio"; > + label = "m.2 GNSS"; > + radio-type = "gps"; > + /* rfkill-gpio inverts internally */ > + shutdown-gpios = <&expander0 9 GPIO_ACTIVE_HIGH>; > + }; > + > + /* M.2 is B-keyed, so w-disable is for WWAN */ > + rfkill-m2-wwan { > + compatible = "rfkill-gpio"; > + label = "m.2 WWAN"; > + radio-type = "wwan"; > + /* rfkill-gpio inverts internally */ > + shutdown-gpios = <&expander0 8 GPIO_ACTIVE_HIGH>; > + }; > +}; > + > +/* SRDS #3 - SGMII 1GE */ > +&cp0_eth1 { > + phy = <&phy1>; > + phys = <&cp0_comphy3 1>; > + phy-mode = "sgmii"; > + status = "okay"; > +}; > + > +&cp0_eth2_phy { > + /* > + * Configure LEDs: > + * - LED[0]: link/activity: On/blink (green) > + * - LED[1]: link is 100/1000Mbps: On (yellow) > + * - LED[2]: high impedance (floating) > + */ > + marvell,reg-init = <3 16 0xf000 0x0a61>; Sorry, but no. List the LEDs in the PHY node, and they can then be controlled via /sys/class/leds. arch/arm/boot/dts/marvell/armada-370-rd.dts is an example. Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A88F9C6FD1F for ; Thu, 21 Mar 2024 22:00:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bJzgMb2Pt7nBVHOJHrWOnSKcG9H5iOZFcOtebH05n3U=; b=YTYAD/BdCvwNGX LCgdDyE+hsaFEI50xPR/ydh0c5NiOctkWUXzru+JgyDYCuTwqmx8GnETa9RempgKQyIparlSV0DzB l6EiFlN6r8nn9fnZQeGeSGB0JSnQLySxPbWkJs25N67d/QAb1amFv4gnQu9+THUF41JE5Gki4ioPC 0A6Mli1aqwC4clSEVZDI8bLQ6KpEBGw3OO/CKl1hl/b3zEuRFoIxuq4ZNV3z+ymG1h/F7wTycPsjI IvRem8Z972PTN1U1DbBx0QuIjmN+tDLNN5gmpFugaWt/sFmd28+Sjl/hnUVuMvDUOhdelHpproOtL qxz5FtttJtw3RPwScv4Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnQSE-00000004oRI-3y4C; Thu, 21 Mar 2024 22:00:07 +0000 Received: from vps0.lunn.ch ([156.67.10.101]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnQSC-00000004oQ3-2nLS for linux-arm-kernel@lists.infradead.org; Thu, 21 Mar 2024 22:00:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=TT+5vkWHgG4JG2zDFc0DxT6DP+1/xW6JuSns2VThGEI=; b=52n0zck7k+vUeE+nu8Ctrwc7Ne 5YWLCUzmuP0BHiG99a9vi2uVwJ4NWyg/aPKrEljnQ54IUg0ZJ/Lf9LhPlyEljuPv8pKm4JKCQ/L+O PtapZuCttFCEENUi8xBRZdV8MQYb1gPLG0kdlZWzdewh5F5tGaY3fNcCH/apvSUvFAaI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rnQS5-00AuVW-Eo; Thu, 21 Mar 2024 22:59:57 +0100 Date: Thu, 21 Mar 2024 22:59:57 +0100 From: Andrew Lunn To: Josua Mayer Cc: Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yazan Shhady , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: dts: add description for solidrun cn9130 som and clearfog boards Message-ID: References: <20240321-cn9130-som-v1-0-711127a409ae@solid-run.com> <20240321-cn9130-som-v1-2-711127a409ae@solid-run.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240321-cn9130-som-v1-2-711127a409ae@solid-run.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240321_150004_737304_6024917A X-CRM114-Status: GOOD ( 21.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 21, 2024 at 10:47:12PM +0100, Josua Mayer wrote: > Add description for the SolidRun CN9130 SoM, and Clearfog Base / Pro > reference boards. > > The SoM has been designed as a pin-compatible replacement for the older > Armada 388 based SoM. Therefore it supports the same boards and a > similar feature set. > > Most notable upgrades: > - 4x Cortex-A72 > - 10Gbps SFP > - Both eMMC and SD supported at the same time > > The developer first supporting this product at SolidRun decided to use > different filenames for the DTBs: Armada 388 uses the full > "clearfog" string while cn9130 uses the abbreviation "cf". > This name is already hard-coded in pre-installed vendor u-boot and can > not be changed easily. > > NOTICE IN CASE ANYBODY WANTS TO SELF-UPGRADE: > CN9130 SoM has a different footprint from Armada 388 SoM. > Components on the carrier board below the SoM may collide causing > damage, such as on Clearfog Base. > > Signed-off-by: Josua Mayer > --- > arch/arm64/boot/dts/marvell/Makefile | 2 + > arch/arm64/boot/dts/marvell/cn9130-cf-base.dts | 138 ++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-cf-pro.dts | 249 +++++++++++++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-cf.dtsi | 198 ++++++++++++++++++++ > arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi | 160 ++++++++++++++++ > 5 files changed, 747 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile > index 99b8cb3c49e1..019f2251d696 100644 > --- a/arch/arm64/boot/dts/marvell/Makefile > +++ b/arch/arm64/boot/dts/marvell/Makefile > @@ -28,3 +28,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb > dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb > dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb > dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb > +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-base.dtb > +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-pro.dtb > diff --git a/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts b/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts > new file mode 100644 > index 000000000000..b0067940d5e4 > --- /dev/null > +++ b/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts > @@ -0,0 +1,138 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2024 Josua Mayer > + * > + * DTS for SolidRun CN9130 Clearfog Base. > + * > + */ > + > +/dts-v1/; > + > +#include > + > +#include "cn9130.dtsi" > +#include "cn9130-sr-som.dtsi" > +#include "cn9130-cf.dtsi" > + > +/ { > + model = "SolidRun CN9130 Clearfog Base"; > + compatible = "solidrun,clearfog-base-a1", "solidrun,clearfog-a1", > + "solidrun,cn9130-sr-som","marvell,cn9130", > + "marvell,armada-ap807-quad", "marvell,armada-ap807"; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-0 = <&rear_button_pins>; > + pinctrl-names = "default"; > + > + button-0 { > + /* The rear SW3 button */ > + label = "Rear Button"; > + gpios = <&cp0_gpio1 31 GPIO_ACTIVE_LOW>; > + linux,can-disable; > + linux,code = ; > + }; > + }; > + > + rfkill-m2-gnss { > + compatible = "rfkill-gpio"; > + label = "m.2 GNSS"; > + radio-type = "gps"; > + /* rfkill-gpio inverts internally */ > + shutdown-gpios = <&expander0 9 GPIO_ACTIVE_HIGH>; > + }; > + > + /* M.2 is B-keyed, so w-disable is for WWAN */ > + rfkill-m2-wwan { > + compatible = "rfkill-gpio"; > + label = "m.2 WWAN"; > + radio-type = "wwan"; > + /* rfkill-gpio inverts internally */ > + shutdown-gpios = <&expander0 8 GPIO_ACTIVE_HIGH>; > + }; > +}; > + > +/* SRDS #3 - SGMII 1GE */ > +&cp0_eth1 { > + phy = <&phy1>; > + phys = <&cp0_comphy3 1>; > + phy-mode = "sgmii"; > + status = "okay"; > +}; > + > +&cp0_eth2_phy { > + /* > + * Configure LEDs: > + * - LED[0]: link/activity: On/blink (green) > + * - LED[1]: link is 100/1000Mbps: On (yellow) > + * - LED[2]: high impedance (floating) > + */ > + marvell,reg-init = <3 16 0xf000 0x0a61>; Sorry, but no. List the LEDs in the PHY node, and they can then be controlled via /sys/class/leds. arch/arm/boot/dts/marvell/armada-370-rd.dts is an example. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel