From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FD31C433E0 for ; Tue, 4 Aug 2020 15:01:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7F43D208A9 for ; Tue, 4 Aug 2020 15:01:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="BL+ho6hQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729484AbgHDPAw (ORCPT ); Tue, 4 Aug 2020 11:00:52 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:28674 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729474AbgHDO7v (ORCPT ); Tue, 4 Aug 2020 10:59:51 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 074E2eTv012615; Tue, 4 Aug 2020 16:04:32 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=STMicroelectronics; bh=LAG1/atoWlfWmJtGbllySuRLl1a6COVGHRrcpAnsvT4=; b=BL+ho6hQTKnVi4msGN1TyWPhmU0E8Hj9r5AGDUn2IOe5hA503883/UoUUorsbPZ4nhFn ubDAZjO88ZpbAm+LE70U0Tt+cpBZnwN6bPm8l7Ly52qQ+3XhREzZo5ggMa/ON0tG2pJQ whkK+nUSAFJGD1WL0RiZcgOMfP/qEjxiy1hkkAA1GtUE2nOwiqhW2ftBu6y5ORfy+o/R dfLYwysyN/pvERl3HHTlD4v4MjIpvClAl4SWn2m7EDG+Ibd4t+4Ms7bwIe5p6ERQH8dw 5o3BVFyX8GSPwtY/5ONatOo5nMkgEWz2Jq63AqCV9X+tWwQWueKyvmZMJkPb3OgWdnQv vg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 32n6sb3dp9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Aug 2020 16:04:32 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D0C7B10002A; Tue, 4 Aug 2020 16:04:29 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C40952BC7A0; Tue, 4 Aug 2020 16:04:29 +0200 (CEST) Received: from lmecxl1060.lme.st.com (10.75.127.45) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 4 Aug 2020 16:04:28 +0200 Subject: Re: [PATCH v3 2/2] i2c: stm32f7: Add SMBus Host-Notify protocol support To: Alain Volmat , CC: , , , , , References: <1596431876-24115-1-git-send-email-alain.volmat@st.com> <1596431876-24115-3-git-send-email-alain.volmat@st.com> From: Pierre Yves MORDRET Message-ID: Date: Tue, 4 Aug 2020 16:04:28 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1596431876-24115-3-git-send-email-alain.volmat@st.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-08-04_04:2020-08-03,2020-08-04 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alain Look good for me Reviewed-by: Pierre-Yves MORDRET Best Regards On 8/3/20 7:17 AM, Alain Volmat wrote: > Rely on the core functions to implement the host-notify > protocol via the a I2C slave device. > > Signed-off-by: Alain Volmat > --- > v3: identical to v2 > v2: fix slot #0 usage condition within stm32f7_i2c_get_free_slave_id > > drivers/i2c/busses/Kconfig | 1 + > drivers/i2c/busses/i2c-stm32f7.c | 110 +++++++++++++++++++++++++++++++++------ > 2 files changed, 96 insertions(+), 15 deletions(-) > > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig > index 735bf31a3fdf..ae8671727a4c 100644 > --- a/drivers/i2c/busses/Kconfig > +++ b/drivers/i2c/busses/Kconfig > @@ -1036,6 +1036,7 @@ config I2C_STM32F7 > tristate "STMicroelectronics STM32F7 I2C support" > depends on ARCH_STM32 || COMPILE_TEST > select I2C_SLAVE > + select I2C_SMBUS > help > Enable this option to add support for STM32 I2C controller embedded > in STM32F7 SoCs. > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index bff3479fe122..223c238c3c09 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -50,6 +51,7 @@ > > /* STM32F7 I2C control 1 */ > #define STM32F7_I2C_CR1_PECEN BIT(23) > +#define STM32F7_I2C_CR1_SMBHEN BIT(20) > #define STM32F7_I2C_CR1_WUPEN BIT(18) > #define STM32F7_I2C_CR1_SBC BIT(16) > #define STM32F7_I2C_CR1_RXDMAEN BIT(15) > @@ -150,7 +152,7 @@ > > #define STM32F7_I2C_MAX_LEN 0xff > #define STM32F7_I2C_DMA_LEN_MIN 0x16 > -#define STM32F7_I2C_MAX_SLAVE 0x2 > +#define STM32F7_I2C_MAX_SLAVE 0x3 > > #define STM32F7_I2C_DNF_DEFAULT 0 > #define STM32F7_I2C_DNF_MAX 16 > @@ -301,6 +303,8 @@ struct stm32f7_i2c_msg { > * @fmp_creg: register address for clearing Fast Mode Plus bits > * @fmp_mask: mask for Fast Mode Plus bits in set register > * @wakeup_src: boolean to know if the device is a wakeup source > + * @smbus_mode: states that the controller is configured in SMBus mode > + * @host_notify_client: SMBus host-notify client > */ > struct stm32f7_i2c_dev { > struct i2c_adapter adap; > @@ -327,6 +331,8 @@ struct stm32f7_i2c_dev { > u32 fmp_creg; > u32 fmp_mask; > bool wakeup_src; > + bool smbus_mode; > + struct i2c_client *host_notify_client; > }; > > /* > @@ -1321,10 +1327,18 @@ static int stm32f7_i2c_get_free_slave_id(struct stm32f7_i2c_dev *i2c_dev, > int i; > > /* > - * slave[0] supports 7-bit and 10-bit slave address > - * slave[1] supports 7-bit slave address only > + * slave[0] support only SMBus Host address (0x8) > + * slave[1] supports 7-bit and 10-bit slave address > + * slave[2] supports 7-bit slave address only > */ > - for (i = STM32F7_I2C_MAX_SLAVE - 1; i >= 0; i--) { > + if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { > + if (i2c_dev->slave[0]) > + goto fail; > + *id = 0; > + return 0; > + } > + > + for (i = STM32F7_I2C_MAX_SLAVE - 1; i > 0; i--) { > if (i == 1 && (slave->flags & I2C_CLIENT_TEN)) > continue; > if (!i2c_dev->slave[i]) { > @@ -1333,6 +1347,7 @@ static int stm32f7_i2c_get_free_slave_id(struct stm32f7_i2c_dev *i2c_dev, > } > } > > +fail: > dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); > > return -EINVAL; > @@ -1776,7 +1791,13 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > if (!stm32f7_i2c_is_slave_registered(i2c_dev)) > stm32f7_i2c_enable_wakeup(i2c_dev, true); > > - if (id == 0) { > + switch (id) { > + case 0: > + /* Slave SMBus Host */ > + i2c_dev->slave[id] = slave; > + break; > + > + case 1: > /* Configure Own Address 1 */ > oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); > oar1 &= ~STM32F7_I2C_OAR1_MASK; > @@ -1789,7 +1810,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > oar1 |= STM32F7_I2C_OAR1_OA1EN; > i2c_dev->slave[id] = slave; > writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); > - } else if (id == 1) { > + break; > + > + case 2: > /* Configure Own Address 2 */ > oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); > oar2 &= ~STM32F7_I2C_OAR2_MASK; > @@ -1802,7 +1825,10 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > oar2 |= STM32F7_I2C_OAR2_OA2EN; > i2c_dev->slave[id] = slave; > writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); > - } else { > + break; > + > + default: > + dev_err(dev, "I2C slave id not supported\n"); > ret = -ENODEV; > goto pm_free; > } > @@ -1843,10 +1869,10 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave) > if (ret < 0) > return ret; > > - if (id == 0) { > + if (id == 1) { > mask = STM32F7_I2C_OAR1_OA1EN; > stm32f7_i2c_clr_bits(base + STM32F7_I2C_OAR1, mask); > - } else { > + } else if (id == 2) { > mask = STM32F7_I2C_OAR2_OA2EN; > stm32f7_i2c_clr_bits(base + STM32F7_I2C_OAR2, mask); > } > @@ -1911,14 +1937,51 @@ static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > &i2c_dev->fmp_mask); > } > > +static int stm32f7_i2c_enable_smbus_host(struct stm32f7_i2c_dev *i2c_dev) > +{ > + struct i2c_adapter *adap = &i2c_dev->adap; > + void __iomem *base = i2c_dev->base; > + struct i2c_client *client; > + > + client = i2c_new_slave_host_notify_device(adap); > + if (IS_ERR(client)) > + return PTR_ERR(client); > + > + i2c_dev->host_notify_client = client; > + > + /* Enable SMBus Host address */ > + stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, STM32F7_I2C_CR1_SMBHEN); > + > + return 0; > +} > + > +static void stm32f7_i2c_disable_smbus_host(struct stm32f7_i2c_dev *i2c_dev) > +{ > + void __iomem *base = i2c_dev->base; > + > + if (i2c_dev->host_notify_client) { > + /* Disable SMBus Host address */ > + stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1, > + STM32F7_I2C_CR1_SMBHEN); > + i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); > + } > +} > + > static u32 stm32f7_i2c_func(struct i2c_adapter *adap) > { > - return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SLAVE | > - I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | > - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | > - I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | > - I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC | > - I2C_FUNC_SMBUS_I2C_BLOCK; > + struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap); > + > + u32 func = I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SLAVE | > + I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | > + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | > + I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | > + I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC | > + I2C_FUNC_SMBUS_I2C_BLOCK; > + > + if (i2c_dev->smbus_mode) > + func |= I2C_FUNC_SMBUS_HOST_NOTIFY; > + > + return func; > } > > static const struct i2c_algorithm stm32f7_i2c_algo = { > @@ -2084,10 +2147,22 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > > stm32f7_i2c_hw_config(i2c_dev); > > + i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); > + > ret = i2c_add_adapter(adap); > if (ret) > goto pm_disable; > > + if (i2c_dev->smbus_mode) { > + ret = stm32f7_i2c_enable_smbus_host(i2c_dev); > + if (ret) { > + dev_err(i2c_dev->dev, > + "failed to enable SMBus Host-Notify protocol (%d)\n", > + ret); > + goto i2c_adapter_remove; > + } > + } > + > dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); > > pm_runtime_mark_last_busy(i2c_dev->dev); > @@ -2095,6 +2170,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > > return 0; > > +i2c_adapter_remove: > + i2c_del_adapter(adap); > + > pm_disable: > pm_runtime_put_noidle(i2c_dev->dev); > pm_runtime_disable(i2c_dev->dev); > @@ -2126,6 +2204,8 @@ static int stm32f7_i2c_remove(struct platform_device *pdev) > { > struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev); > > + stm32f7_i2c_disable_smbus_host(i2c_dev); > + > i2c_del_adapter(&i2c_dev->adap); > pm_runtime_get_sync(i2c_dev->dev); > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23683C433DF for ; Tue, 4 Aug 2020 14:06:03 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE4292075F for ; Tue, 4 Aug 2020 14:06:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="NwtPNSb9"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=st.com header.i=@st.com header.b="BL+ho6hQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE4292075F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nWDOAR1zl6JIyD6vZpCTdL1FLSeoZd1twnHxmBJ+YkY=; b=NwtPNSb93CDZJD1qzVQafFw0w Wl+oROkXqtHnIF8TYsDbL08Cf7is7cBoBzMEu+aWX1R9y9QrzUNeZHVikXWOFPXGNL4WsXTtaTBm8 mIWVoJbTjUFUDxpPMlHQioHfsFLVKH2liQTeG7LqK8hAbpMWfurPMFIT5KFUacduRkcnENo0RCB9y yOMZeOTNDuKxFtOc6zyJTIpAU+A5YV11b2p7nvDFCc/dZ09bTPH6YbZdiSsqG3l82ri/0Fyxb/j4l 2fTrqGl6t4Db9/EHZ2PdoU/ElnD+Alqo0q1npWac9JqVFazTVepZIk8uskCyjvH7FD53r/eOQB98y x1YIsQlow==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k2xYU-0001Yc-H7; Tue, 04 Aug 2020 14:04:38 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k2xYR-0001Xf-3E for linux-arm-kernel@lists.infradead.org; Tue, 04 Aug 2020 14:04:36 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 074E2eTv012615; Tue, 4 Aug 2020 16:04:32 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=STMicroelectronics; bh=LAG1/atoWlfWmJtGbllySuRLl1a6COVGHRrcpAnsvT4=; b=BL+ho6hQTKnVi4msGN1TyWPhmU0E8Hj9r5AGDUn2IOe5hA503883/UoUUorsbPZ4nhFn ubDAZjO88ZpbAm+LE70U0Tt+cpBZnwN6bPm8l7Ly52qQ+3XhREzZo5ggMa/ON0tG2pJQ whkK+nUSAFJGD1WL0RiZcgOMfP/qEjxiy1hkkAA1GtUE2nOwiqhW2ftBu6y5ORfy+o/R dfLYwysyN/pvERl3HHTlD4v4MjIpvClAl4SWn2m7EDG+Ibd4t+4Ms7bwIe5p6ERQH8dw 5o3BVFyX8GSPwtY/5ONatOo5nMkgEWz2Jq63AqCV9X+tWwQWueKyvmZMJkPb3OgWdnQv vg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 32n6sb3dp9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Aug 2020 16:04:32 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D0C7B10002A; Tue, 4 Aug 2020 16:04:29 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C40952BC7A0; Tue, 4 Aug 2020 16:04:29 +0200 (CEST) Received: from lmecxl1060.lme.st.com (10.75.127.45) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 4 Aug 2020 16:04:28 +0200 Subject: Re: [PATCH v3 2/2] i2c: stm32f7: Add SMBus Host-Notify protocol support To: Alain Volmat , References: <1596431876-24115-1-git-send-email-alain.volmat@st.com> <1596431876-24115-3-git-send-email-alain.volmat@st.com> From: Pierre Yves MORDRET Message-ID: Date: Tue, 4 Aug 2020 16:04:28 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1596431876-24115-3-git-send-email-alain.volmat@st.com> Content-Language: en-US X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-08-04_04:2020-08-03, 2020-08-04 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200804_100435_366194_03C63D7D X-CRM114-Status: GOOD ( 34.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.torgue@st.com, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, fabrice.gasnier@st.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Alain Look good for me Reviewed-by: Pierre-Yves MORDRET Best Regards On 8/3/20 7:17 AM, Alain Volmat wrote: > Rely on the core functions to implement the host-notify > protocol via the a I2C slave device. > > Signed-off-by: Alain Volmat > --- > v3: identical to v2 > v2: fix slot #0 usage condition within stm32f7_i2c_get_free_slave_id > > drivers/i2c/busses/Kconfig | 1 + > drivers/i2c/busses/i2c-stm32f7.c | 110 +++++++++++++++++++++++++++++++++------ > 2 files changed, 96 insertions(+), 15 deletions(-) > > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig > index 735bf31a3fdf..ae8671727a4c 100644 > --- a/drivers/i2c/busses/Kconfig > +++ b/drivers/i2c/busses/Kconfig > @@ -1036,6 +1036,7 @@ config I2C_STM32F7 > tristate "STMicroelectronics STM32F7 I2C support" > depends on ARCH_STM32 || COMPILE_TEST > select I2C_SLAVE > + select I2C_SMBUS > help > Enable this option to add support for STM32 I2C controller embedded > in STM32F7 SoCs. > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index bff3479fe122..223c238c3c09 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -50,6 +51,7 @@ > > /* STM32F7 I2C control 1 */ > #define STM32F7_I2C_CR1_PECEN BIT(23) > +#define STM32F7_I2C_CR1_SMBHEN BIT(20) > #define STM32F7_I2C_CR1_WUPEN BIT(18) > #define STM32F7_I2C_CR1_SBC BIT(16) > #define STM32F7_I2C_CR1_RXDMAEN BIT(15) > @@ -150,7 +152,7 @@ > > #define STM32F7_I2C_MAX_LEN 0xff > #define STM32F7_I2C_DMA_LEN_MIN 0x16 > -#define STM32F7_I2C_MAX_SLAVE 0x2 > +#define STM32F7_I2C_MAX_SLAVE 0x3 > > #define STM32F7_I2C_DNF_DEFAULT 0 > #define STM32F7_I2C_DNF_MAX 16 > @@ -301,6 +303,8 @@ struct stm32f7_i2c_msg { > * @fmp_creg: register address for clearing Fast Mode Plus bits > * @fmp_mask: mask for Fast Mode Plus bits in set register > * @wakeup_src: boolean to know if the device is a wakeup source > + * @smbus_mode: states that the controller is configured in SMBus mode > + * @host_notify_client: SMBus host-notify client > */ > struct stm32f7_i2c_dev { > struct i2c_adapter adap; > @@ -327,6 +331,8 @@ struct stm32f7_i2c_dev { > u32 fmp_creg; > u32 fmp_mask; > bool wakeup_src; > + bool smbus_mode; > + struct i2c_client *host_notify_client; > }; > > /* > @@ -1321,10 +1327,18 @@ static int stm32f7_i2c_get_free_slave_id(struct stm32f7_i2c_dev *i2c_dev, > int i; > > /* > - * slave[0] supports 7-bit and 10-bit slave address > - * slave[1] supports 7-bit slave address only > + * slave[0] support only SMBus Host address (0x8) > + * slave[1] supports 7-bit and 10-bit slave address > + * slave[2] supports 7-bit slave address only > */ > - for (i = STM32F7_I2C_MAX_SLAVE - 1; i >= 0; i--) { > + if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { > + if (i2c_dev->slave[0]) > + goto fail; > + *id = 0; > + return 0; > + } > + > + for (i = STM32F7_I2C_MAX_SLAVE - 1; i > 0; i--) { > if (i == 1 && (slave->flags & I2C_CLIENT_TEN)) > continue; > if (!i2c_dev->slave[i]) { > @@ -1333,6 +1347,7 @@ static int stm32f7_i2c_get_free_slave_id(struct stm32f7_i2c_dev *i2c_dev, > } > } > > +fail: > dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); > > return -EINVAL; > @@ -1776,7 +1791,13 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > if (!stm32f7_i2c_is_slave_registered(i2c_dev)) > stm32f7_i2c_enable_wakeup(i2c_dev, true); > > - if (id == 0) { > + switch (id) { > + case 0: > + /* Slave SMBus Host */ > + i2c_dev->slave[id] = slave; > + break; > + > + case 1: > /* Configure Own Address 1 */ > oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); > oar1 &= ~STM32F7_I2C_OAR1_MASK; > @@ -1789,7 +1810,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > oar1 |= STM32F7_I2C_OAR1_OA1EN; > i2c_dev->slave[id] = slave; > writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); > - } else if (id == 1) { > + break; > + > + case 2: > /* Configure Own Address 2 */ > oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); > oar2 &= ~STM32F7_I2C_OAR2_MASK; > @@ -1802,7 +1825,10 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) > oar2 |= STM32F7_I2C_OAR2_OA2EN; > i2c_dev->slave[id] = slave; > writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); > - } else { > + break; > + > + default: > + dev_err(dev, "I2C slave id not supported\n"); > ret = -ENODEV; > goto pm_free; > } > @@ -1843,10 +1869,10 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave) > if (ret < 0) > return ret; > > - if (id == 0) { > + if (id == 1) { > mask = STM32F7_I2C_OAR1_OA1EN; > stm32f7_i2c_clr_bits(base + STM32F7_I2C_OAR1, mask); > - } else { > + } else if (id == 2) { > mask = STM32F7_I2C_OAR2_OA2EN; > stm32f7_i2c_clr_bits(base + STM32F7_I2C_OAR2, mask); > } > @@ -1911,14 +1937,51 @@ static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > &i2c_dev->fmp_mask); > } > > +static int stm32f7_i2c_enable_smbus_host(struct stm32f7_i2c_dev *i2c_dev) > +{ > + struct i2c_adapter *adap = &i2c_dev->adap; > + void __iomem *base = i2c_dev->base; > + struct i2c_client *client; > + > + client = i2c_new_slave_host_notify_device(adap); > + if (IS_ERR(client)) > + return PTR_ERR(client); > + > + i2c_dev->host_notify_client = client; > + > + /* Enable SMBus Host address */ > + stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, STM32F7_I2C_CR1_SMBHEN); > + > + return 0; > +} > + > +static void stm32f7_i2c_disable_smbus_host(struct stm32f7_i2c_dev *i2c_dev) > +{ > + void __iomem *base = i2c_dev->base; > + > + if (i2c_dev->host_notify_client) { > + /* Disable SMBus Host address */ > + stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1, > + STM32F7_I2C_CR1_SMBHEN); > + i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); > + } > +} > + > static u32 stm32f7_i2c_func(struct i2c_adapter *adap) > { > - return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SLAVE | > - I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | > - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | > - I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | > - I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC | > - I2C_FUNC_SMBUS_I2C_BLOCK; > + struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap); > + > + u32 func = I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SLAVE | > + I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | > + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | > + I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | > + I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC | > + I2C_FUNC_SMBUS_I2C_BLOCK; > + > + if (i2c_dev->smbus_mode) > + func |= I2C_FUNC_SMBUS_HOST_NOTIFY; > + > + return func; > } > > static const struct i2c_algorithm stm32f7_i2c_algo = { > @@ -2084,10 +2147,22 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > > stm32f7_i2c_hw_config(i2c_dev); > > + i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); > + > ret = i2c_add_adapter(adap); > if (ret) > goto pm_disable; > > + if (i2c_dev->smbus_mode) { > + ret = stm32f7_i2c_enable_smbus_host(i2c_dev); > + if (ret) { > + dev_err(i2c_dev->dev, > + "failed to enable SMBus Host-Notify protocol (%d)\n", > + ret); > + goto i2c_adapter_remove; > + } > + } > + > dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); > > pm_runtime_mark_last_busy(i2c_dev->dev); > @@ -2095,6 +2170,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > > return 0; > > +i2c_adapter_remove: > + i2c_del_adapter(adap); > + > pm_disable: > pm_runtime_put_noidle(i2c_dev->dev); > pm_runtime_disable(i2c_dev->dev); > @@ -2126,6 +2204,8 @@ static int stm32f7_i2c_remove(struct platform_device *pdev) > { > struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev); > > + stm32f7_i2c_disable_smbus_host(i2c_dev); > + > i2c_del_adapter(&i2c_dev->adap); > pm_runtime_get_sync(i2c_dev->dev); > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel