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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Pu Wen <puwen@hygon.cn>, Davidwang <Davidwang@zhaoxin.com>,
	Xen-devel <xen-devel@lists.xen.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH 3/5] x86/cpu: Renumber X86_VENDOR_* to form a bitmap
Date: Fri, 5 Apr 2019 10:28:18 +0100	[thread overview]
Message-ID: <e3276586-341e-ae37-8548-c444a45db01a@citrix.com> (raw)
In-Reply-To: <5CA719FE0200007800224CEB@prv1-mh.provo.novell.com>

On 05/04/2019 10:03, Jan Beulich wrote:
>>>> On 04.04.19 at 22:26, <andrew.cooper3@citrix.com> wrote:
>> --- a/xen/include/asm-x86/x86-vendors.h
>> +++ b/xen/include/asm-x86/x86-vendors.h
>> @@ -4,28 +4,29 @@
>>  /*
>>   * CPU vendor IDs
>>   *
>> - * - X86_VENDOR_* are Xen-internal identifiers.  Values and order are
>> - *   arbitrary.
>> + * - X86_VENDOR_* are Xen-internal identifiers.  The order is arbitrary, but
>> + *   values form a bitmap so vendor checks can be made against multiple
>> + *   vendors at once.
>>   * - X86_VENDOR_*_E?X are architectural information from CPUID leaf 0
>>   */
>>  #define X86_VENDOR_UNKNOWN 0
>>  
>> -#define X86_VENDOR_INTEL 1
>> +#define X86_VENDOR_INTEL (1 << 1)
> Any reason you start from a shift count of 1, instead of 0, when
> "unknown" simply is no bit set? We're not about to run out of bits,
> but preferably with this corrected
> Reviewed-by: Jan Beulich <jbeulich@suse.com>

No - that wasn't intentional.  Will fix.

~Andrew

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  reply	other threads:[~2019-04-05  9:28 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 20:26 [PATCH 0/5] x86/cpu: Rework of X86_VENDOR_* constants Andrew Cooper
2019-04-04 20:26 ` [PATCH 1/5] x86/cpu: Drop cpu_devs[] and $VENDOR_init_cpu() hooks Andrew Cooper
2019-04-05  8:57   ` Jan Beulich
2019-04-05  9:27     ` Andrew Cooper
2019-04-04 20:26 ` [PATCH 2/5] x86/cpu: Introduce x86_cpuid_vendor_to_str() and drop cpu_dev.c_vendor[] Andrew Cooper
2019-04-05  8:59   ` Jan Beulich
2019-04-04 20:26 ` [PATCH 3/5] x86/cpu: Renumber X86_VENDOR_* to form a bitmap Andrew Cooper
2019-04-05  9:03   ` Jan Beulich
2019-04-05  9:28     ` Andrew Cooper [this message]
2019-04-04 20:26 ` [PATCH 4/5] x86/cpu: Create Hygon Dhyana architecture support file Andrew Cooper
2019-04-05  9:17   ` Jan Beulich
2019-04-05 15:30     ` Pu Wen
2019-04-05 16:10       ` Jan Beulich
2019-04-04 20:26 ` [PATCH 5/5] x86/msr: Fix handling of MSR_AMD_PATCHLEVEL/MSR_IA32_UCODE_REV Andrew Cooper
2019-04-05  9:20   ` Jan Beulich

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