From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com> To: Aleksandar Markovic <amarkovic@wavecomp.com>, Aleksandar Markovic <aleksandar.m.mail@gmail.com> Cc: "QEMU Developers" <qemu-devel@nongnu.org>, "Aleksandar Rikalo" <arikalo@wavecomp.com>, "Richard Henderson" <richard.henderson@linaro.org>, "Philippe Mathieu-Daudé" <philmd@redhat.com>, "Aurelien Jarno" <aurelien@aurel32.net> Subject: Re: [Qemu-devel] [PATCH v6 4/4] target/mips: Optimize ILVR.<B|H|W|D> MSA instructions Date: Wed, 17 Apr 2019 10:16:59 +0200 [thread overview] Message-ID: <e6bd1e28-d0a1-9e86-d249-37ab16bb8de8@rt-rk.com> (raw) In-Reply-To: <BN6PR2201MB1251458C6A26DEE093C282EEC6240@BN6PR2201MB1251.namprd22.prod.outlook.com> On 16.4.19. 23:20, Aleksandar Markovic wrote: >> From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com> >>>> +void helper_msa_ilvr_b(CPUMIPSState *env, uint32_t wd, >>>> + uint32_t ws, uint32_t wt) >>>> +{ >>>> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr); >>>> + wr_t *pws = &(env->active_fpu.fpr[ws].wr); >>>> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr); >>>> + >>> Why do we use here env->active_fpu.fpr[wd].wr, while for other instructions in >>> this patch, we access msa_wr_d<b|h|w|d[] directly? >> With a pointer to wr_t we have an array of bytes, halfwords, words or >> doublewords >> and can read from them and change them like an ordinary array. In other >> cases >> we use a variable that is TCGv_i64 and would have to use tcg_gen >> functions to >> modify the value of the register. Before my changes in ilvr instruction >> helpers >> env->active_fpu.fpr[wd].wr was used, so I just copy-pasted that. >> > Your answer touches just surface, and doesn't fully answer my question. > I would like you to show deeper understanding of the code you are working > with. You can't just copy/paste without thinking. > > Why do majority of MSA helpers use env->active_fpu.fpr[<index>].wr, while > your code mostly reference the MSA register directly? Is this the same > thing? If yes, why all MSA code doesn't use registers directly, which > would certainly be simpler than referencing active_fpu? What is the role > of "active_fpu"? Can it be changed? Can you analyze the underlying > reasons for referencing "active_fpu", and can you claim that it is safe > to circumvent it and reference the MSA registers directly? I will look into that, and try to analyze it and understand it. Thanks, Mateja > Thanks, > Aleksandar
WARNING: multiple messages have this Message-ID (diff)
From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com> To: Aleksandar Markovic <amarkovic@wavecomp.com>, Aleksandar Markovic <aleksandar.m.mail@gmail.com> Cc: "Aleksandar Rikalo" <arikalo@wavecomp.com>, "Philippe Mathieu-Daudé" <philmd@redhat.com>, "Richard Henderson" <richard.henderson@linaro.org>, "QEMU Developers" <qemu-devel@nongnu.org>, "Aurelien Jarno" <aurelien@aurel32.net> Subject: Re: [Qemu-devel] [PATCH v6 4/4] target/mips: Optimize ILVR.<B|H|W|D> MSA instructions Date: Wed, 17 Apr 2019 10:16:59 +0200 [thread overview] Message-ID: <e6bd1e28-d0a1-9e86-d249-37ab16bb8de8@rt-rk.com> (raw) Message-ID: <20190417081659.OURALf9yfKOnW28kLpU-_QoOoNi4VaHaY6DB8Gf7ZOM@z> (raw) In-Reply-To: <BN6PR2201MB1251458C6A26DEE093C282EEC6240@BN6PR2201MB1251.namprd22.prod.outlook.com> On 16.4.19. 23:20, Aleksandar Markovic wrote: >> From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com> >>>> +void helper_msa_ilvr_b(CPUMIPSState *env, uint32_t wd, >>>> + uint32_t ws, uint32_t wt) >>>> +{ >>>> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr); >>>> + wr_t *pws = &(env->active_fpu.fpr[ws].wr); >>>> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr); >>>> + >>> Why do we use here env->active_fpu.fpr[wd].wr, while for other instructions in >>> this patch, we access msa_wr_d<b|h|w|d[] directly? >> With a pointer to wr_t we have an array of bytes, halfwords, words or >> doublewords >> and can read from them and change them like an ordinary array. In other >> cases >> we use a variable that is TCGv_i64 and would have to use tcg_gen >> functions to >> modify the value of the register. Before my changes in ilvr instruction >> helpers >> env->active_fpu.fpr[wd].wr was used, so I just copy-pasted that. >> > Your answer touches just surface, and doesn't fully answer my question. > I would like you to show deeper understanding of the code you are working > with. You can't just copy/paste without thinking. > > Why do majority of MSA helpers use env->active_fpu.fpr[<index>].wr, while > your code mostly reference the MSA register directly? Is this the same > thing? If yes, why all MSA code doesn't use registers directly, which > would certainly be simpler than referencing active_fpu? What is the role > of "active_fpu"? Can it be changed? Can you analyze the underlying > reasons for referencing "active_fpu", and can you claim that it is safe > to circumvent it and reference the MSA registers directly? I will look into that, and try to analyze it and understand it. Thanks, Mateja > Thanks, > Aleksandar
next prev parent reply other threads:[~2019-04-17 8:19 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-04-04 13:14 [Qemu-devel] [PATCH v6 0/4] target/mips: Optimize MSA interleave instructions Mateja Marjanovic 2019-04-04 13:14 ` [Qemu-devel] [PATCH v6 1/4] target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions Mateja Marjanovic 2019-04-04 13:47 ` Philippe Mathieu-Daudé 2019-04-13 16:09 ` Aleksandar Markovic 2019-04-13 16:09 ` Aleksandar Markovic 2019-04-04 13:14 ` [Qemu-devel] [PATCH v6 2/4] target/mips: Optimize ILVEV.<B|H|W|D> " Mateja Marjanovic 2019-04-04 13:42 ` Philippe Mathieu-Daudé 2019-04-04 18:19 ` Aleksandar Markovic 2019-04-04 19:17 ` Philippe Mathieu-Daudé 2019-04-05 0:26 ` Aleksandar Markovic 2019-04-05 0:26 ` Aleksandar Markovic 2019-04-17 12:45 ` Mateja Marjanovic 2019-04-17 12:45 ` Mateja Marjanovic 2019-04-13 16:05 ` Aleksandar Markovic 2019-04-13 16:05 ` Aleksandar Markovic 2019-04-15 13:48 ` Mateja Marjanovic 2019-04-15 13:48 ` Mateja Marjanovic 2019-04-04 13:14 ` [Qemu-devel] [PATCH v6 3/4] target/mips: Optimize ILVL.<B|H|W|D> " Mateja Marjanovic 2019-04-13 16:15 ` Aleksandar Markovic 2019-04-13 16:15 ` Aleksandar Markovic 2019-04-04 13:14 ` [Qemu-devel] [PATCH v6 4/4] target/mips: Optimize ILVR.<B|H|W|D> " Mateja Marjanovic 2019-04-13 16:05 ` Aleksandar Markovic 2019-04-13 16:05 ` Aleksandar Markovic 2019-04-15 11:24 ` Mateja Marjanovic 2019-04-15 11:24 ` Mateja Marjanovic 2019-04-16 21:20 ` Aleksandar Markovic 2019-04-16 21:20 ` Aleksandar Markovic 2019-04-17 8:16 ` Mateja Marjanovic [this message] 2019-04-17 8:16 ` Mateja Marjanovic
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