From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Guo, Junfeng" <junfeng.guo@intel.com>,
"Wu, Jingjing" <jingjing.wu@intel.com>,
"Xing, Beilei" <beilei.xing@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"stable@dpdk.org" <stable@dpdk.org>,
"Yigit, Ferruh" <ferruh.yigit@intel.com>,
"Liu, Lingyu" <lingyu.liu@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH
Date: Thu, 7 Oct 2021 04:24:00 +0000 [thread overview]
Message-ID: <e71a601aeb91461a922ea50479c7992f@intel.com> (raw)
In-Reply-To: <20210929123134.1465507-1-junfeng.guo@intel.com>
> -----Original Message-----
> From: Guo, Junfeng <junfeng.guo@intel.com>
> Sent: Wednesday, September 29, 2021 8:32 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>;
> Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; stable@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>;
> Guo, Junfeng <junfeng.guo@intel.com>; Liu, Lingyu <lingyu.liu@intel.com>
> Subject: [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH
>
> If GTPU Extionsion header has no pdu_type setting, the parsed value of
> gtp_psc_spec->pdu_type will be 0, which is same as IAVF_GTPU_EH_DWLINK.
> Thus, for this case, we should check gtp_psc_mask->pdu_type instead, to set
> QFI field bit of GTPU_EH first.
>
> Fixes: 45cc3a5435fc ("net/iavf: fix QFI fields of GTPU UL/DL for FDIR")
> Cc: stable@dpdk.org
>
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
The patch can't be applied due to below commit
commit 16b8e92d49b87705fffbedd9c3241204d9a584a6
Author: Raslan Darawsheh <rasland@nvidia.com>
Date: Mon Aug 23 13:55:39 2021 +0300
ethdev: use extension header for GTP PSC item
This updates the gtp_psc flow item to use the net header
definition of the gtp_psc to be based on RFC 38415-g30
Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Could you rebase?
Thanks
Qi
> ---
> drivers/net/iavf/iavf_fdir.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index
> 560589a496..227a089ce0 100644
> --- a/drivers/net/iavf/iavf_fdir.c
> +++ b/drivers/net/iavf/iavf_fdir.c
> @@ -1171,17 +1171,15 @@ iavf_fdir_parse_pattern(__rte_unused struct
> iavf_adapter *ad,
> if (gtp_psc_spec && gtp_psc_mask) {
> if (gtp_psc_mask->qfi == UINT8_MAX) {
> input_set |= IAVF_INSET_GTPU_QFI;
> - if (gtp_psc_spec->pdu_type ==
> - IAVF_GTPU_EH_UPLINK)
> + if (!gtp_psc_mask->pdu_type)
> VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
> - GTPU_UP, QFI);
> - else if (gtp_psc_spec->pdu_type ==
> - IAVF_GTPU_EH_DWLINK)
> + GTPU_EH, QFI);
> + else if (gtp_psc_spec->pdu_type ==
> IAVF_GTPU_EH_DWLINK)
> VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
> GTPU_DWN, QFI);
> - else
> + else if (gtp_psc_spec->pdu_type ==
> IAVF_GTPU_EH_UPLINK)
> VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
> - GTPU_EH, QFI);
> + GTPU_UP, QFI);
> }
>
> rte_memcpy(hdr->buffer, gtp_psc_spec,
> --
> 2.25.1
next prev parent reply other threads:[~2021-10-07 4:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-29 11:13 [dpdk-dev] [PATCH] net/iavf: fix QFI field bit check for GTPU EH Junfeng Guo
2021-09-29 12:31 ` [dpdk-dev] [PATCH v2] " Junfeng Guo
2021-10-07 4:24 ` Zhang, Qi Z [this message]
2021-10-08 10:41 ` [dpdk-dev] [PATCH v3] " Junfeng Guo
2021-10-08 6:09 ` Zhang, Qi Z
2021-10-08 11:01 ` [dpdk-dev] [dpdk-stable] " David Marchand
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