From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9ECDC433B4 for ; Fri, 23 Apr 2021 13:20:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98A35601FD for ; Fri, 23 Apr 2021 13:20:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242542AbhDWNU7 (ORCPT ); Fri, 23 Apr 2021 09:20:59 -0400 Received: from foss.arm.com ([217.140.110.172]:34716 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231169AbhDWNU6 (ORCPT ); Fri, 23 Apr 2021 09:20:58 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D140F1396; Fri, 23 Apr 2021 06:20:21 -0700 (PDT) Received: from [10.57.67.211] (unknown [10.57.67.211]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 112CF3F73B; Fri, 23 Apr 2021 06:20:19 -0700 (PDT) Subject: Re: [PATCH v1] coresight: add node to reset all coresight devices To: Tao Zhang , Mathieu Poirier , Alexander Shishkin Cc: Mike Leach , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Mao Jinlong , Yuanfang Zhang References: <1619166578-28690-1-git-send-email-taozha@codeaurora.org> From: Suzuki K Poulose Message-ID: Date: Fri, 23 Apr 2021 14:20:18 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.9.1 MIME-Version: 1.0 In-Reply-To: <1619166578-28690-1-git-send-email-taozha@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/04/2021 09:29, Tao Zhang wrote: > Add new reset_source_sink node to be able to disable all active > coresight devices. > In this way, we no longer need to manually disable all active > coresight devices one by one. After enabling multiple coresight > paths, users can reset their status more conveniently by this > node. > What is the use case here ? Why would you trigger a reset for all the sources/sink without gracefully completing any on-going sessions (including the perf ones, which are driven by the kernel perf layer) > This patch base on coresight-next repo > http://git.linaro.org/kernel/coresight.git/log/?h=next > > And this patch depends on the following patch > https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2551216.html Please post related patches as a series, possibly describing the overall problem that you are trying to solve, in the cover letter. > > Signed-off-by: Tingwei Zhang > Signed-off-by: Mao Jinlong > Signed-off-by: Tao Zhang > --- > drivers/hwtracing/coresight/coresight-core.c | 72 ++++++++++++++++++++++++---- > 1 file changed, 64 insertions(+), 8 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 7dfadb6..0001b6c 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -107,6 +107,23 @@ static int coresight_source_is_unique(struct coresight_device *csdev) > csdev, coresight_id_match); > } > > +static int coresight_reset_sink(struct device *dev, void *data) > +{ > + struct coresight_device *csdev = to_coresight_device(dev); > + > + if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || > + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && > + csdev->activated) > + csdev->activated = false; Why is this needed, when the disabl_path() should have taken care of this ? > + > + return 0; > +} > + > +static void coresight_reset_all_sink(void) > +{ > + bus_for_each_dev(&coresight_bustype, NULL, NULL, coresight_reset_sink); > +} > + How can you disable all the active sinks when some of the sinks could be driven by perf ? > static int coresight_find_link_inport(struct coresight_device *csdev, > struct coresight_device *parent) > { > @@ -1137,7 +1154,7 @@ int coresight_enable(struct coresight_device *csdev) > } > EXPORT_SYMBOL_GPL(coresight_enable); > > -void coresight_disable(struct coresight_device *csdev) > +static void __coresight_disable(struct coresight_device *csdev) > { > int ret; > struct list_head *path = NULL; > @@ -1145,14 +1162,12 @@ void coresight_disable(struct coresight_device *csdev) > struct coresight_path *cspath_next = NULL; > struct coresight_device *src_csdev = NULL; > > - mutex_lock(&coresight_mutex); > - > ret = coresight_validate_source(csdev, __func__); > if (ret) > - goto out; > + return; > > if (!csdev->enable || !coresight_disable_source(csdev)) > - goto out; > + return; > > list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { > src_csdev = coresight_get_source(cspath->path); > @@ -1165,12 +1180,16 @@ void coresight_disable(struct coresight_device *csdev) > } > } > if (path == NULL) > - goto out; > + return; > > coresight_disable_path(path); > coresight_release_path(path); > +} > > -out: > +void coresight_disable(struct coresight_device *csdev) > +{ > + mutex_lock(&coresight_mutex); > + __coresight_disable(csdev); > mutex_unlock(&coresight_mutex); > } > EXPORT_SYMBOL_GPL(coresight_disable); > @@ -1467,7 +1486,43 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) > > return -EAGAIN; > } > -EXPORT_SYMBOL_GPL(coresight_timeout); Why ? > + > +static ssize_t reset_source_sink_store(struct bus_type *bus, > + const char *buf, size_t size) > +{ > + int ret = 0; > + unsigned long val; > + struct coresight_path *cspath = NULL; > + struct coresight_path *cspath_next = NULL; > + struct coresight_device *csdev; > + > + ret = kstrtoul(buf, 10, &val); > + if (ret) > + return ret; > + > + mutex_lock(&coresight_mutex); > + > + list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { > + csdev = coresight_get_source(cspath->path); > + if (!csdev) > + continue; > + atomic_set(csdev->refcnt, 1); Is this safe ? > + __coresight_disable(csdev); > + } > + > + /* Reset all activated sinks */ > + coresight_reset_all_sink(); > + > + mutex_unlock(&coresight_mutex); > + return size; > +} > +static BUS_ATTR_WO(reset_source_sink); > + > +static struct attribute *coresight_reset_source_sink_attrs[] = { > + &bus_attr_reset_source_sink.attr, > + NULL, > +}; > +ATTRIBUTE_GROUPS(coresight_reset_source_sink); > > /* > * coresight_release_platform_data: Release references to the devices connected > @@ -1680,6 +1735,7 @@ EXPORT_SYMBOL_GPL(coresight_alloc_device_name); > > struct bus_type coresight_bustype = { > .name = "coresight", > + .bus_groups = coresight_reset_source_sink_groups, > }; > > static int __init coresight_init(void) > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F17CDC433B4 for ; Fri, 23 Apr 2021 13:22:43 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 46F18613C8 for ; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZvjP-00EQG9-9i for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 13:20:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D140F1396; Fri, 23 Apr 2021 06:20:21 -0700 (PDT) Received: from [10.57.67.211] (unknown [10.57.67.211]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 112CF3F73B; Fri, 23 Apr 2021 06:20:19 -0700 (PDT) Subject: Re: [PATCH v1] coresight: add node to reset all coresight devices To: Tao Zhang , Mathieu Poirier , Alexander Shishkin Cc: Mike Leach , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Mao Jinlong , Yuanfang Zhang References: <1619166578-28690-1-git-send-email-taozha@codeaurora.org> From: Suzuki K Poulose Message-ID: Date: Fri, 23 Apr 2021 14:20:18 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.9.1 MIME-Version: 1.0 In-Reply-To: <1619166578-28690-1-git-send-email-taozha@codeaurora.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_062027_474758_66DF378D X-CRM114-Status: GOOD ( 31.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 23/04/2021 09:29, Tao Zhang wrote: > Add new reset_source_sink node to be able to disable all active > coresight devices. > In this way, we no longer need to manually disable all active > coresight devices one by one. After enabling multiple coresight > paths, users can reset their status more conveniently by this > node. > What is the use case here ? Why would you trigger a reset for all the sources/sink without gracefully completing any on-going sessions (including the perf ones, which are driven by the kernel perf layer) > This patch base on coresight-next repo > http://git.linaro.org/kernel/coresight.git/log/?h=next > > And this patch depends on the following patch > https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2551216.html Please post related patches as a series, possibly describing the overall problem that you are trying to solve, in the cover letter. > > Signed-off-by: Tingwei Zhang > Signed-off-by: Mao Jinlong > Signed-off-by: Tao Zhang > --- > drivers/hwtracing/coresight/coresight-core.c | 72 ++++++++++++++++++++++++---- > 1 file changed, 64 insertions(+), 8 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 7dfadb6..0001b6c 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -107,6 +107,23 @@ static int coresight_source_is_unique(struct coresight_device *csdev) > csdev, coresight_id_match); > } > > +static int coresight_reset_sink(struct device *dev, void *data) > +{ > + struct coresight_device *csdev = to_coresight_device(dev); > + > + if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || > + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && > + csdev->activated) > + csdev->activated = false; Why is this needed, when the disabl_path() should have taken care of this ? > + > + return 0; > +} > + > +static void coresight_reset_all_sink(void) > +{ > + bus_for_each_dev(&coresight_bustype, NULL, NULL, coresight_reset_sink); > +} > + How can you disable all the active sinks when some of the sinks could be driven by perf ? > static int coresight_find_link_inport(struct coresight_device *csdev, > struct coresight_device *parent) > { > @@ -1137,7 +1154,7 @@ int coresight_enable(struct coresight_device *csdev) > } > EXPORT_SYMBOL_GPL(coresight_enable); > > -void coresight_disable(struct coresight_device *csdev) > +static void __coresight_disable(struct coresight_device *csdev) > { > int ret; > struct list_head *path = NULL; > @@ -1145,14 +1162,12 @@ void coresight_disable(struct coresight_device *csdev) > struct coresight_path *cspath_next = NULL; > struct coresight_device *src_csdev = NULL; > > - mutex_lock(&coresight_mutex); > - > ret = coresight_validate_source(csdev, __func__); > if (ret) > - goto out; > + return; > > if (!csdev->enable || !coresight_disable_source(csdev)) > - goto out; > + return; > > list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { > src_csdev = coresight_get_source(cspath->path); > @@ -1165,12 +1180,16 @@ void coresight_disable(struct coresight_device *csdev) > } > } > if (path == NULL) > - goto out; > + return; > > coresight_disable_path(path); > coresight_release_path(path); > +} > > -out: > +void coresight_disable(struct coresight_device *csdev) > +{ > + mutex_lock(&coresight_mutex); > + __coresight_disable(csdev); > mutex_unlock(&coresight_mutex); > } > EXPORT_SYMBOL_GPL(coresight_disable); > @@ -1467,7 +1486,43 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) > > return -EAGAIN; > } > -EXPORT_SYMBOL_GPL(coresight_timeout); Why ? > + > +static ssize_t reset_source_sink_store(struct bus_type *bus, > + const char *buf, size_t size) > +{ > + int ret = 0; > + unsigned long val; > + struct coresight_path *cspath = NULL; > + struct coresight_path *cspath_next = NULL; > + struct coresight_device *csdev; > + > + ret = kstrtoul(buf, 10, &val); > + if (ret) > + return ret; > + > + mutex_lock(&coresight_mutex); > + > + list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { > + csdev = coresight_get_source(cspath->path); > + if (!csdev) > + continue; > + atomic_set(csdev->refcnt, 1); Is this safe ? > + __coresight_disable(csdev); > + } > + > + /* Reset all activated sinks */ > + coresight_reset_all_sink(); > + > + mutex_unlock(&coresight_mutex); > + return size; > +} > +static BUS_ATTR_WO(reset_source_sink); > + > +static struct attribute *coresight_reset_source_sink_attrs[] = { > + &bus_attr_reset_source_sink.attr, > + NULL, > +}; > +ATTRIBUTE_GROUPS(coresight_reset_source_sink); > > /* > * coresight_release_platform_data: Release references to the devices connected > @@ -1680,6 +1735,7 @@ EXPORT_SYMBOL_GPL(coresight_alloc_device_name); > > struct bus_type coresight_bustype = { > .name = "coresight", > + .bus_groups = coresight_reset_source_sink_groups, > }; > > static int __init coresight_init(void) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel