Re: [PATCH v3] target/arm: Use correct variable for setting 'max' cpu's MIDR_EL1

["Philippe Mathieu-Daudé" <f4bug@amsat.org>]

On 4/30/20 5:59 PM, Peter Maydell wrote:
> On Tue, 28 Apr 2020 at 18:26, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> MIDR_EL1 a 64-bit system register with the top 32-bit being RES0.
>>
>> This fixes when compiling with -Werror=conversion:
>>
>>    target/arm/cpu64.c: In function ‘aarch64_max_initfn’:
>>    target/arm/cpu64.c:628:21: error: conversion from ‘uint64_t’ {aka ‘long unsigned int’} to ‘uint32_t’ {aka ‘unsigned int’} may change value [-Werror=conversion]
>>      628 |         cpu->midr = t;
>>          |                     ^
>>
>> Suggested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
>> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
> Applied to target-arm.next, with the commit message fixed
> up to match the patch contents:
> 
>      target/arm: Use uint64_t for midr field in CPU state struct
> 
>      MIDR_EL1 is a 64-bit system register with the top 32-bit being RES0.
>      Represent it in QEMU's ARMCPU struct with a uint64_t, not a
>      uint32_t.
> 
>      This fixes an error when compiling with -Werror=conversion
>      because we were manipulating the register value using a
>      local uint64_t variable:
> 
>        target/arm/cpu64.c: In function ‘aarch64_max_initfn’:
>        target/arm/cpu64.c:628:21: error: conversion from ‘uint64_t’
> {aka ‘long unsigned int’} to ‘uint32_t      ’ {aka ‘unsigned int’} may
> change value [-Werror=conversion]
>          628 |         cpu->midr = t;
>              |                     ^
> 
>      and future-proofs us against a possible future architecture
>      change using some of the top 32 bits.

Thanks Peter for updating the description.

> 
> thanks
> -- PMM
>