From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751797AbdECMCL (ORCPT ); Wed, 3 May 2017 08:02:11 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:42239 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752576AbdECMAa (ORCPT ); Wed, 3 May 2017 08:00:30 -0400 From: Maxime Ripard To: Mike Turquette , Stephen Boyd , Chen-Yu Tsai , Maxime Ripard Cc: Daniel Vetter , David Airlie , dri-devel@lists.freedesktop.org, Mark Rutland , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v2 10/20] drm/sun4i: tcon: Move the muxing out of the mode set function Date: Wed, 3 May 2017 13:59:47 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The muxing can actually happen on both channels on some SoCs, so it makes more sense to just move it out of the sun4i_tcon1_mode_set function and create a separate function that needs to be called by the encoders. Let's do that and convert the existing drivers. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 1 + drivers/gpu/drm/sun4i/sun4i_tcon.c | 22 ++++++++++++++++------ drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ drivers/gpu/drm/sun4i/sun4i_tv.c | 1 + 4 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index 67f0b91a99de..3003d290c635 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -175,6 +175,7 @@ static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, struct sun4i_tcon *tcon = rgb->tcon; sun4i_tcon0_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 0, encoder); clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 66a5bb9b85e9..0204d9fadb66 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -108,6 +108,22 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) } EXPORT_SYMBOL(sun4i_tcon_enable_vblank); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder) +{ + if (!tcon->quirks->has_unknown_mux) + return; + + if (channel != 1) + return; + + /* + * FIXME: Undocumented bits + */ + regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); +} +EXPORT_SYMBOL(sun4i_tcon_set_mux); + static int sun4i_tcon_get_clk_delay(struct drm_display_mode *mode, int channel) { @@ -266,12 +282,6 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, SUN4I_TCON_GCTL_IOMAP_MASK, SUN4I_TCON_GCTL_IOMAP_TCON1); - - /* - * FIXME: Undocumented bits - */ - if (tcon->quirks->has_unknown_mux) - regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); } EXPORT_SYMBOL(sun4i_tcon1_mode_set); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index f636343a935d..0350936b413c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -190,6 +190,8 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); /* Mode Related Controls */ void sun4i_tcon_switch_interlace(struct sun4i_tcon *tcon, bool enable); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder); void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, struct drm_display_mode *mode); void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 49c49431a053..03c494b8159c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -393,6 +393,7 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); sun4i_tcon1_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 1, encoder); /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, -- git-series 0.8.11 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: [PATCH v2 10/20] drm/sun4i: tcon: Move the muxing out of the mode set function Date: Wed, 3 May 2017 13:59:47 +0200 Message-ID: References: Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: In-Reply-To: References: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Mike Turquette , Stephen Boyd , Chen-Yu Tsai , Maxime Ripard Cc: Daniel Vetter , David Airlie , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Mark Rutland , Rob Herring , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org The muxing can actually happen on both channels on some SoCs, so it makes more sense to just move it out of the sun4i_tcon1_mode_set function and create a separate function that needs to be called by the encoders. Let's do that and convert the existing drivers. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 1 + drivers/gpu/drm/sun4i/sun4i_tcon.c | 22 ++++++++++++++++------ drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ drivers/gpu/drm/sun4i/sun4i_tv.c | 1 + 4 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index 67f0b91a99de..3003d290c635 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -175,6 +175,7 @@ static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, struct sun4i_tcon *tcon = rgb->tcon; sun4i_tcon0_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 0, encoder); clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 66a5bb9b85e9..0204d9fadb66 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -108,6 +108,22 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) } EXPORT_SYMBOL(sun4i_tcon_enable_vblank); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder) +{ + if (!tcon->quirks->has_unknown_mux) + return; + + if (channel != 1) + return; + + /* + * FIXME: Undocumented bits + */ + regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); +} +EXPORT_SYMBOL(sun4i_tcon_set_mux); + static int sun4i_tcon_get_clk_delay(struct drm_display_mode *mode, int channel) { @@ -266,12 +282,6 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, SUN4I_TCON_GCTL_IOMAP_MASK, SUN4I_TCON_GCTL_IOMAP_TCON1); - - /* - * FIXME: Undocumented bits - */ - if (tcon->quirks->has_unknown_mux) - regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); } EXPORT_SYMBOL(sun4i_tcon1_mode_set); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index f636343a935d..0350936b413c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -190,6 +190,8 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); /* Mode Related Controls */ void sun4i_tcon_switch_interlace(struct sun4i_tcon *tcon, bool enable); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder); void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, struct drm_display_mode *mode); void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 49c49431a053..03c494b8159c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -393,6 +393,7 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); sun4i_tcon1_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 1, encoder); /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, -- git-series 0.8.11 From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Wed, 3 May 2017 13:59:47 +0200 Subject: [PATCH v2 10/20] drm/sun4i: tcon: Move the muxing out of the mode set function In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The muxing can actually happen on both channels on some SoCs, so it makes more sense to just move it out of the sun4i_tcon1_mode_set function and create a separate function that needs to be called by the encoders. Let's do that and convert the existing drivers. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 1 + drivers/gpu/drm/sun4i/sun4i_tcon.c | 22 ++++++++++++++++------ drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ drivers/gpu/drm/sun4i/sun4i_tv.c | 1 + 4 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index 67f0b91a99de..3003d290c635 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -175,6 +175,7 @@ static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, struct sun4i_tcon *tcon = rgb->tcon; sun4i_tcon0_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 0, encoder); clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 66a5bb9b85e9..0204d9fadb66 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -108,6 +108,22 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) } EXPORT_SYMBOL(sun4i_tcon_enable_vblank); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder) +{ + if (!tcon->quirks->has_unknown_mux) + return; + + if (channel != 1) + return; + + /* + * FIXME: Undocumented bits + */ + regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); +} +EXPORT_SYMBOL(sun4i_tcon_set_mux); + static int sun4i_tcon_get_clk_delay(struct drm_display_mode *mode, int channel) { @@ -266,12 +282,6 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, SUN4I_TCON_GCTL_IOMAP_MASK, SUN4I_TCON_GCTL_IOMAP_TCON1); - - /* - * FIXME: Undocumented bits - */ - if (tcon->quirks->has_unknown_mux) - regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); } EXPORT_SYMBOL(sun4i_tcon1_mode_set); diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index f636343a935d..0350936b413c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -190,6 +190,8 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); /* Mode Related Controls */ void sun4i_tcon_switch_interlace(struct sun4i_tcon *tcon, bool enable); +void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel, + struct drm_encoder *encoder); void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, struct drm_display_mode *mode); void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 49c49431a053..03c494b8159c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -393,6 +393,7 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); sun4i_tcon1_mode_set(tcon, mode); + sun4i_tcon_set_mux(tcon, 1, encoder); /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, -- git-series 0.8.11