From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86DE5CCA473 for ; Wed, 6 Jul 2022 13:04:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233522AbiGFNEz (ORCPT ); Wed, 6 Jul 2022 09:04:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233671AbiGFNEt (ORCPT ); Wed, 6 Jul 2022 09:04:49 -0400 Received: from relay06.th.seeweb.it (relay06.th.seeweb.it [5.144.164.167]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FC2D1A3BB for ; Wed, 6 Jul 2022 06:04:47 -0700 (PDT) Received: from [192.168.1.101] (abxi46.neoplus.adsl.tpnet.pl [83.9.2.46]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 7BBCC3F4EA; Wed, 6 Jul 2022 15:04:45 +0200 (CEST) Message-ID: Date: Wed, 6 Jul 2022 15:04:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064 Content-Language: en-US To: Christian Marangi , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jonathan McDowell References: <20220705133917.8405-1-ansuelsmth@gmail.com> <20220705133917.8405-7-ansuelsmth@gmail.com> From: Konrad Dybcio In-Reply-To: <20220705133917.8405-7-ansuelsmth@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 5.07.2022 15:39, Christian Marangi wrote: > Enable usb phy by default. When the usb phy were pushed, half of them > were flagged as disabled by mistake. Fix this to correctly init dwc3 > node on any ipq8064 based SoC. Are you sure they are used on *all* devices? If not, you will lose power by enabling unused hw.. Konrad > > Signed-off-by: Christian Marangi > Tested-by: Jonathan McDowell > --- > arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi > index b2faa4a067e9..9c32c637ea46 100644 > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > @@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 { > clocks = <&gcc USB30_0_UTMI_CLK>; > clock-names = "ref"; > #phy-cells = <0>; > - > - status = "disabled"; > }; > > ss_phy_0: phy@100f8830 { > @@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 { > clocks = <&gcc USB30_0_MASTER_CLK>; > clock-names = "ref"; > #phy-cells = <0>; > - > - status = "disabled"; > }; > > usb3_0: usb3@100f8800 {