From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBF6CC433EF for ; Tue, 21 Jun 2022 04:03:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230025AbiFUEDz (ORCPT ); Tue, 21 Jun 2022 00:03:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231804AbiFUEDv (ORCPT ); Tue, 21 Jun 2022 00:03:51 -0400 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBBF021812 for ; Mon, 20 Jun 2022 21:03:47 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 42A293200392; Tue, 21 Jun 2022 00:03:46 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Tue, 21 Jun 2022 00:03:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1655784225; x= 1655870625; bh=5CIwMNK/gDKbcFBkIn3kz8/WBVGi20o0cyPDTNwTmpY=; b=Y EVvCmRcwiwEkKVOixkHKaw4FnCCGRDL4Lwffa6a9WnWgiE4za54P2O825/xtZ8wf ZOcg4ksqFogHUpa8sVAQbxShi3z6py/FkoKloywVQPYjtJs/9CVWxhh3KPL86Fgd TjsxLnI4d7IBIuaGYUdxXULFzyfHsY1MVXB/QAGpVQfSAibGOqd/ZrcPJRo7bf0+ qM8RfTWca/LPFSXmBGIW2VASHA37BXOw5ZMHKhLFySQxDbjQ3x1pw4LULKQTb15T LBtkM0NdFCwdQG8NrSASJ+ofbjn7jYJ1wII6YvA7kQS0AKk0nhFt+gG6pOLYlEUo HX2w3j8bnQFwwOYvn+tAA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1655784225; x= 1655870625; bh=5CIwMNK/gDKbcFBkIn3kz8/WBVGi20o0cyPDTNwTmpY=; b=f VFDS0BVqFGoerCvpcfOjYOPdNj5yJ7BFia7kyzzM1I9xnuR5wuUebDKqgKG/A+sp muEuASPgTV9vsiG39KXQ2kzz/aD+ZA+vsMlxbJb2+muvccyOsHwsMXe2PP5cyUkI kT+pw+AH0l8zcq3oYj0oB6vfqbLBabq3Oc7KPE+v2/xaDNVA8tstIgbuCq0Bz9Jn b/z0Jvc3Igl5R3TmOiYeh/UGWuTsW/iRyx90i/qSZ97pTJCjtwgr1WYkMzZwo1kD NJs51eUVuhzuDWxQJDiY+11mQDFLnnBt4ygqrDE19aj2N8+U+B6W8+Bwxrmt+WXs KiP81uVLcOslkURnRdCnw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrudefvddgjeehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepuffvvehfhffkffgfgggjtgfgsehtjeertddtfeejnecuhfhrohhmpefurghm uhgvlhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenuc ggtffrrghtthgvrhhnpefftdevkedvgeekueeutefgteffieelvedukeeuhfehledvhfei tdehudfhudehhfenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 21 Jun 2022 00:03:44 -0400 (EDT) Subject: Re: [PATCH v2 4/6] genirq: Provide an IRQ affinity mask in non-SMP configs To: Marc Zyngier Cc: Thomas Gleixner , Palmer Dabbelt , Paul Walmsley , Albert Ou , Bartosz Golaszewski , Guo Ren , Mark Rutland , Russell King , Wei Xu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20220616064028.57933-1-samuel@sholland.org> <20220616064028.57933-5-samuel@sholland.org> <87h74ipcos.wl-maz@kernel.org> From: Samuel Holland Message-ID: Date: Mon, 20 Jun 2022 23:03:43 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <87h74ipcos.wl-maz@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/18/22 4:01 AM, Marc Zyngier wrote: > Hi Samuel, > > On Thu, 16 Jun 2022 07:40:26 +0100, > Samuel Holland wrote: >> >> IRQ affinity masks are not allocated in uniprocessor configurations. >> This requires special case non-SMP code in drivers for irqchips which >> have per-CPU enable or mask registers. >> >> Since IRQ affinity is always the same in a uniprocessor configuration, >> we can still provide the correct affinity mask without allocating one >> per IRQ. We can reuse the system-wide cpu_possible_mask. >> >> By returning a real cpumask from irq_data_get_affinity_mask even when >> SMP is disabled, irqchip drivers which iterate over that mask will >> automatically do the right thing. >> >> Signed-off-by: Samuel Holland >> --- >> >> (no changes since v1) >> >> include/linux/irq.h | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/include/linux/irq.h b/include/linux/irq.h >> index 69ee4e2f36ce..d5e958b026aa 100644 >> --- a/include/linux/irq.h >> +++ b/include/linux/irq.h >> @@ -151,7 +151,9 @@ struct irq_common_data { >> #endif >> void *handler_data; >> struct msi_desc *msi_desc; >> +#ifdef CONFIG_SMP >> cpumask_var_t affinity; >> +#endif >> #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK >> cpumask_var_t effective_affinity; >> #endif >> @@ -881,7 +883,11 @@ static inline int irq_data_get_node(struct irq_data *d) >> >> static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d) >> { >> +#ifdef CONFIG_SMP >> return d->common->affinity; >> +#else >> + return &__cpu_possible_mask; >> +#endif > > I have a bad feeling about this one. Being in a !SMP configuration > doesn't necessarily mean that __cpu_possible_mask only contains a > single CPU, specially with things like CONFIG_INIT_ALL_POSSIBLE. I can > also imagine an architecture populating this bitmap from firmware > tables irrespective of the SMP status of the kernel. > > Can't you use something like: > > return cpumask_of(0); > > which is guaranteed to be the right thing on !SMP configuration? I can if I cast away the const. However I see a lot of: cpumask_copy(irq_data_get_affinity_mask(d), foo); which I suppose is a great reason not to do what I am doing. The right solution seems to be adding irq_data_update_affinity() to match irq_data_update_effective_affinity(), and making both getters return a const cpumask. Then I can use cpumask_of(0). Regards, Samuel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61D28C433EF for ; Tue, 21 Jun 2022 04:04:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=1WKxXQHt5caSJEQmpPs1hHi3hLiXK9Q3GLwOzxluf2s=; b=LnW+2bSdvUS7BPpmwAHpz00mNJ TFjEDJPmEHqeXnP6ZrgRe9Px1g/pvF8od8SwkaB/VioZGaf6KB2i0JX08kJ/vTTXeWBUguGifzxLj GK158QLUTeWdL4GgV096liXD6GmI0aJ2heWWNREA8q8zu2aRMJ+oGfUXkRP4qqhBvkxqfHE5SHdDc ZyoknKRiRhS+IityCnUyxGvq1SoDZVQkA8UP7uk5GocxMwEAMc0vfNOor3EuoifqGD3dwu/K1OxAk VlJJWIfbhiyXn8RFqLbAcIf+2mdhhBVyDp4xYkDwsBHqxj0zK9I0Z5VSZXs9CBE5vsjYUizNv7GjS GocBuWsQ==; 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Tue, 21 Jun 2022 00:03:44 -0400 (EDT) Subject: Re: [PATCH v2 4/6] genirq: Provide an IRQ affinity mask in non-SMP configs To: Marc Zyngier Cc: Thomas Gleixner , Palmer Dabbelt , Paul Walmsley , Albert Ou , Bartosz Golaszewski , Guo Ren , Mark Rutland , Russell King , Wei Xu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20220616064028.57933-1-samuel@sholland.org> <20220616064028.57933-5-samuel@sholland.org> <87h74ipcos.wl-maz@kernel.org> From: Samuel Holland Message-ID: Date: Mon, 20 Jun 2022 23:03:43 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <87h74ipcos.wl-maz@kernel.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220620_210348_280289_B9784ADF X-CRM114-Status: GOOD ( 22.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 6/18/22 4:01 AM, Marc Zyngier wrote: > Hi Samuel, > > On Thu, 16 Jun 2022 07:40:26 +0100, > Samuel Holland wrote: >> >> IRQ affinity masks are not allocated in uniprocessor configurations. >> This requires special case non-SMP code in drivers for irqchips which >> have per-CPU enable or mask registers. >> >> Since IRQ affinity is always the same in a uniprocessor configuration, >> we can still provide the correct affinity mask without allocating one >> per IRQ. We can reuse the system-wide cpu_possible_mask. >> >> By returning a real cpumask from irq_data_get_affinity_mask even when >> SMP is disabled, irqchip drivers which iterate over that mask will >> automatically do the right thing. >> >> Signed-off-by: Samuel Holland >> --- >> >> (no changes since v1) >> >> include/linux/irq.h | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/include/linux/irq.h b/include/linux/irq.h >> index 69ee4e2f36ce..d5e958b026aa 100644 >> --- a/include/linux/irq.h >> +++ b/include/linux/irq.h >> @@ -151,7 +151,9 @@ struct irq_common_data { >> #endif >> void *handler_data; >> struct msi_desc *msi_desc; >> +#ifdef CONFIG_SMP >> cpumask_var_t affinity; >> +#endif >> #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK >> cpumask_var_t effective_affinity; >> #endif >> @@ -881,7 +883,11 @@ static inline int irq_data_get_node(struct irq_data *d) >> >> static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d) >> { >> +#ifdef CONFIG_SMP >> return d->common->affinity; >> +#else >> + return &__cpu_possible_mask; >> +#endif > > I have a bad feeling about this one. Being in a !SMP configuration > doesn't necessarily mean that __cpu_possible_mask only contains a > single CPU, specially with things like CONFIG_INIT_ALL_POSSIBLE. I can > also imagine an architecture populating this bitmap from firmware > tables irrespective of the SMP status of the kernel. > > Can't you use something like: > > return cpumask_of(0); > > which is guaranteed to be the right thing on !SMP configuration? I can if I cast away the const. However I see a lot of: cpumask_copy(irq_data_get_affinity_mask(d), foo); which I suppose is a great reason not to do what I am doing. The right solution seems to be adding irq_data_update_affinity() to match irq_data_update_effective_affinity(), and making both getters return a const cpumask. Then I can use cpumask_of(0). Regards, Samuel _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DDBF7C43334 for ; Tue, 21 Jun 2022 04:05:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; 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Tue, 21 Jun 2022 00:03:44 -0400 (EDT) Subject: Re: [PATCH v2 4/6] genirq: Provide an IRQ affinity mask in non-SMP configs To: Marc Zyngier Cc: Thomas Gleixner , Palmer Dabbelt , Paul Walmsley , Albert Ou , Bartosz Golaszewski , Guo Ren , Mark Rutland , Russell King , Wei Xu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20220616064028.57933-1-samuel@sholland.org> <20220616064028.57933-5-samuel@sholland.org> <87h74ipcos.wl-maz@kernel.org> From: Samuel Holland Message-ID: Date: Mon, 20 Jun 2022 23:03:43 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <87h74ipcos.wl-maz@kernel.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220620_210348_280289_B9784ADF X-CRM114-Status: GOOD ( 22.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/18/22 4:01 AM, Marc Zyngier wrote: > Hi Samuel, > > On Thu, 16 Jun 2022 07:40:26 +0100, > Samuel Holland wrote: >> >> IRQ affinity masks are not allocated in uniprocessor configurations. >> This requires special case non-SMP code in drivers for irqchips which >> have per-CPU enable or mask registers. >> >> Since IRQ affinity is always the same in a uniprocessor configuration, >> we can still provide the correct affinity mask without allocating one >> per IRQ. We can reuse the system-wide cpu_possible_mask. >> >> By returning a real cpumask from irq_data_get_affinity_mask even when >> SMP is disabled, irqchip drivers which iterate over that mask will >> automatically do the right thing. >> >> Signed-off-by: Samuel Holland >> --- >> >> (no changes since v1) >> >> include/linux/irq.h | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/include/linux/irq.h b/include/linux/irq.h >> index 69ee4e2f36ce..d5e958b026aa 100644 >> --- a/include/linux/irq.h >> +++ b/include/linux/irq.h >> @@ -151,7 +151,9 @@ struct irq_common_data { >> #endif >> void *handler_data; >> struct msi_desc *msi_desc; >> +#ifdef CONFIG_SMP >> cpumask_var_t affinity; >> +#endif >> #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK >> cpumask_var_t effective_affinity; >> #endif >> @@ -881,7 +883,11 @@ static inline int irq_data_get_node(struct irq_data *d) >> >> static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d) >> { >> +#ifdef CONFIG_SMP >> return d->common->affinity; >> +#else >> + return &__cpu_possible_mask; >> +#endif > > I have a bad feeling about this one. Being in a !SMP configuration > doesn't necessarily mean that __cpu_possible_mask only contains a > single CPU, specially with things like CONFIG_INIT_ALL_POSSIBLE. I can > also imagine an architecture populating this bitmap from firmware > tables irrespective of the SMP status of the kernel. > > Can't you use something like: > > return cpumask_of(0); > > which is guaranteed to be the right thing on !SMP configuration? I can if I cast away the const. However I see a lot of: cpumask_copy(irq_data_get_affinity_mask(d), foo); which I suppose is a great reason not to do what I am doing. The right solution seems to be adding irq_data_update_affinity() to match irq_data_update_effective_affinity(), and making both getters return a const cpumask. Then I can use cpumask_of(0). Regards, Samuel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel