From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from kirsty.vergenet.net ([202.4.237.240]:35788 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752366AbdLGJzX (ORCPT ); Thu, 7 Dec 2017 04:55:23 -0500 From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Takeshi Kihara , Geert Uytterhoeven , Simon Horman Subject: [PATCH 42/54] arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29 Date: Thu, 7 Dec 2017 10:53:45 +0100 Message-Id: In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: From: Takeshi Kihara This patch changes the number of GPIO bank 1 ports to 29 because GP-1-28 port pin of R8A7795 ES2.0 SoC support was added. Signed-off-by: Takeshi Kihara Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") [geert: Keep 28 GPIOs on H3 ES1.x after r8a7795.dtsi sharing] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 29b52d89c78a..26769a11a190 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -109,6 +109,10 @@ }; }; +&gpio1 { + gpio-ranges = <&pfc 0 32 28>; +}; + &ipmmu_vi0 { renesas,ipmmu-main = <&ipmmu_mm 11>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index a438d58f1b50..6db4f10376a1 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -240,7 +240,7 @@ interrupts = ; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 28>; + gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; -- 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: horms+renesas@verge.net.au (Simon Horman) Date: Thu, 7 Dec 2017 10:53:45 +0100 Subject: [PATCH 42/54] arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29 In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Takeshi Kihara This patch changes the number of GPIO bank 1 ports to 29 because GP-1-28 port pin of R8A7795 ES2.0 SoC support was added. Signed-off-by: Takeshi Kihara Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") [geert: Keep 28 GPIOs on H3 ES1.x after r8a7795.dtsi sharing] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 29b52d89c78a..26769a11a190 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -109,6 +109,10 @@ }; }; +&gpio1 { + gpio-ranges = <&pfc 0 32 28>; +}; + &ipmmu_vi0 { renesas,ipmmu-main = <&ipmmu_mm 11>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index a438d58f1b50..6db4f10376a1 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -240,7 +240,7 @@ interrupts = ; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 28>; + gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; -- 2.11.0