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From: Andrew Cooper <amc96@srcf.net>
To: Jan Beulich <jbeulich@suse.com>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>,
	"Paul Durrant" <paul@xen.org>
Subject: Re: [PATCH 3/3] x86emul: drop "seg" parameter from insn_fetch() hook
Date: Fri, 3 Dec 2021 12:24:17 +0000	[thread overview]
Message-ID: <eb59334a-ebb7-9cee-f7be-596deaf32d2e@srcf.net> (raw)
In-Reply-To: <53cf0492-e197-d3e6-8898-9e199bbc5399@suse.com>

On 03/12/2021 11:23, Jan Beulich wrote:
> This is specified (and asserted for in a number of places) to always be
> CS. Passing this as an argument in various places is therefore
> pointless. The price to pay is two simple new functions,

This is actually a very interesting case study.

Both are indirect targets, so need cf_check (or rather, will do
imminently.  I'll fold a suitable fix when I rebase the CET series).

On the face of it, there's now a pile of parameter shuffling just to get
a 0 in %rdi, which isn't ideal.

However, for fine grained CFI schemes using a type hash, it actually
prevents mixing and matching of read/fetch hooks, so ends up as a
hardening improvement too.

>  with the
> benefit of the PTWR case now gaining a more appropriate error code.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

> ---
> In principle in the PTWR case I think we ought to set PFEC_insn_fetch in
> the error code only when NX is seen as available by the guest. Otoh I'd
> kind of expect x86_emul_pagefault() to abstract away this detail.
> Thoughts?

I have mixed feelings.  x86_emul_pagefault() is the wrong place to put
such logic because it, like its neighbours, is just a thin wrapper for
filling the pending event information.

Architecturally, PFEC_insn_fetch is visible for NX || SMEP, and we do
have logic to make this happen correctly for HVM guests (confirmed by my
XTF test, which I *still* need to get around to adding to CI).  I think
it's all contained in the main pagewalk, but I can't remember offhand.

However, PV guests explicitly share their paging settings with Xen, and
we don't hide EFER.NX based on CPUID, although we do appear to hide
CR4.SMEP unilaterally (hardly surprising).

Given the ubiquity of NX these days, and the fact that PV guests are
known-fuzzy in the pagetable department, I'm not sure it's worth the
overhead of trying to hide.

~Andrew


  reply	other threads:[~2021-12-03 12:24 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-03 11:18 [PATCH 0/3] x86: insn-fetch related emulation adjustments Jan Beulich
2021-12-03 11:21 ` [PATCH 1/3] x86/HVM: permit CLFLUSH{,OPT} on execute-only code segments Jan Beulich
2021-12-03 11:48   ` Andrew Cooper
2021-12-03 11:55     ` Jan Beulich
2021-12-10 12:53   ` Durrant, Paul
2021-12-03 11:22 ` [PATCH 2/3] x86/HVM: fail virt-to-linear conversion for insn fetches from non-code segments Jan Beulich
2021-12-03 11:49   ` Andrew Cooper
2021-12-03 11:23 ` [PATCH 3/3] x86emul: drop "seg" parameter from insn_fetch() hook Jan Beulich
2021-12-03 12:24   ` Andrew Cooper [this message]
2021-12-10 12:56   ` Durrant, Paul
2021-12-10  9:43 ` Ping: [PATCH 0/3] x86: insn-fetch related emulation adjustments Jan Beulich

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