From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sinan Kaya Subject: Re: RFC on writel and writel_relaxed Date: Mon, 26 Mar 2018 17:46:22 -0400 Message-ID: References: <1521692689.16434.293.camel@kernel.crashing.org> <1521726722.16434.312.camel@kernel.crashing.org> <20180323163510.GC13033@ziepe.ca> <1521854626.16434.359.camel@kernel.crashing.org> <58ce5b83f40f4775bec1be8db66adb0d@AcuMS.aculab.com> <20180326165425.GA15554@ziepe.ca> <20180326202545.GB15554@ziepe.ca> <20180326210951.GD15554@ziepe.ca> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" To: Arnd Bergmann , Jason Gunthorpe Cc: "Paul E. McKenney" , "linux-rdma@vger.kernel.org" , Will Deacon , David Laight , Oliver , Alexander Duyck , "open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)" List-Id: linux-rdma@vger.kernel.org On 3/26/2018 5:30 PM, Arnd Bergmann wrote: >> But that was never a requirement of writel(), >> Documentation/memory-barriers.txt gives an explicit example demanding >> the wmb() before writel() for ordering system memory against writel. > Indeed, but it's in an example for when to use dma_wmb(), not wmb(). > Adding Alexander Duyck to Cc, he added that section as part of > 1077fa36f23e ("arch: Add lightweight memory barriers dma_rmb() and > dma_wmb()"). Also adding the other people that were involved with that. > ARM developers can get away with not including wmb() in their code and use writel() to observe memory writes due to implicit barriers. However, same code will not work on Intel. writel() has a compiler barrier in it for x86. wmb() has a sync operation in it for x86. Unless wmb() is called, PCIe device won't observe memory updates from the CPU. -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4097502tGvzF1s1 for ; Tue, 27 Mar 2018 08:46:27 +1100 (AEDT) Subject: Re: RFC on writel and writel_relaxed To: Arnd Bergmann , Jason Gunthorpe Cc: David Laight , Oliver , "open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)" , "linux-rdma@vger.kernel.org" , Alexander Duyck , Will Deacon , Benjamin Herrenschmidt , "Paul E. McKenney" References: <1521692689.16434.293.camel@kernel.crashing.org> <1521726722.16434.312.camel@kernel.crashing.org> <20180323163510.GC13033@ziepe.ca> <1521854626.16434.359.camel@kernel.crashing.org> <58ce5b83f40f4775bec1be8db66adb0d@AcuMS.aculab.com> <20180326165425.GA15554@ziepe.ca> <20180326202545.GB15554@ziepe.ca> <20180326210951.GD15554@ziepe.ca> From: Sinan Kaya Message-ID: Date: Mon, 26 Mar 2018 17:46:22 -0400 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 3/26/2018 5:30 PM, Arnd Bergmann wrote: >> But that was never a requirement of writel(), >> Documentation/memory-barriers.txt gives an explicit example demanding >> the wmb() before writel() for ordering system memory against writel. > Indeed, but it's in an example for when to use dma_wmb(), not wmb(). > Adding Alexander Duyck to Cc, he added that section as part of > 1077fa36f23e ("arch: Add lightweight memory barriers dma_rmb() and > dma_wmb()"). Also adding the other people that were involved with that. > ARM developers can get away with not including wmb() in their code and use writel() to observe memory writes due to implicit barriers. However, same code will not work on Intel. writel() has a compiler barrier in it for x86. wmb() has a sync operation in it for x86. Unless wmb() is called, PCIe device won't observe memory updates from the CPU. -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.