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[81.40.121.121]) by smtp.gmail.com with ESMTPSA id o125sm8586969wma.27.2020.08.06.13.11.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Aug 2020 13:11:44 -0700 (PDT) Subject: Re: [PATCH-for-5.2] target/mips: Report unimplemented cache() operations To: Jiaxun Yang , qemu-devel@nongnu.org References: <20200806122612.17167-1-f4bug@amsat.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Thu, 6 Aug 2020 22:11:43 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: 0 X-Spam_score: 0.0 X-Spam_bar: / X-Spam_report: (0.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=1, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Aleksandar Markovic , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/6/20 8:01 PM, Jiaxun Yang wrote: > 在 2020/8/6 下午8:26, Philippe Mathieu-Daudé 写道: >> We only implement the Index[Store/Load]Tag from the 'cache' opcode. >> Instead of ignoring the other cache operations, report them as >> unimplemented. > > Hmm, I don't think we have anything to do with Invalidate/Writeback etc. > opcodes > in QEMU. Why do we log this? I'm noticed this code is run on Linux 3.3.8 (4KEc): 8880: 3082000f andi v0,a0,0xf 8884: 10800008 beqz a0,88a8 8888: 00a21021 addu v0,a1,v0 888c: 08002227 j 889c 8890: 00001821 move v1,zero 8894: bcf90000 cache 0x19,0(a3) 8898: 24630010 addiu v1,v1,16 889c: 0062302b sltu a2,v1,v0 88a0: 14c0fffc bnez a2,8894 88a4: 00833821 addu a3,a0,v1 88a8: 03e00008 jr ra 88ac: 00000000 nop Why silently ignore the opcode is not implemented instead of logging it? > > Thanks. > > - Jiaxun > >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >>   target/mips/op_helper.c | 2 ++ >>   1 file changed, 2 insertions(+) >> >> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c >> index 9552b280e0..7f87e57c8e 100644 >> --- a/target/mips/op_helper.c >> +++ b/target/mips/op_helper.c >> @@ -1583,6 +1583,8 @@ void helper_cache(CPUMIPSState *env, >> target_ulong addr, uint32_t op) >>           /* Index Load Tag */ >>           memory_region_dispatch_read(env->itc_tag, index, >> &env->CP0_TagLo, >>                                       MO_64, MEMTXATTRS_UNSPECIFIED); >> +    } else { >> +        qemu_log_mask(LOG_UNIMP, "cache %u\n", op); >>       } >>   #endif >>   } >