From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47282) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bR89X-0002Iu-5C for qemu-devel@nongnu.org; Sat, 23 Jul 2016 21:24:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bR89T-0006ll-V2 for qemu-devel@nongnu.org; Sat, 23 Jul 2016 21:24:23 -0400 Sender: Richard Henderson References: <1469263490-19130-1-git-send-email-nikunj@linux.vnet.ibm.com> <1469263490-19130-6-git-send-email-nikunj@linux.vnet.ibm.com> From: Richard Henderson Message-ID: Date: Sun, 24 Jul 2016 06:54:00 +0530 MIME-Version: 1.0 In-Reply-To: <1469263490-19130-6-git-send-email-nikunj@linux.vnet.ibm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v2 05/13] target-ppc: add modulo word operations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com On 07/23/2016 02:14 PM, Nikunj A Dadhania wrote: > Adding following instructions: > > moduw: Modulo Unsigned Word > modsw: Modulo Signed Word > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/helper.h | 2 ++ > target-ppc/int_helper.c | 15 +++++++++++++++ > target-ppc/translate.c | 19 +++++++++++++++++++ > 3 files changed, 36 insertions(+) > > diff --git a/target-ppc/helper.h b/target-ppc/helper.h > index 1f5cfd0..76072fd 100644 > --- a/target-ppc/helper.h > +++ b/target-ppc/helper.h > @@ -41,6 +41,8 @@ DEF_HELPER_FLAGS_1(cntlzw, TCG_CALL_NO_RWG_SE, tl, tl) > DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl) > DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) > DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl) > +DEF_HELPER_FLAGS_2(modsw, TCG_CALL_NO_RWG_SE, i32, i32, i32) > +DEF_HELPER_FLAGS_2(moduw, TCG_CALL_NO_RWG_SE, i32, i32, i32) > DEF_HELPER_3(sraw, tl, env, tl, tl) > #if defined(TARGET_PPC64) > DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl) > diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c > index 7445376..631e0b4 100644 > --- a/target-ppc/int_helper.c > +++ b/target-ppc/int_helper.c > @@ -139,6 +139,21 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe) > > #endif > > +uint32_t helper_modsw(uint32_t rau, uint32_t rbu) > +{ > + int32_t ra = (int32_t) rau; > + int32_t rb = (int32_t) rbu; > + > + if ((rb == 0) || (ra == INT32_MIN && rb == -1)) { > + return 0; > + } > + return ra % rb; > +} > + > +uint32_t helper_moduw(uint32_t ra, uint32_t rb) > +{ > + return rb ? ra % rb : 0; > +} I think, like you, I got distracted by the current div implementation in ppc. I've just re-read the spec and seen the "undefined" language. Which of course gives us much more freedom. With this freedom, we can do the division inline, without branches. Please see target-mips/translate.c, gen_r6_muldiv. Basically, we check for the offending cases and modify the divisor prior to the division. For unsigned: a / (b == 0 ? 1 : b) For signed: a / ((a == INT_MAX & b == -1) | (b == 0) ? : b) r~