From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sun, 20 May 2018 12:05:32 +0200 Subject: [U-Boot] [PULL] u-boot-socfpga/master Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The following changes since commit 233719cc40b5a00f37949d4173c190edcb4491a1: Merge git://www.denx.de/git/u-boot-marvell (2018-05-17 12:38:30 -0400) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to 00f7ae6138ad8b9d859a70d022161297b1bb8049: arm: dts: socfpga: stratix10: update dtsi and dts (2018-05-18 10:30:48 +0200) ---------------------------------------------------------------- Ben Kalo (1): ARM: socfpga: Fix Documentation errors in scu_registers Ley Foon Tan (6): arm: socfpga: stratix10: Add watchdog and firewall base addresses arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch arm: dts: socfpga: stratix10: update dtsi and dts Marek Vasut (10): fdt: Add another Altera Arria10 clock init compatible ARM: socfpga: Put stack at the end of SRAM ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET ARM: socfpga: Clean up Kconfig entries ARM: socfpga: Convert to DM serial ARM: socfpga: Sync A10 clock manager binding parser ARM: socfpga: Sort the DT Makefile ARM: socfpga: Synchronize Arria10 DTs ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff ARM: socfpga: Repair A10 EMAC reset handling Tien Fong Chee (7): ARM: socfpga: Rename the gen5 sdram driver to more specific name ARM: socfpga: Add DRAM bank size initialization function ARM: socfpga: Add DDR driver for Arria 10 configs: Add DDR Kconfig support for Arria 10 ARM: socfpga: Enable SPL memory allocation ARM: socfpga: Adding clock frequency info for U-Boot ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot arch/arm/Kconfig | 23 +++- arch/arm/dts/Makefile | 8 +- arch/arm/dts/socfpga.dtsi | 2 + arch/arm/dts/socfpga_arria10.dtsi | 594 +++++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------- arch/arm/dts/socfpga_arria10_socdk.dtsi | 167 +++++++++++++++++++++++++++++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 44 ++++---- arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 734 ++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------------------- arch/arm/dts/socfpga_stratix10.dtsi | 22 +++- arch/arm/dts/socfpga_stratix10_socdk.dts | 3 + arch/arm/mach-socfpga/Kconfig | 31 +----- arch/arm/mach-socfpga/Makefile | 7 ++ arch/arm/mach-socfpga/board.c | 18 ++++ arch/arm/mach-socfpga/clock_manager.c | 4 +- arch/arm/mach-socfpga/clock_manager_arria10.c | 158 +++++++++++++++++++--------- arch/arm/mach-socfpga/clock_manager_s10.c | 380 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 11 ++ arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 + arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 2 +- arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 210 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/handoff_s10.h | 34 ++++++ arch/arm/mach-socfpga/include/mach/reset_manager.h | 8 +- arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 116 ++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/scu.h | 4 +- arch/arm/mach-socfpga/include/mach/sdram.h | 434 +-------------------------------------------------------------------------- arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 2 + arch/arm/mach-socfpga/include/mach/sdram_gen5.h | 442 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/system_manager.h | 5 +- arch/arm/mach-socfpga/include/mach/system_manager_s10.h | 176 +++++++++++++++++++++++++++++++ arch/arm/mach-socfpga/misc.c | 69 ++++++++++++ arch/arm/mach-socfpga/misc_arria10.c | 24 +++-- arch/arm/mach-socfpga/misc_gen5.c | 71 +------------ arch/arm/mach-socfpga/reset_manager.c | 13 +++ arch/arm/mach-socfpga/reset_manager_arria10.c | 8 -- arch/arm/mach-socfpga/reset_manager_gen5.c | 9 -- arch/arm/mach-socfpga/reset_manager_s10.c | 140 ++++++++++++++++++++++++ arch/arm/mach-socfpga/spl.c | 11 +- arch/arm/mach-socfpga/system_manager_s10.c | 91 ++++++++++++++++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 ++++++++++ arch/arm/mach-socfpga/wrap_pll_config_s10.c | 59 +++++++++++ drivers/ddr/altera/Kconfig | 2 +- drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_arria10.c | 741 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/ddr/altera/{sdram.c => sdram_gen5.c} | 0 include/configs/socfpga_common.h | 46 ++++---- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + scripts/config_whitelist.txt | 1 - 47 files changed, 3579 insertions(+), 1408 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10_socdk.dtsi create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c create mode 100644 drivers/ddr/altera/sdram_arria10.c rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)