[PATCH 0/4] pinctrl: bcm2835: Add support for all BCM2711 GPIOs

[PATCH 0/4] pinctrl: bcm2835: Add support for all BCM2711 GPIOs

[Stefan Wahren]

The BCM2711 supports 58 GPIOs [1] by using the existing BCM2835 GPIO registers
completely. So there is no need to change the binding.

Patch 1 and 2 prepare the pinctrl driver to be extended to 58 GPIOs in Patch 3.
I didn't want to squash them in order to make review as easy as possible.
The final patch 4 assigns all SoC GPIOs a label as we already did for
the older Raspberry Pi boards.

Changes since RFC:
- avoid using memcpy as suggested by Nicolas
- drop unused entry from GPIO label legend

[1] - https://github.com/raspberrypi/linux/issues/3101#issuecomment-573092294

Stefan Wahren (4):
  pinctrl: bcm2835: Drop unused define
  pinctrl: bcm2835: Refactor platform data
  pinctrl: bcm2835: Add support for all GPIOs on BCM2711
  ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

 arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  73 +++++++++++++++++++++++
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 106 ++++++++++++++++++++++++++--------
 2 files changed, 155 insertions(+), 24 deletions(-)

-- 
2.7.4

[PATCH 0/4] pinctrl: bcm2835: Add support for all BCM2711 GPIOs

[Stefan Wahren]

The BCM2711 supports 58 GPIOs [1] by using the existing BCM2835 GPIO registers
completely. So there is no need to change the binding.

Patch 1 and 2 prepare the pinctrl driver to be extended to 58 GPIOs in Patch 3.
I didn't want to squash them in order to make review as easy as possible.
The final patch 4 assigns all SoC GPIOs a label as we already did for
the older Raspberry Pi boards.

Changes since RFC:
- avoid using memcpy as suggested by Nicolas
- drop unused entry from GPIO label legend

[1] - https://github.com/raspberrypi/linux/issues/3101#issuecomment-573092294

Stefan Wahren (4):
  pinctrl: bcm2835: Drop unused define
  pinctrl: bcm2835: Refactor platform data
  pinctrl: bcm2835: Add support for all GPIOs on BCM2711
  ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

 arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  73 +++++++++++++++++++++++
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 106 ++++++++++++++++++++++++++--------
 2 files changed, 155 insertions(+), 24 deletions(-)

-- 
2.7.4


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[PATCH 1/4] pinctrl: bcm2835: Drop unused define

[Stefan Wahren]

There is no usage for this define, so drop it.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 0de1a3a..3fc2638 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -40,9 +40,6 @@
 #define BCM2835_NUM_BANKS 2
 #define BCM2835_NUM_IRQS  3
 
-#define BCM2835_PIN_BITMAP_SZ \
-	DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
-
 /* GPIO register offsets */
 #define GPFSEL0		0x0	/* Function Select */
 #define GPSET0		0x1c	/* Pin Output Set */
-- 
2.7.4

[PATCH 1/4] pinctrl: bcm2835: Drop unused define

[Stefan Wahren]

There is no usage for this define, so drop it.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 0de1a3a..3fc2638 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -40,9 +40,6 @@
 #define BCM2835_NUM_BANKS 2
 #define BCM2835_NUM_IRQS  3
 
-#define BCM2835_PIN_BITMAP_SZ \
-	DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
-
 /* GPIO register offsets */
 #define GPFSEL0		0x0	/* Function Select */
 #define GPSET0		0x1c	/* Pin Output Set */
-- 
2.7.4


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[PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Stefan Wahren]

This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 +++++++++++++++++++++++++++--------
 1 file changed, 44 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 3fc2638..7f0a9c6 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -82,6 +82,7 @@ struct bcm2835_pinctrl {
 
 	struct pinctrl_dev *pctl_dev;
 	struct gpio_chip gpio_chip;
+	struct pinctrl_desc pctl_desc;
 	struct pinctrl_gpio_range gpio_range;
 
 	raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
@@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
 	.pin_config_set = bcm2711_pinconf_set,
 };
 
-static struct pinctrl_desc bcm2835_pinctrl_desc = {
+static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.name = MODULE_NAME,
 	.pins = bcm2835_gpio_pins,
 	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
@@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.owner = THIS_MODULE,
 };
 
-static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
+static const struct pinctrl_desc bcm2711_pinctrl_desc = {
+	.name = MODULE_NAME,
+	.pins = bcm2835_gpio_pins,
+	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.pctlops = &bcm2835_pctl_ops,
+	.pmxops = &bcm2835_pmx_ops,
+	.confops = &bcm2711_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
 	.name = MODULE_NAME,
 	.npins = BCM2835_NUM_GPIOS,
 };
 
+struct bcm_plat_data {
+	const struct gpio_chip *gpio_chip;
+	const struct pinctrl_desc *pctl_desc;
+	const struct pinctrl_gpio_range *gpio_range;
+};
+
+static const struct bcm_plat_data bcm2835_plat_data = {
+	.gpio_chip = &bcm2835_gpio_chip,
+	.pctl_desc = &bcm2835_pinctrl_desc,
+	.gpio_range = &bcm2835_pinctrl_gpio_range,
+};
+
+static const struct bcm_plat_data bcm2711_plat_data = {
+	.gpio_chip = &bcm2835_gpio_chip,
+	.pctl_desc = &bcm2711_pinctrl_desc,
+	.gpio_range = &bcm2835_pinctrl_gpio_range,
+};
+
 static const struct of_device_id bcm2835_pinctrl_match[] = {
 	{
 		.compatible = "brcm,bcm2835-gpio",
-		.data = &bcm2835_pinconf_ops,
+		.data = &bcm2835_plat_data,
 	},
 	{
 		.compatible = "brcm,bcm2711-gpio",
-		.data = &bcm2711_pinconf_ops,
+		.data = &bcm2711_plat_data,
 	},
 	{}
 };
@@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *np = dev->of_node;
+	const struct bcm_plat_data *pdata;
 	struct bcm2835_pinctrl *pc;
 	struct gpio_irq_chip *girq;
 	struct resource iomem;
@@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 	if (IS_ERR(pc->base))
 		return PTR_ERR(pc->base);
 
-	pc->gpio_chip = bcm2835_gpio_chip;
+	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
+	if (!match)
+		return -EINVAL;
+
+	pdata = match->data;
+
+	pc->gpio_chip = *pdata->gpio_chip;
 	pc->gpio_chip.parent = dev;
 	pc->gpio_chip.of_node = np;
 
@@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
-	if (match) {
-		bcm2835_pinctrl_desc.confops =
-			(const struct pinconf_ops *)match->data;
-	}
-
-	pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc);
+	pc->pctl_desc = *pdata->pctl_desc;
+	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
 	if (IS_ERR(pc->pctl_dev)) {
 		gpiochip_remove(&pc->gpio_chip);
 		return PTR_ERR(pc->pctl_dev);
 	}
 
-	pc->gpio_range = bcm2835_pinctrl_gpio_range;
+	pc->gpio_range = *pdata->gpio_range;
 	pc->gpio_range.base = pc->gpio_chip.base;
 	pc->gpio_range.gc = &pc->gpio_chip;
 	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
-- 
2.7.4

[PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Stefan Wahren]

This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 +++++++++++++++++++++++++++--------
 1 file changed, 44 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 3fc2638..7f0a9c6 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -82,6 +82,7 @@ struct bcm2835_pinctrl {
 
 	struct pinctrl_dev *pctl_dev;
 	struct gpio_chip gpio_chip;
+	struct pinctrl_desc pctl_desc;
 	struct pinctrl_gpio_range gpio_range;
 
 	raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
@@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
 	.pin_config_set = bcm2711_pinconf_set,
 };
 
-static struct pinctrl_desc bcm2835_pinctrl_desc = {
+static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.name = MODULE_NAME,
 	.pins = bcm2835_gpio_pins,
 	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
@@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.owner = THIS_MODULE,
 };
 
-static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
+static const struct pinctrl_desc bcm2711_pinctrl_desc = {
+	.name = MODULE_NAME,
+	.pins = bcm2835_gpio_pins,
+	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.pctlops = &bcm2835_pctl_ops,
+	.pmxops = &bcm2835_pmx_ops,
+	.confops = &bcm2711_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
 	.name = MODULE_NAME,
 	.npins = BCM2835_NUM_GPIOS,
 };
 
+struct bcm_plat_data {
+	const struct gpio_chip *gpio_chip;
+	const struct pinctrl_desc *pctl_desc;
+	const struct pinctrl_gpio_range *gpio_range;
+};
+
+static const struct bcm_plat_data bcm2835_plat_data = {
+	.gpio_chip = &bcm2835_gpio_chip,
+	.pctl_desc = &bcm2835_pinctrl_desc,
+	.gpio_range = &bcm2835_pinctrl_gpio_range,
+};
+
+static const struct bcm_plat_data bcm2711_plat_data = {
+	.gpio_chip = &bcm2835_gpio_chip,
+	.pctl_desc = &bcm2711_pinctrl_desc,
+	.gpio_range = &bcm2835_pinctrl_gpio_range,
+};
+
 static const struct of_device_id bcm2835_pinctrl_match[] = {
 	{
 		.compatible = "brcm,bcm2835-gpio",
-		.data = &bcm2835_pinconf_ops,
+		.data = &bcm2835_plat_data,
 	},
 	{
 		.compatible = "brcm,bcm2711-gpio",
-		.data = &bcm2711_pinconf_ops,
+		.data = &bcm2711_plat_data,
 	},
 	{}
 };
@@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *np = dev->of_node;
+	const struct bcm_plat_data *pdata;
 	struct bcm2835_pinctrl *pc;
 	struct gpio_irq_chip *girq;
 	struct resource iomem;
@@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 	if (IS_ERR(pc->base))
 		return PTR_ERR(pc->base);
 
-	pc->gpio_chip = bcm2835_gpio_chip;
+	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
+	if (!match)
+		return -EINVAL;
+
+	pdata = match->data;
+
+	pc->gpio_chip = *pdata->gpio_chip;
 	pc->gpio_chip.parent = dev;
 	pc->gpio_chip.of_node = np;
 
@@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
-	if (match) {
-		bcm2835_pinctrl_desc.confops =
-			(const struct pinconf_ops *)match->data;
-	}
-
-	pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc);
+	pc->pctl_desc = *pdata->pctl_desc;
+	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
 	if (IS_ERR(pc->pctl_dev)) {
 		gpiochip_remove(&pc->gpio_chip);
 		return PTR_ERR(pc->pctl_dev);
 	}
 
-	pc->gpio_range = bcm2835_pinctrl_gpio_range;
+	pc->gpio_range = *pdata->gpio_range;
 	pc->gpio_range.base = pc->gpio_chip.base;
 	pc->gpio_range.gc = &pc->gpio_chip;
 	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
-- 
2.7.4


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[PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Stefan Wahren]

The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 +++++++++++++++++++++++++++--------
 1 file changed, 42 insertions(+), 12 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 7f0a9c6..061e70e 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -37,6 +37,7 @@
 
 #define MODULE_NAME "pinctrl-bcm2835"
 #define BCM2835_NUM_GPIOS 54
+#define BCM2711_NUM_GPIOS 58
 #define BCM2835_NUM_BANKS 2
 #define BCM2835_NUM_IRQS  3
 
@@ -78,7 +79,7 @@ struct bcm2835_pinctrl {
 
 	/* note: locking assumes each bank will have its own unsigned long */
 	unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
-	unsigned int irq_type[BCM2835_NUM_GPIOS];
+	unsigned int irq_type[BCM2711_NUM_GPIOS];
 
 	struct pinctrl_dev *pctl_dev;
 	struct gpio_chip gpio_chip;
@@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
 	BCM2835_GPIO_PIN(51),
 	BCM2835_GPIO_PIN(52),
 	BCM2835_GPIO_PIN(53),
+	BCM2835_GPIO_PIN(54),
+	BCM2835_GPIO_PIN(55),
+	BCM2835_GPIO_PIN(56),
+	BCM2835_GPIO_PIN(57),
 };
 
 /* one pin per group */
@@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_groups[] = {
 	"gpio51",
 	"gpio52",
 	"gpio53",
+	"gpio54",
+	"gpio55",
+	"gpio56",
+	"gpio57",
 };
 
 enum bcm2835_fsel {
@@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gpio_chip = {
 	.can_sleep = false,
 };
 
+static const struct gpio_chip bcm2711_gpio_chip = {
+	.label = "pinctrl-bcm2711",
+	.owner = THIS_MODULE,
+	.request = gpiochip_generic_request,
+	.free = gpiochip_generic_free,
+	.direction_input = bcm2835_gpio_direction_input,
+	.direction_output = bcm2835_gpio_direction_output,
+	.get_direction = bcm2835_gpio_get_direction,
+	.get = bcm2835_gpio_get,
+	.set = bcm2835_gpio_set,
+	.set_config = gpiochip_generic_config,
+	.base = -1,
+	.ngpio = BCM2711_NUM_GPIOS,
+	.can_sleep = false,
+};
+
 static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,
 					 unsigned int bank, u32 mask)
 {
@@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc)
 		bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000);
 		bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff);
 		break;
-	case 2: /* IRQ2 covers GPIOs 46-53 */
+	case 2: /* IRQ2 covers GPIOs 46-57 */
 		bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000);
 		break;
 	}
@@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_chip = {
 
 static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
 {
-	return ARRAY_SIZE(bcm2835_gpio_groups);
+	return BCM2835_NUM_GPIOS;
 }
 
 static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
@@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
 		err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
 		if (err)
 			goto out;
-		if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
+		if (pin >= pc->pctl_desc.npins) {
 			dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n",
 				np, pin);
 			err = -EINVAL;
@@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev,
 {
 	/* every pin can do every function */
 	*groups = bcm2835_gpio_groups;
-	*num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
+	*num_groups = BCM2835_NUM_GPIOS;
 
 	return 0;
 }
@@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
 static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.name = MODULE_NAME,
 	.pins = bcm2835_gpio_pins,
-	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.npins = BCM2835_NUM_GPIOS,
 	.pctlops = &bcm2835_pctl_ops,
 	.pmxops = &bcm2835_pmx_ops,
 	.confops = &bcm2835_pinconf_ops,
@@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 };
 
 static const struct pinctrl_desc bcm2711_pinctrl_desc = {
-	.name = MODULE_NAME,
+	.name = "pinctrl-bcm2711",
 	.pins = bcm2835_gpio_pins,
-	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.npins = BCM2711_NUM_GPIOS,
 	.pctlops = &bcm2835_pctl_ops,
 	.pmxops = &bcm2835_pmx_ops,
 	.confops = &bcm2711_pinconf_ops,
@@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
 	.npins = BCM2835_NUM_GPIOS,
 };
 
+static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = {
+	.name = "pinctrl-bcm2711",
+	.npins = BCM2711_NUM_GPIOS,
+};
+
 struct bcm_plat_data {
 	const struct gpio_chip *gpio_chip;
 	const struct pinctrl_desc *pctl_desc;
@@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm2835_plat_data = {
 };
 
 static const struct bcm_plat_data bcm2711_plat_data = {
-	.gpio_chip = &bcm2835_gpio_chip,
+	.gpio_chip = &bcm2711_gpio_chip,
 	.pctl_desc = &bcm2711_pinctrl_desc,
-	.gpio_range = &bcm2835_pinctrl_gpio_range,
+	.gpio_range = &bcm2711_pinctrl_gpio_range,
 };
 
 static const struct of_device_id bcm2835_pinctrl_match[] = {
@@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 	int err, i;
 	const struct of_device_id *match;
 
-	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
-	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
 
 	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
 	if (!pc)
-- 
2.7.4

[PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Stefan Wahren]

The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 +++++++++++++++++++++++++++--------
 1 file changed, 42 insertions(+), 12 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 7f0a9c6..061e70e 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -37,6 +37,7 @@
 
 #define MODULE_NAME "pinctrl-bcm2835"
 #define BCM2835_NUM_GPIOS 54
+#define BCM2711_NUM_GPIOS 58
 #define BCM2835_NUM_BANKS 2
 #define BCM2835_NUM_IRQS  3
 
@@ -78,7 +79,7 @@ struct bcm2835_pinctrl {
 
 	/* note: locking assumes each bank will have its own unsigned long */
 	unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
-	unsigned int irq_type[BCM2835_NUM_GPIOS];
+	unsigned int irq_type[BCM2711_NUM_GPIOS];
 
 	struct pinctrl_dev *pctl_dev;
 	struct gpio_chip gpio_chip;
@@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
 	BCM2835_GPIO_PIN(51),
 	BCM2835_GPIO_PIN(52),
 	BCM2835_GPIO_PIN(53),
+	BCM2835_GPIO_PIN(54),
+	BCM2835_GPIO_PIN(55),
+	BCM2835_GPIO_PIN(56),
+	BCM2835_GPIO_PIN(57),
 };
 
 /* one pin per group */
@@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_groups[] = {
 	"gpio51",
 	"gpio52",
 	"gpio53",
+	"gpio54",
+	"gpio55",
+	"gpio56",
+	"gpio57",
 };
 
 enum bcm2835_fsel {
@@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gpio_chip = {
 	.can_sleep = false,
 };
 
+static const struct gpio_chip bcm2711_gpio_chip = {
+	.label = "pinctrl-bcm2711",
+	.owner = THIS_MODULE,
+	.request = gpiochip_generic_request,
+	.free = gpiochip_generic_free,
+	.direction_input = bcm2835_gpio_direction_input,
+	.direction_output = bcm2835_gpio_direction_output,
+	.get_direction = bcm2835_gpio_get_direction,
+	.get = bcm2835_gpio_get,
+	.set = bcm2835_gpio_set,
+	.set_config = gpiochip_generic_config,
+	.base = -1,
+	.ngpio = BCM2711_NUM_GPIOS,
+	.can_sleep = false,
+};
+
 static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,
 					 unsigned int bank, u32 mask)
 {
@@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc)
 		bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000);
 		bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff);
 		break;
-	case 2: /* IRQ2 covers GPIOs 46-53 */
+	case 2: /* IRQ2 covers GPIOs 46-57 */
 		bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000);
 		break;
 	}
@@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_chip = {
 
 static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
 {
-	return ARRAY_SIZE(bcm2835_gpio_groups);
+	return BCM2835_NUM_GPIOS;
 }
 
 static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
@@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
 		err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
 		if (err)
 			goto out;
-		if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
+		if (pin >= pc->pctl_desc.npins) {
 			dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n",
 				np, pin);
 			err = -EINVAL;
@@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev,
 {
 	/* every pin can do every function */
 	*groups = bcm2835_gpio_groups;
-	*num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
+	*num_groups = BCM2835_NUM_GPIOS;
 
 	return 0;
 }
@@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
 static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 	.name = MODULE_NAME,
 	.pins = bcm2835_gpio_pins,
-	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.npins = BCM2835_NUM_GPIOS,
 	.pctlops = &bcm2835_pctl_ops,
 	.pmxops = &bcm2835_pmx_ops,
 	.confops = &bcm2835_pinconf_ops,
@@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835_pinctrl_desc = {
 };
 
 static const struct pinctrl_desc bcm2711_pinctrl_desc = {
-	.name = MODULE_NAME,
+	.name = "pinctrl-bcm2711",
 	.pins = bcm2835_gpio_pins,
-	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.npins = BCM2711_NUM_GPIOS,
 	.pctlops = &bcm2835_pctl_ops,
 	.pmxops = &bcm2835_pmx_ops,
 	.confops = &bcm2711_pinconf_ops,
@@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
 	.npins = BCM2835_NUM_GPIOS,
 };
 
+static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = {
+	.name = "pinctrl-bcm2711",
+	.npins = BCM2711_NUM_GPIOS,
+};
+
 struct bcm_plat_data {
 	const struct gpio_chip *gpio_chip;
 	const struct pinctrl_desc *pctl_desc;
@@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm2835_plat_data = {
 };
 
 static const struct bcm_plat_data bcm2711_plat_data = {
-	.gpio_chip = &bcm2835_gpio_chip,
+	.gpio_chip = &bcm2711_gpio_chip,
 	.pctl_desc = &bcm2711_pinctrl_desc,
-	.gpio_range = &bcm2835_pinctrl_gpio_range,
+	.gpio_range = &bcm2711_pinctrl_gpio_range,
 };
 
 static const struct of_device_id bcm2835_pinctrl_match[] = {
@@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
 	int err, i;
 	const struct of_device_id *match;
 
-	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
-	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
 
 	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
 	if (!pc)
-- 
2.7.4


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[PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Stefan Wahren]

This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 73 +++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
index 1b5a835..cb33852 100644
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -71,6 +71,79 @@
 	};
 };
 
+&gpio {
+	/*
+	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
+	 * the official GPU firmware DT blob.
+	 *
+	 * Legend:
+	 * "FOO" = GPIO line named "FOO" on the schematic
+	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
+	 */
+	gpio-line-names = "ID_SDA",
+			  "ID_SCL",
+			  "SDA1",
+			  "SCL1",
+			  "GPIO_GCLK",
+			  "GPIO5",
+			  "GPIO6",
+			  "SPI_CE1_N",
+			  "SPI_CE0_N",
+			  "SPI_MISO",
+			  "SPI_MOSI",
+			  "SPI_SCLK",
+			  "GPIO12",
+			  "GPIO13",
+			  /* Serial port */
+			  "TXD1",
+			  "RXD1",
+			  "GPIO16",
+			  "GPIO17",
+			  "GPIO18",
+			  "GPIO19",
+			  "GPIO20",
+			  "GPIO21",
+			  "GPIO22",
+			  "GPIO23",
+			  "GPIO24",
+			  "GPIO25",
+			  "GPIO26",
+			  "GPIO27",
+			  "RGMII_MDIO",
+			  "RGMIO_MDC",
+			  /* Used by BT module */
+			  "CTS0",
+			  "RTS0",
+			  "TXD0",
+			  "RXD0",
+			  /* Used by Wifi */
+			  "SD1_CLK",
+			  "SD1_CMD",
+			  "SD1_DATA0",
+			  "SD1_DATA1",
+			  "SD1_DATA2",
+			  "SD1_DATA3",
+			  /* Shared with SPI flash */
+			  "PWM0_MISO",
+			  "PWM1_MOSI",
+			  "STATUS_LED_G_CLK",
+			  "SPIFLASH_CE_N",
+			  "SDA0",
+			  "SCL0",
+			  "RGMII_RXCLK",
+			  "RGMII_RXCTL",
+			  "RGMII_RXD0",
+			  "RGMII_RXD1",
+			  "RGMII_RXD2",
+			  "RGMII_RXD3",
+			  "RGMII_TXCLK",
+			  "RGMII_TXCTL",
+			  "RGMII_TXD0",
+			  "RGMII_TXD1",
+			  "RGMII_TXD2",
+			  "RGMII_TXD3";
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
-- 
2.7.4

[PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Stefan Wahren]

This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 73 +++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
index 1b5a835..cb33852 100644
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -71,6 +71,79 @@
 	};
 };
 
+&gpio {
+	/*
+	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
+	 * the official GPU firmware DT blob.
+	 *
+	 * Legend:
+	 * "FOO" = GPIO line named "FOO" on the schematic
+	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
+	 */
+	gpio-line-names = "ID_SDA",
+			  "ID_SCL",
+			  "SDA1",
+			  "SCL1",
+			  "GPIO_GCLK",
+			  "GPIO5",
+			  "GPIO6",
+			  "SPI_CE1_N",
+			  "SPI_CE0_N",
+			  "SPI_MISO",
+			  "SPI_MOSI",
+			  "SPI_SCLK",
+			  "GPIO12",
+			  "GPIO13",
+			  /* Serial port */
+			  "TXD1",
+			  "RXD1",
+			  "GPIO16",
+			  "GPIO17",
+			  "GPIO18",
+			  "GPIO19",
+			  "GPIO20",
+			  "GPIO21",
+			  "GPIO22",
+			  "GPIO23",
+			  "GPIO24",
+			  "GPIO25",
+			  "GPIO26",
+			  "GPIO27",
+			  "RGMII_MDIO",
+			  "RGMIO_MDC",
+			  /* Used by BT module */
+			  "CTS0",
+			  "RTS0",
+			  "TXD0",
+			  "RXD0",
+			  /* Used by Wifi */
+			  "SD1_CLK",
+			  "SD1_CMD",
+			  "SD1_DATA0",
+			  "SD1_DATA1",
+			  "SD1_DATA2",
+			  "SD1_DATA3",
+			  /* Shared with SPI flash */
+			  "PWM0_MISO",
+			  "PWM1_MOSI",
+			  "STATUS_LED_G_CLK",
+			  "SPIFLASH_CE_N",
+			  "SDA0",
+			  "SCL0",
+			  "RGMII_RXCLK",
+			  "RGMII_RXCTL",
+			  "RGMII_RXD0",
+			  "RGMII_RXD1",
+			  "RGMII_RXD2",
+			  "RGMII_RXD3",
+			  "RGMII_TXCLK",
+			  "RGMII_TXCTL",
+			  "RGMII_TXD0",
+			  "RGMII_TXD1",
+			  "RGMII_TXD2",
+			  "RGMII_TXD3";
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
-- 
2.7.4


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Re: [PATCH 1/4] pinctrl: bcm2835: Drop unused define

[Nicolas Saenz Julienne]

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On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> There is no usage for this define, so drop it.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 0de1a3a..3fc2638 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -40,9 +40,6 @@
>  #define BCM2835_NUM_BANKS 2
>  #define BCM2835_NUM_IRQS  3
>  
> -#define BCM2835_PIN_BITMAP_SZ \
> -	DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
> -
>  /* GPIO register offsets */
>  #define GPFSEL0		0x0	/* Function Select */
>  #define GPSET0		0x1c	/* Pin Output Set */


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Re: [PATCH 1/4] pinctrl: bcm2835: Drop unused define

[Nicolas Saenz Julienne]

[-- Attachment #1.1: Type: text/plain, Size: 887 bytes --]

On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> There is no usage for this define, so drop it.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 0de1a3a..3fc2638 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -40,9 +40,6 @@
>  #define BCM2835_NUM_BANKS 2
>  #define BCM2835_NUM_IRQS  3
>  
> -#define BCM2835_PIN_BITMAP_SZ \
> -	DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
> -
>  /* GPIO register offsets */
>  #define GPFSEL0		0x0	/* Function Select */
>  #define GPSET0		0x1c	/* Pin Output Set */


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Re: [PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Nicolas Saenz Julienne]

[-- Attachment #1: Type: text/plain, Size: 4465 bytes --]

On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> This prepares the platform data to be easier to extend for more GPIOs.
> Except of this there is no functional change.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 +++++++++++++++++++++++++++-------
> -
>  1 file changed, 44 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 3fc2638..7f0a9c6 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -82,6 +82,7 @@ struct bcm2835_pinctrl {
>  
>  	struct pinctrl_dev *pctl_dev;
>  	struct gpio_chip gpio_chip;
> +	struct pinctrl_desc pctl_desc;
>  	struct pinctrl_gpio_range gpio_range;
>  
>  	raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
> @@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
>  	.pin_config_set = bcm2711_pinconf_set,
>  };
>  
> -static struct pinctrl_desc bcm2835_pinctrl_desc = {
> +static const struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.name = MODULE_NAME,
>  	.pins = bcm2835_gpio_pins,
>  	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> @@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.owner = THIS_MODULE,
>  };
>  
> -static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
> +static const struct pinctrl_desc bcm2711_pinctrl_desc = {
> +	.name = MODULE_NAME,
> +	.pins = bcm2835_gpio_pins,
> +	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.pctlops = &bcm2835_pctl_ops,
> +	.pmxops = &bcm2835_pmx_ops,
> +	.confops = &bcm2711_pinconf_ops,
> +	.owner = THIS_MODULE,
> +};
> +
> +static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
>  	.name = MODULE_NAME,
>  	.npins = BCM2835_NUM_GPIOS,
>  };
>  
> +struct bcm_plat_data {
> +	const struct gpio_chip *gpio_chip;
> +	const struct pinctrl_desc *pctl_desc;
> +	const struct pinctrl_gpio_range *gpio_range;
> +};
> +
> +static const struct bcm_plat_data bcm2835_plat_data = {
> +	.gpio_chip = &bcm2835_gpio_chip,
> +	.pctl_desc = &bcm2835_pinctrl_desc,
> +	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +};
> +
> +static const struct bcm_plat_data bcm2711_plat_data = {
> +	.gpio_chip = &bcm2835_gpio_chip,
> +	.pctl_desc = &bcm2711_pinctrl_desc,
> +	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +};
> +
>  static const struct of_device_id bcm2835_pinctrl_match[] = {
>  	{
>  		.compatible = "brcm,bcm2835-gpio",
> -		.data = &bcm2835_pinconf_ops,
> +		.data = &bcm2835_plat_data,
>  	},
>  	{
>  		.compatible = "brcm,bcm2711-gpio",
> -		.data = &bcm2711_pinconf_ops,
> +		.data = &bcm2711_plat_data,
>  	},
>  	{}
>  };
> @@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  {
>  	struct device *dev = &pdev->dev;
>  	struct device_node *np = dev->of_node;
> +	const struct bcm_plat_data *pdata;
>  	struct bcm2835_pinctrl *pc;
>  	struct gpio_irq_chip *girq;
>  	struct resource iomem;
> @@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  	if (IS_ERR(pc->base))
>  		return PTR_ERR(pc->base);
>  
> -	pc->gpio_chip = bcm2835_gpio_chip;
> +	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
> +	if (!match)
> +		return -EINVAL;
> +
> +	pdata = match->data;
> +
> +	pc->gpio_chip = *pdata->gpio_chip;
>  	pc->gpio_chip.parent = dev;
>  	pc->gpio_chip.of_node = np;
>  
> @@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct
> platform_device *pdev)
>  		return err;
>  	}
>  
> -	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
> -	if (match) {
> -		bcm2835_pinctrl_desc.confops =
> -			(const struct pinconf_ops *)match->data;
> -	}
> -
> -	pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc);
> +	pc->pctl_desc = *pdata->pctl_desc;
> +	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
>  	if (IS_ERR(pc->pctl_dev)) {
>  		gpiochip_remove(&pc->gpio_chip);
>  		return PTR_ERR(pc->pctl_dev);
>  	}
>  
> -	pc->gpio_range = bcm2835_pinctrl_gpio_range;
> +	pc->gpio_range = *pdata->gpio_range;
>  	pc->gpio_range.base = pc->gpio_chip.base;
>  	pc->gpio_range.gc = &pc->gpio_chip;
>  	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);


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Re: [PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Nicolas Saenz Julienne]

[-- Attachment #1.1: Type: text/plain, Size: 4465 bytes --]

On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> This prepares the platform data to be easier to extend for more GPIOs.
> Except of this there is no functional change.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 +++++++++++++++++++++++++++-------
> -
>  1 file changed, 44 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 3fc2638..7f0a9c6 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -82,6 +82,7 @@ struct bcm2835_pinctrl {
>  
>  	struct pinctrl_dev *pctl_dev;
>  	struct gpio_chip gpio_chip;
> +	struct pinctrl_desc pctl_desc;
>  	struct pinctrl_gpio_range gpio_range;
>  
>  	raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
> @@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
>  	.pin_config_set = bcm2711_pinconf_set,
>  };
>  
> -static struct pinctrl_desc bcm2835_pinctrl_desc = {
> +static const struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.name = MODULE_NAME,
>  	.pins = bcm2835_gpio_pins,
>  	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> @@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.owner = THIS_MODULE,
>  };
>  
> -static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
> +static const struct pinctrl_desc bcm2711_pinctrl_desc = {
> +	.name = MODULE_NAME,
> +	.pins = bcm2835_gpio_pins,
> +	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.pctlops = &bcm2835_pctl_ops,
> +	.pmxops = &bcm2835_pmx_ops,
> +	.confops = &bcm2711_pinconf_ops,
> +	.owner = THIS_MODULE,
> +};
> +
> +static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
>  	.name = MODULE_NAME,
>  	.npins = BCM2835_NUM_GPIOS,
>  };
>  
> +struct bcm_plat_data {
> +	const struct gpio_chip *gpio_chip;
> +	const struct pinctrl_desc *pctl_desc;
> +	const struct pinctrl_gpio_range *gpio_range;
> +};
> +
> +static const struct bcm_plat_data bcm2835_plat_data = {
> +	.gpio_chip = &bcm2835_gpio_chip,
> +	.pctl_desc = &bcm2835_pinctrl_desc,
> +	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +};
> +
> +static const struct bcm_plat_data bcm2711_plat_data = {
> +	.gpio_chip = &bcm2835_gpio_chip,
> +	.pctl_desc = &bcm2711_pinctrl_desc,
> +	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +};
> +
>  static const struct of_device_id bcm2835_pinctrl_match[] = {
>  	{
>  		.compatible = "brcm,bcm2835-gpio",
> -		.data = &bcm2835_pinconf_ops,
> +		.data = &bcm2835_plat_data,
>  	},
>  	{
>  		.compatible = "brcm,bcm2711-gpio",
> -		.data = &bcm2711_pinconf_ops,
> +		.data = &bcm2711_plat_data,
>  	},
>  	{}
>  };
> @@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  {
>  	struct device *dev = &pdev->dev;
>  	struct device_node *np = dev->of_node;
> +	const struct bcm_plat_data *pdata;
>  	struct bcm2835_pinctrl *pc;
>  	struct gpio_irq_chip *girq;
>  	struct resource iomem;
> @@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  	if (IS_ERR(pc->base))
>  		return PTR_ERR(pc->base);
>  
> -	pc->gpio_chip = bcm2835_gpio_chip;
> +	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
> +	if (!match)
> +		return -EINVAL;
> +
> +	pdata = match->data;
> +
> +	pc->gpio_chip = *pdata->gpio_chip;
>  	pc->gpio_chip.parent = dev;
>  	pc->gpio_chip.of_node = np;
>  
> @@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct
> platform_device *pdev)
>  		return err;
>  	}
>  
> -	match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
> -	if (match) {
> -		bcm2835_pinctrl_desc.confops =
> -			(const struct pinconf_ops *)match->data;
> -	}
> -
> -	pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc);
> +	pc->pctl_desc = *pdata->pctl_desc;
> +	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
>  	if (IS_ERR(pc->pctl_dev)) {
>  		gpiochip_remove(&pc->gpio_chip);
>  		return PTR_ERR(pc->pctl_dev);
>  	}
>  
> -	pc->gpio_range = bcm2835_pinctrl_gpio_range;
> +	pc->gpio_range = *pdata->gpio_range;
>  	pc->gpio_range.base = pc->gpio_chip.base;
>  	pc->gpio_range.gc = &pc->gpio_chip;
>  	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);


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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Nicolas Saenz Julienne]

[-- Attachment #1: Type: text/plain, Size: 6057 bytes --]

On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 +++++++++++++++++++++++++++-------
> -
>  1 file changed, 42 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 7f0a9c6..061e70e 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -37,6 +37,7 @@
>  
>  #define MODULE_NAME "pinctrl-bcm2835"
>  #define BCM2835_NUM_GPIOS 54
> +#define BCM2711_NUM_GPIOS 58
>  #define BCM2835_NUM_BANKS 2
>  #define BCM2835_NUM_IRQS  3
>  
> @@ -78,7 +79,7 @@ struct bcm2835_pinctrl {
>  
>  	/* note: locking assumes each bank will have its own unsigned long */
>  	unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
> -	unsigned int irq_type[BCM2835_NUM_GPIOS];
> +	unsigned int irq_type[BCM2711_NUM_GPIOS];
>  
>  	struct pinctrl_dev *pctl_dev;
>  	struct gpio_chip gpio_chip;
> @@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
>  	BCM2835_GPIO_PIN(51),
>  	BCM2835_GPIO_PIN(52),
>  	BCM2835_GPIO_PIN(53),
> +	BCM2835_GPIO_PIN(54),
> +	BCM2835_GPIO_PIN(55),
> +	BCM2835_GPIO_PIN(56),
> +	BCM2835_GPIO_PIN(57),
>  };
>  
>  /* one pin per group */
> @@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_groups[] = {
>  	"gpio51",
>  	"gpio52",
>  	"gpio53",
> +	"gpio54",
> +	"gpio55",
> +	"gpio56",
> +	"gpio57",
>  };
>  
>  enum bcm2835_fsel {
> @@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gpio_chip = {
>  	.can_sleep = false,
>  };
>  
> +static const struct gpio_chip bcm2711_gpio_chip = {
> +	.label = "pinctrl-bcm2711",
> +	.owner = THIS_MODULE,
> +	.request = gpiochip_generic_request,
> +	.free = gpiochip_generic_free,
> +	.direction_input = bcm2835_gpio_direction_input,
> +	.direction_output = bcm2835_gpio_direction_output,
> +	.get_direction = bcm2835_gpio_get_direction,
> +	.get = bcm2835_gpio_get,
> +	.set = bcm2835_gpio_set,
> +	.set_config = gpiochip_generic_config,
> +	.base = -1,
> +	.ngpio = BCM2711_NUM_GPIOS,
> +	.can_sleep = false,
> +};
> +
>  static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,
>  					 unsigned int bank, u32 mask)
>  {
> @@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(struct irq_desc
> *desc)
>  		bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000);
>  		bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff);
>  		break;
> -	case 2: /* IRQ2 covers GPIOs 46-53 */
> +	case 2: /* IRQ2 covers GPIOs 46-57 */
>  		bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000);
>  		break;
>  	}
> @@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_chip = {
>  
>  static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
>  {
> -	return ARRAY_SIZE(bcm2835_gpio_groups);
> +	return BCM2835_NUM_GPIOS;
>  }
>  
>  static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
> @@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev
> *pctldev,
>  		err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
>  		if (err)
>  			goto out;
> -		if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
> +		if (pin >= pc->pctl_desc.npins) {
>  			dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n",
>  				np, pin);
>  			err = -EINVAL;
> @@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_groups(struct
> pinctrl_dev *pctldev,
>  {
>  	/* every pin can do every function */
>  	*groups = bcm2835_gpio_groups;
> -	*num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
> +	*num_groups = BCM2835_NUM_GPIOS;
>  
>  	return 0;
>  }
> @@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
>  static const struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.name = MODULE_NAME,
>  	.pins = bcm2835_gpio_pins,
> -	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.npins = BCM2835_NUM_GPIOS,
>  	.pctlops = &bcm2835_pctl_ops,
>  	.pmxops = &bcm2835_pmx_ops,
>  	.confops = &bcm2835_pinconf_ops,
> @@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835_pinctrl_desc =
> {
>  };
>  
>  static const struct pinctrl_desc bcm2711_pinctrl_desc = {
> -	.name = MODULE_NAME,
> +	.name = "pinctrl-bcm2711",
>  	.pins = bcm2835_gpio_pins,
> -	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.npins = BCM2711_NUM_GPIOS,
>  	.pctlops = &bcm2835_pctl_ops,
>  	.pmxops = &bcm2835_pmx_ops,
>  	.confops = &bcm2711_pinconf_ops,
> @@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range
> bcm2835_pinctrl_gpio_range = {
>  	.npins = BCM2835_NUM_GPIOS,
>  };
>  
> +static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = {
> +	.name = "pinctrl-bcm2711",
> +	.npins = BCM2711_NUM_GPIOS,
> +};
> +
>  struct bcm_plat_data {
>  	const struct gpio_chip *gpio_chip;
>  	const struct pinctrl_desc *pctl_desc;
> @@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm2835_plat_data = {
>  };
>  
>  static const struct bcm_plat_data bcm2711_plat_data = {
> -	.gpio_chip = &bcm2835_gpio_chip,
> +	.gpio_chip = &bcm2711_gpio_chip,
>  	.pctl_desc = &bcm2711_pinctrl_desc,
> -	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +	.gpio_range = &bcm2711_pinctrl_gpio_range,
>  };
>  
>  static const struct of_device_id bcm2835_pinctrl_match[] = {
> @@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  	int err, i;
>  	const struct of_device_id *match;
>  
> -	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
> -	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
> +	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
> +	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
>  
>  	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
>  	if (!pc)


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Re: [PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Nicolas Saenz Julienne]

[-- Attachment #1.1: Type: text/plain, Size: 6057 bytes --]

On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Thanks!

>  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 +++++++++++++++++++++++++++-------
> -
>  1 file changed, 42 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> index 7f0a9c6..061e70e 100644
> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
> @@ -37,6 +37,7 @@
>  
>  #define MODULE_NAME "pinctrl-bcm2835"
>  #define BCM2835_NUM_GPIOS 54
> +#define BCM2711_NUM_GPIOS 58
>  #define BCM2835_NUM_BANKS 2
>  #define BCM2835_NUM_IRQS  3
>  
> @@ -78,7 +79,7 @@ struct bcm2835_pinctrl {
>  
>  	/* note: locking assumes each bank will have its own unsigned long */
>  	unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
> -	unsigned int irq_type[BCM2835_NUM_GPIOS];
> +	unsigned int irq_type[BCM2711_NUM_GPIOS];
>  
>  	struct pinctrl_dev *pctl_dev;
>  	struct gpio_chip gpio_chip;
> @@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
>  	BCM2835_GPIO_PIN(51),
>  	BCM2835_GPIO_PIN(52),
>  	BCM2835_GPIO_PIN(53),
> +	BCM2835_GPIO_PIN(54),
> +	BCM2835_GPIO_PIN(55),
> +	BCM2835_GPIO_PIN(56),
> +	BCM2835_GPIO_PIN(57),
>  };
>  
>  /* one pin per group */
> @@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_groups[] = {
>  	"gpio51",
>  	"gpio52",
>  	"gpio53",
> +	"gpio54",
> +	"gpio55",
> +	"gpio56",
> +	"gpio57",
>  };
>  
>  enum bcm2835_fsel {
> @@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gpio_chip = {
>  	.can_sleep = false,
>  };
>  
> +static const struct gpio_chip bcm2711_gpio_chip = {
> +	.label = "pinctrl-bcm2711",
> +	.owner = THIS_MODULE,
> +	.request = gpiochip_generic_request,
> +	.free = gpiochip_generic_free,
> +	.direction_input = bcm2835_gpio_direction_input,
> +	.direction_output = bcm2835_gpio_direction_output,
> +	.get_direction = bcm2835_gpio_get_direction,
> +	.get = bcm2835_gpio_get,
> +	.set = bcm2835_gpio_set,
> +	.set_config = gpiochip_generic_config,
> +	.base = -1,
> +	.ngpio = BCM2711_NUM_GPIOS,
> +	.can_sleep = false,
> +};
> +
>  static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,
>  					 unsigned int bank, u32 mask)
>  {
> @@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(struct irq_desc
> *desc)
>  		bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000);
>  		bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff);
>  		break;
> -	case 2: /* IRQ2 covers GPIOs 46-53 */
> +	case 2: /* IRQ2 covers GPIOs 46-57 */
>  		bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000);
>  		break;
>  	}
> @@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_chip = {
>  
>  static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
>  {
> -	return ARRAY_SIZE(bcm2835_gpio_groups);
> +	return BCM2835_NUM_GPIOS;
>  }
>  
>  static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
> @@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev
> *pctldev,
>  		err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
>  		if (err)
>  			goto out;
> -		if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
> +		if (pin >= pc->pctl_desc.npins) {
>  			dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n",
>  				np, pin);
>  			err = -EINVAL;
> @@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_groups(struct
> pinctrl_dev *pctldev,
>  {
>  	/* every pin can do every function */
>  	*groups = bcm2835_gpio_groups;
> -	*num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
> +	*num_groups = BCM2835_NUM_GPIOS;
>  
>  	return 0;
>  }
> @@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = {
>  static const struct pinctrl_desc bcm2835_pinctrl_desc = {
>  	.name = MODULE_NAME,
>  	.pins = bcm2835_gpio_pins,
> -	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.npins = BCM2835_NUM_GPIOS,
>  	.pctlops = &bcm2835_pctl_ops,
>  	.pmxops = &bcm2835_pmx_ops,
>  	.confops = &bcm2835_pinconf_ops,
> @@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835_pinctrl_desc =
> {
>  };
>  
>  static const struct pinctrl_desc bcm2711_pinctrl_desc = {
> -	.name = MODULE_NAME,
> +	.name = "pinctrl-bcm2711",
>  	.pins = bcm2835_gpio_pins,
> -	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
> +	.npins = BCM2711_NUM_GPIOS,
>  	.pctlops = &bcm2835_pctl_ops,
>  	.pmxops = &bcm2835_pmx_ops,
>  	.confops = &bcm2711_pinconf_ops,
> @@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range
> bcm2835_pinctrl_gpio_range = {
>  	.npins = BCM2835_NUM_GPIOS,
>  };
>  
> +static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = {
> +	.name = "pinctrl-bcm2711",
> +	.npins = BCM2711_NUM_GPIOS,
> +};
> +
>  struct bcm_plat_data {
>  	const struct gpio_chip *gpio_chip;
>  	const struct pinctrl_desc *pctl_desc;
> @@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm2835_plat_data = {
>  };
>  
>  static const struct bcm_plat_data bcm2711_plat_data = {
> -	.gpio_chip = &bcm2835_gpio_chip,
> +	.gpio_chip = &bcm2711_gpio_chip,
>  	.pctl_desc = &bcm2711_pinctrl_desc,
> -	.gpio_range = &bcm2835_pinctrl_gpio_range,
> +	.gpio_range = &bcm2711_pinctrl_gpio_range,
>  };
>  
>  static const struct of_device_id bcm2835_pinctrl_match[] = {
> @@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct platform_device
> *pdev)
>  	int err, i;
>  	const struct of_device_id *match;
>  
> -	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
> -	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
> +	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
> +	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
>  
>  	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
>  	if (!pc)


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Re: [PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> This prepares the platform data to be easier to extend for more GPIOs.
> Except of this there is no functional change.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with Nicolas' Review tag.

Yours,
Linus Walleij

Re: [PATCH 2/4] pinctrl: bcm2835: Refactor platform data

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> This prepares the platform data to be easier to extend for more GPIOs.
> Except of this there is no functional change.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with Nicolas' Review tag.

Yours,
Linus Walleij

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Re: [PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with Nicolas' review tag!

Yours,
Linus Walleij

Re: [PATCH 3/4] pinctrl: bcm2835: Add support for all GPIOs on BCM2711

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with Nicolas' review tag!

Yours,
Linus Walleij

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Re: [PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through the ARM SoC tree.

Yours,
Linus Walleij

Re: [PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Linus Walleij]

On Sat, Feb 8, 2020 at 2:03 PM Stefan Wahren <stefan.wahren@i2se.com> wrote:

> This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through the ARM SoC tree.

Yours,
Linus Walleij

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Re: [PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Nicolas Saenz Julienne]

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On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with linus' Review tag.

Thanks!
Nicolas


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Re: [PATCH 4/4] ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

[Nicolas Saenz Julienne]

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On Sat, 2020-02-08 at 14:02 +0100, Stefan Wahren wrote:
> This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Patch applied with linus' Review tag.

Thanks!
Nicolas


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