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From: Matt Redfearn <matt.redfearn@imgtec.com>
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Date: Wed, 27 Sep 2017 09:27:16 +0100
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Subject: Re: [Qemu-devel] [PATCH] PCI: PCIe access should always be little
 endian
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To: Marcel Apfelbaum <marcel@redhat.com>, "Michael S . Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org, Yongbok Kim <Yongbok.Kim@imgtec.com>

ping?


On 16/08/17 11:25, Marcel Apfelbaum wrote:
> On 15/08/2017 17:44, Matt Redfearn wrote:
>> PCIe busses are always little endian, so set the endianness of the
>> memory region to little endian rather than native such that operations
>> work as expected on big endian targets.
>>
>> Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
>
>
> Hi Matt,
> Thanks for the patch.
>
>> ---
>>
>>   hw/pci/pcie_host.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
>> index dcebf57ed45e..553db56778b6 100644
>> --- a/hw/pci/pcie_host.c
>> +++ b/hw/pci/pcie_host.c
>> @@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque,
>>   static const MemoryRegionOps pcie_mmcfg_ops = {
>>       .read = pcie_mmcfg_data_read,
>>       .write = pcie_mmcfg_data_write,
>> -    .endianness = DEVICE_NATIVE_ENDIAN,
>> +    .endianness = DEVICE_LITTLE_ENDIAN,
>>   };
>>     static void pcie_host_init(Object *obj)
>>
>
>
> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
>
> Thanks,
> Marcel