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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id v19-20020a05651203b300b00477c583e757sm1809868lfp.275.2022.05.23.00.35.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 00:36:01 -0700 (PDT) Message-ID: Date: Mon, 23 May 2022 09:35:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock Content-Language: en-US To: Tomer Maimon , avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, daniel.lezcano@linaro.org, tglx@linutronix.de, wim@linux-watchdog.org, linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, jirislaby@kernel.org, shawnguo@kernel.org, bjorn.andersson@linaro.org, geert+renesas@glider.be, marcel.ziswiler@toradex.com, vkoul@kernel.org, biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp, robert.hancock@calian.com, j.neuschaefer@gmx.net, lkundrak@v3.sk Cc: soc@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-8-tmaimon77@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20220522155046.260146-8-tmaimon77@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/05/2022 17:50, Tomer Maimon wrote: > Nuvoton Arbel BMC NPCM7XX contains an integrated clock controller, which > generates and supplies clocks to all modules within the BMC. > > Signed-off-by: Tomer Maimon > --- > .../bindings/clock/nuvoton,npcm845-clk.yaml | 68 +++++++++++++++++++ > .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 ++++++++++++++ > 2 files changed, 118 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > > diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > new file mode 100644 > index 000000000000..f305c7c7eaf0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Nuvoton NPCM8XX Clock Controller Binding > + > +maintainers: > + - Tomer Maimon > + > +description: | > + Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which > + generates and supplies clocks to all modules within the BMC. > + > +properties: > + compatible: > + enum: > + - nuvoton,npcm845-clk > + > + reg: > + maxItems: 1 > + > + clocks: > + description: > + specify the external clocks used by the NPCM8XX clock module. Skip description, it's obvious. > + items: > + - description: 25M reference clock > + - description: CPU reference clock > + - description: MC reference clock > + > + clock-names: > + description: > + specify the external clocks names used by the NPCM8XX clock module. Skip description, it's obvious. > + items: > + - const: refclk Just "ref" > + - const: sysbypck > + - const: mcbypck Is "ck" short for "clk"? If yes, then just skip the suffix. > + > + '#clock-cells': > + const: 1 > + description: > + See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full > + list of NPCM8XX clock IDs. > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + # Clock Control Module node: > + - | > + No need for blank line. > + ahb { > + #address-cells = <2>; > + #size-cells = <2>; > + > + clk: clock-controller@f0801000 { > + compatible = "nuvoton,npcm845-clk"; > + reg = <0x0 0xf0801000 0x0 0x1000>; > + #clock-cells = <1>; > + }; > + }; > + > +... > diff --git a/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > new file mode 100644 > index 000000000000..d76f606bf88b > --- /dev/null > +++ b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h Filename - same as bindings, so nuvoton,npcm845-clk.h > @@ -0,0 +1,50 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ Dual license, same as bindings. > +/* > + * Nuvoton NPCM8xx Clock Generator binding > + * clock binding number for all clocks supportted by nuvoton,npcm8xx-clk > + * > + * Copyright (C) 2021 Nuvoton Technologies tomer.maimon@nuvoton.com > + * > + */ > + > +#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H > +#define __DT_BINDINGS_CLOCK_NPCM8XX_H > + > +#define NPCM8XX_CLK_CPU 0 > +#define NPCM8XX_CLK_GFX_PIXEL 1 > +#define NPCM8XX_CLK_MC 2 > +#define NPCM8XX_CLK_ADC 3 > +#define NPCM8XX_CLK_AHB 4 > +#define NPCM8XX_CLK_TIMER 5 > +#define NPCM8XX_CLK_UART 6 > +#define NPCM8XX_CLK_UART2 7 > +#define NPCM8XX_CLK_MMC 8 > +#define NPCM8XX_CLK_SPI3 9 > +#define NPCM8XX_CLK_PCI 10 > +#define NPCM8XX_CLK_AXI 11 > +#define NPCM8XX_CLK_APB4 12 > +#define NPCM8XX_CLK_APB3 13 > +#define NPCM8XX_CLK_APB2 14 > +#define NPCM8XX_CLK_APB1 15 > +#define NPCM8XX_CLK_APB5 16 > +#define NPCM8XX_CLK_CLKOUT 17 > +#define NPCM8XX_CLK_GFX 18 > +#define NPCM8XX_CLK_SU 19 > +#define NPCM8XX_CLK_SU48 20 > +#define NPCM8XX_CLK_SDHC 21 > +#define NPCM8XX_CLK_SPI0 22 > +#define NPCM8XX_CLK_SPI1 23 > +#define NPCM8XX_CLK_SPIX 24 > +#define NPCM8XX_CLK_RG 25 > +#define NPCM8XX_CLK_RCP 26 > +#define NPCM8XX_CLK_PRE_ADC 27 > +#define NPCM8XX_CLK_ATB 28 > +#define NPCM8XX_CLK_PRE_CLK 29 > +#define NPCM8XX_CLK_TH 30 > +#define NPCM8XX_CLK_REFCLK 31 > +#define NPCM8XX_CLK_SYSBYPCK 32 > +#define NPCM8XX_CLK_MCBYPCK 33 > + > +#define NPCM8XX_NUM_CLOCKS (NPCM8XX_CLK_MCBYPCK + 1) > + > +#endif Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A744EC433EF for ; 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id v19-20020a05651203b300b00477c583e757sm1809868lfp.275.2022.05.23.00.35.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 00:36:01 -0700 (PDT) Message-ID: Date: Mon, 23 May 2022 09:35:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock Content-Language: en-US To: Tomer Maimon , avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, daniel.lezcano@linaro.org, tglx@linutronix.de, wim@linux-watchdog.org, linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, jirislaby@kernel.org, shawnguo@kernel.org, bjorn.andersson@linaro.org, geert+renesas@glider.be, marcel.ziswiler@toradex.com, vkoul@kernel.org, biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp, robert.hancock@calian.com, j.neuschaefer@gmx.net, lkundrak@v3.sk Cc: soc@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-8-tmaimon77@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20220522155046.260146-8-tmaimon77@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220523_083708_864450_1B27D5AA X-CRM114-Status: GOOD ( 19.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 22/05/2022 17:50, Tomer Maimon wrote: > Nuvoton Arbel BMC NPCM7XX contains an integrated clock controller, which > generates and supplies clocks to all modules within the BMC. > > Signed-off-by: Tomer Maimon > --- > .../bindings/clock/nuvoton,npcm845-clk.yaml | 68 +++++++++++++++++++ > .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 ++++++++++++++ > 2 files changed, 118 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > > diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > new file mode 100644 > index 000000000000..f305c7c7eaf0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Nuvoton NPCM8XX Clock Controller Binding > + > +maintainers: > + - Tomer Maimon > + > +description: | > + Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which > + generates and supplies clocks to all modules within the BMC. > + > +properties: > + compatible: > + enum: > + - nuvoton,npcm845-clk > + > + reg: > + maxItems: 1 > + > + clocks: > + description: > + specify the external clocks used by the NPCM8XX clock module. Skip description, it's obvious. > + items: > + - description: 25M reference clock > + - description: CPU reference clock > + - description: MC reference clock > + > + clock-names: > + description: > + specify the external clocks names used by the NPCM8XX clock module. Skip description, it's obvious. > + items: > + - const: refclk Just "ref" > + - const: sysbypck > + - const: mcbypck Is "ck" short for "clk"? If yes, then just skip the suffix. > + > + '#clock-cells': > + const: 1 > + description: > + See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full > + list of NPCM8XX clock IDs. > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + # Clock Control Module node: > + - | > + No need for blank line. > + ahb { > + #address-cells = <2>; > + #size-cells = <2>; > + > + clk: clock-controller@f0801000 { > + compatible = "nuvoton,npcm845-clk"; > + reg = <0x0 0xf0801000 0x0 0x1000>; > + #clock-cells = <1>; > + }; > + }; > + > +... > diff --git a/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > new file mode 100644 > index 000000000000..d76f606bf88b > --- /dev/null > +++ b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h Filename - same as bindings, so nuvoton,npcm845-clk.h > @@ -0,0 +1,50 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ Dual license, same as bindings. > +/* > + * Nuvoton NPCM8xx Clock Generator binding > + * clock binding number for all clocks supportted by nuvoton,npcm8xx-clk > + * > + * Copyright (C) 2021 Nuvoton Technologies tomer.maimon@nuvoton.com > + * > + */ > + > +#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H > +#define __DT_BINDINGS_CLOCK_NPCM8XX_H > + > +#define NPCM8XX_CLK_CPU 0 > +#define NPCM8XX_CLK_GFX_PIXEL 1 > +#define NPCM8XX_CLK_MC 2 > +#define NPCM8XX_CLK_ADC 3 > +#define NPCM8XX_CLK_AHB 4 > +#define NPCM8XX_CLK_TIMER 5 > +#define NPCM8XX_CLK_UART 6 > +#define NPCM8XX_CLK_UART2 7 > +#define NPCM8XX_CLK_MMC 8 > +#define NPCM8XX_CLK_SPI3 9 > +#define NPCM8XX_CLK_PCI 10 > +#define NPCM8XX_CLK_AXI 11 > +#define NPCM8XX_CLK_APB4 12 > +#define NPCM8XX_CLK_APB3 13 > +#define NPCM8XX_CLK_APB2 14 > +#define NPCM8XX_CLK_APB1 15 > +#define NPCM8XX_CLK_APB5 16 > +#define NPCM8XX_CLK_CLKOUT 17 > +#define NPCM8XX_CLK_GFX 18 > +#define NPCM8XX_CLK_SU 19 > +#define NPCM8XX_CLK_SU48 20 > +#define NPCM8XX_CLK_SDHC 21 > +#define NPCM8XX_CLK_SPI0 22 > +#define NPCM8XX_CLK_SPI1 23 > +#define NPCM8XX_CLK_SPIX 24 > +#define NPCM8XX_CLK_RG 25 > +#define NPCM8XX_CLK_RCP 26 > +#define NPCM8XX_CLK_PRE_ADC 27 > +#define NPCM8XX_CLK_ATB 28 > +#define NPCM8XX_CLK_PRE_CLK 29 > +#define NPCM8XX_CLK_TH 30 > +#define NPCM8XX_CLK_REFCLK 31 > +#define NPCM8XX_CLK_SYSBYPCK 32 > +#define NPCM8XX_CLK_MCBYPCK 33 > + > +#define NPCM8XX_NUM_CLOCKS (NPCM8XX_CLK_MCBYPCK + 1) > + > +#endif Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel