From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8ABB7A for ; Tue, 28 Jun 2022 01:29:05 +0000 (UTC) X-UUID: d25a3e05e8e04b07975f69cd97f093c1-20220628 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.7,REQID:598d69e1-2e86-4ed9-88fe-39ec2e4df200,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:-5,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,AC TION:release,TS:45 X-CID-INFO: VERSION:1.1.7,REQID:598d69e1-2e86-4ed9-88fe-39ec2e4df200,OB:0,LOB: 0,IP:0,URL:5,TC:0,Content:-5,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:45 X-CID-META: VersionHash:87442a2,CLOUDID:9081fdd5-5d6d-4eaf-a635-828a3ee48b7c,C OID:654ee3ec7d39,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: d25a3e05e8e04b07975f69cd97f093c1-20220628 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 42291440; Tue, 28 Jun 2022 09:28:52 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 28 Jun 2022 09:28:50 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 28 Jun 2022 09:28:50 +0800 Message-ID: Subject: Re: [PATCH v23 01/14] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 From: CK Hu To: Nancy.Lin , Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , , AngeloGioacchino Del Regno , CC: , , Yongqiang Niu , David Airlie , "jason-jh . lin" , , , Nick Desaulniers , , , "Nathan Chancellor" , , Date: Tue, 28 Jun 2022 09:28:50 +0800 In-Reply-To: <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> References: <20220620091930.27797-1-nancy.lin@mediatek.com> <20220620091930.27797-2-nancy.lin@mediatek.com> <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N OK, it seems no one has comment on this patch, so applied to mediatek- drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK On Wed, 2022-06-22 at 11:55 +0800, CK Hu wrote: > Hi, Rob: > > You have ask Nancy question in old version and Nancy has reply in > [1], > how do you think about Nancy's reply? > > [1] > http://lists.infradead.org/pipermail/linux-mediatek/2022-April/039890.html > > Regards, > CK > > On Mon, 2022-06-20 at 17:19 +0800, Nancy.Lin wrote: > > Add vdosys1 RDMA definition. > > > > Signed-off-by: Nancy.Lin > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > Reviewed-by: Krzysztof Kozlowski > > Tested-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > .../display/mediatek/mediatek,mdp-rdma.yaml | 88 > > +++++++++++++++++++ > > 1 file changed, 88 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > new file mode 100644 > > index 000000000000..dd12e2ff685c > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > @@ -0,0 +1,88 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTManclYLSA$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTMZYdJgbgQ$ > > > > + > > +title: MediaTek MDP RDMA > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Philipp Zabel > > + > > +description: > > + The MediaTek MDP RDMA stands for Read Direct Memory Access. > > + It provides real time data to the back-end panel driver, such as > > DSI, > > + DPI and DP_INTF. > > + It contains one line buffer to store the sufficient pixel data. > > + RDMA device node must be siblings to the central MMSYS_CONFIG > > node. > > + For a description of the MMSYS_CONFIG binding, see > > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya > > ml > > for details. > > + > > +properties: > > + compatible: > > + const: mediatek,mt8195-vdo1-rdma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: RDMA Clock > > + > > + iommus: > > + maxItems: 1 > > + > > + mediatek,gce-client-reg: > > + description: > > + The register of display function block to be set by gce. > > There > > are 4 arguments, > > + such as gce node, subsys id, offset and register size. The > > subsys id that is > > + mapping to the register of display function blocks is > > defined > > in the gce header > > + include/dt-bindings/gce/-gce.h of each chips. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + items: > > + - description: phandle of GCE > > + - description: GCE subsys id > > + - description: register offset > > + - description: register size > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - power-domains > > + - clocks > > + - iommus > > + - mediatek,gce-client-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + #include > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + rdma@1c104000 { > > + compatible = "mediatek,mt8195-vdo1-rdma"; > > + reg = <0 0x1c104000 0 0x1000>; > > + interrupts = ; > > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; > > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; > > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX > > 0x4000 > > 0x1000>; > > + }; > > + }; From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B489C433EF for ; Tue, 28 Jun 2022 01:29:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A245210E400; Tue, 28 Jun 2022 01:29:01 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 33E1510E2C0 for ; Tue, 28 Jun 2022 01:28:59 +0000 (UTC) X-UUID: d25a3e05e8e04b07975f69cd97f093c1-20220628 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.7, REQID:598d69e1-2e86-4ed9-88fe-39ec2e4df200, OB:0, LO B:0,IP:0,URL:5,TC:0,Content:-5,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,AC TION:release,TS:45 X-CID-INFO: VERSION:1.1.7, REQID:598d69e1-2e86-4ed9-88fe-39ec2e4df200, OB:0, LOB: 0,IP:0,URL:5,TC:0,Content:-5,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:45 X-CID-META: VersionHash:87442a2, CLOUDID:9081fdd5-5d6d-4eaf-a635-828a3ee48b7c, C OID:654ee3ec7d39,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: d25a3e05e8e04b07975f69cd97f093c1-20220628 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 42291440; Tue, 28 Jun 2022 09:28:52 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 28 Jun 2022 09:28:50 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 28 Jun 2022 09:28:50 +0800 Message-ID: Subject: Re: [PATCH v23 01/14] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 From: CK Hu To: Nancy.Lin , Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , , AngeloGioacchino Del Regno , Date: Tue, 28 Jun 2022 09:28:50 +0800 In-Reply-To: <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> References: <20220620091930.27797-1-nancy.lin@mediatek.com> <20220620091930.27797-2-nancy.lin@mediatek.com> <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, David Airlie , "jason-jh . lin" , singo.chang@mediatek.com, llvm@lists.linux.dev, Nick Desaulniers , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, Yongqiang Niu , Nathan Chancellor , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" OK, it seems no one has comment on this patch, so applied to mediatek- drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK On Wed, 2022-06-22 at 11:55 +0800, CK Hu wrote: > Hi, Rob: > > You have ask Nancy question in old version and Nancy has reply in > [1], > how do you think about Nancy's reply? > > [1] > http://lists.infradead.org/pipermail/linux-mediatek/2022-April/039890.html > > Regards, > CK > > On Mon, 2022-06-20 at 17:19 +0800, Nancy.Lin wrote: > > Add vdosys1 RDMA definition. > > > > Signed-off-by: Nancy.Lin > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > Reviewed-by: Krzysztof Kozlowski > > Tested-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > .../display/mediatek/mediatek,mdp-rdma.yaml | 88 > > +++++++++++++++++++ > > 1 file changed, 88 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > new file mode 100644 > > index 000000000000..dd12e2ff685c > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > @@ -0,0 +1,88 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTManclYLSA$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTMZYdJgbgQ$ > > > > + > > +title: MediaTek MDP RDMA > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Philipp Zabel > > + > > +description: > > + The MediaTek MDP RDMA stands for Read Direct Memory Access. > > + It provides real time data to the back-end panel driver, such as > > DSI, > > + DPI and DP_INTF. > > + It contains one line buffer to store the sufficient pixel data. > > + RDMA device node must be siblings to the central MMSYS_CONFIG > > node. > > + For a description of the MMSYS_CONFIG binding, see > > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya > > ml > > for details. > > + > > +properties: > > + compatible: > > + const: mediatek,mt8195-vdo1-rdma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: RDMA Clock > > + > > + iommus: > > + maxItems: 1 > > + > > + mediatek,gce-client-reg: > > + description: > > + The register of display function block to be set by gce. > > There > > are 4 arguments, > > + such as gce node, subsys id, offset and register size. The > > subsys id that is > > + mapping to the register of display function blocks is > > defined > > in the gce header > > + include/dt-bindings/gce/-gce.h of each chips. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + items: > > + - description: phandle of GCE > > + - description: GCE subsys id > > + - description: register offset > > + - description: register size > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - power-domains > > + - clocks > > + - iommus > > + - mediatek,gce-client-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + #include > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + rdma@1c104000 { > > + compatible = "mediatek,mt8195-vdo1-rdma"; > > + reg = <0 0x1c104000 0 0x1000>; > > + interrupts = ; > > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; > > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; > > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX > > 0x4000 > > 0x1000>; > > + }; > > + }; From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B3B9CCA479 for ; Tue, 28 Jun 2022 05:54:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 27 Jun 2022 22:50:50 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 28 Jun 2022 09:28:50 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 28 Jun 2022 09:28:50 +0800 Message-ID: Subject: Re: [PATCH v23 01/14] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 From: CK Hu To: Nancy.Lin , Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , , AngeloGioacchino Del Regno , CC: , , Yongqiang Niu , David Airlie , "jason-jh . lin" , , , Nick Desaulniers , , , "Nathan Chancellor" , , Date: Tue, 28 Jun 2022 09:28:50 +0800 In-Reply-To: <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> References: <20220620091930.27797-1-nancy.lin@mediatek.com> <20220620091930.27797-2-nancy.lin@mediatek.com> <9749550d1f0cd8fd08d8bf684ea80cb6defc90d3.camel@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_225056_745151_80C388DC X-CRM114-Status: GOOD ( 26.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org OK, it seems no one has comment on this patch, so applied to mediatek- drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK On Wed, 2022-06-22 at 11:55 +0800, CK Hu wrote: > Hi, Rob: > > You have ask Nancy question in old version and Nancy has reply in > [1], > how do you think about Nancy's reply? > > [1] > http://lists.infradead.org/pipermail/linux-mediatek/2022-April/039890.html > > Regards, > CK > > On Mon, 2022-06-20 at 17:19 +0800, Nancy.Lin wrote: > > Add vdosys1 RDMA definition. > > > > Signed-off-by: Nancy.Lin > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > Reviewed-by: Krzysztof Kozlowski > > Tested-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > .../display/mediatek/mediatek,mdp-rdma.yaml | 88 > > +++++++++++++++++++ > > 1 file changed, 88 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > new file mode 100644 > > index 000000000000..dd12e2ff685c > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > @@ -0,0 +1,88 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTManclYLSA$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!2V-LPisZwDTVUkpQ5cJnZhaUV4iBSohT_B1_8bY3yar4Iuacq_NaTMZYdJgbgQ$ > > > > + > > +title: MediaTek MDP RDMA > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Philipp Zabel > > + > > +description: > > + The MediaTek MDP RDMA stands for Read Direct Memory Access. > > + It provides real time data to the back-end panel driver, such as > > DSI, > > + DPI and DP_INTF. > > + It contains one line buffer to store the sufficient pixel data. > > + RDMA device node must be siblings to the central MMSYS_CONFIG > > node. > > + For a description of the MMSYS_CONFIG binding, see > > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya > > ml > > for details. > > + > > +properties: > > + compatible: > > + const: mediatek,mt8195-vdo1-rdma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: RDMA Clock > > + > > + iommus: > > + maxItems: 1 > > + > > + mediatek,gce-client-reg: > > + description: > > + The register of display function block to be set by gce. > > There > > are 4 arguments, > > + such as gce node, subsys id, offset and register size. The > > subsys id that is > > + mapping to the register of display function blocks is > > defined > > in the gce header > > + include/dt-bindings/gce/-gce.h of each chips. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + items: > > + - description: phandle of GCE > > + - description: GCE subsys id > > + - description: register offset > > + - description: register size > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - power-domains > > + - clocks > > + - iommus > > + - mediatek,gce-client-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + #include > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + rdma@1c104000 { > > + compatible = "mediatek,mt8195-vdo1-rdma"; > > + reg = <0 0x1c104000 0 0x1000>; > > + interrupts = ; > > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; > > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; > > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX > > 0x4000 > > 0x1000>; > > + }; > > + }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel