All of lore.kernel.org
 help / color / mirror / Atom feed
From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Vijay Kilari <vijay.kilari@gmail.com>
Subject: Re: [PATCH v5 12/30] ARM: GICv3: introduce separate pending_irq structs for LPIs
Date: Thu, 6 Apr 2017 16:59:48 +0100	[thread overview]
Message-ID: <f06b44e2-e41f-472b-440d-25043fa46c65@arm.com> (raw)
In-Reply-To: <1491434362-30310-13-git-send-email-andre.przywara@arm.com>

Hi Andre,

On 06/04/17 00:19, Andre Przywara wrote:
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index 142eb64..5128f13 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1451,6 +1451,9 @@ static int vgic_v3_domain_init(struct domain *d)
>
>      vgic_v3_its_init_domain(d);
>
> +    rwlock_init(&d->arch.vgic.pend_lpi_tree_lock);
> +    radix_tree_init(&d->arch.vgic.pend_lpi_tree);
> +
>      /*
>       * Domain 0 gets the hardware address.
>       * Guests get the virtual platform layout.
> @@ -1524,14 +1527,33 @@ static int vgic_v3_domain_init(struct domain *d)
>  static void vgic_v3_domain_free(struct domain *d)
>  {
>      vgic_v3_its_free_domain(d);
> +    radix_tree_destroy(&d->arch.vgic.pend_lpi_tree, NULL);
>      xfree(d->arch.vgic.rdist_regions);
>  }
>
> +/*
> + * Looks up a virtual LPI number in our tree of mapped LPIs. This will return
> + * the corresponding struct pending_irq, which we also use to store the
> + * enabled and pending bit plus the priority.
> + * Returns NULL if an LPI cannot be found (or no LPIs are supported).

I asked few questions on the previous version about when lpi_to_pending 
returns NULL and the fact that none of the vGIC code is able to handle 
that. I was hoping a bit of documentation/ASSERT in the code rather than 
hiding the problem as you seem to do in this version.

Looking at the whole code, I see that you insert the pending_irq in the 
radix when on MAPTI. But never remove it. However the command DISCARD or 
MAPD (V=0) will remove the mapping from the ITT.

Which means it is never possible to re-use the same vLPI again. However 
if you remove from the radix tree you may end up having the LPI still in 
LR but lpi_to_pending return NULL and make Xen segfault.

So what will protect Xen against segfault? What is the plan?


> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
> index 503a3cf..6ee7538 100644
> --- a/xen/include/asm-arm/domain.h
> +++ b/xen/include/asm-arm/domain.h
> @@ -111,6 +111,8 @@ struct arch_domain
>          uint32_t rdist_stride;              /* Re-Distributor stride */
>          struct rb_root its_devices;         /* Devices mapped to an ITS */
>          spinlock_t its_devices_lock;        /* Protects the its_devices tree */
> +        struct radix_tree_root pend_lpi_tree; /* Stores struct pending_irq's */
> +        rwlock_t pend_lpi_tree_lock;        /* Protects the pend_lpi_tree */
>  #endif
>      } vgic;
>
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 894c3f1..7c86f5b 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -134,6 +134,8 @@ struct vgic_ops {
>      void (*domain_free)(struct domain *d);
>      /* vGIC sysreg/cpregs emulate */
>      bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr);
> +    /* lookup the struct pending_irq for a given LPI interrupt */
> +    struct pending_irq *(*lpi_to_pending)(struct domain *d, unsigned int vlpi);
>      /* Maximum number of vCPU supported */
>      const unsigned int max_vcpus;
>  };
>

Cheers,

-- 
Julien Grall

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

  reply	other threads:[~2017-04-06 15:59 UTC|newest]

Thread overview: 122+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-05 23:18 [PATCH v5 00/30] arm64: Dom0 ITS emulation Andre Przywara
2017-04-05 23:18 ` [PATCH v5 01/30] bitops: add GENMASK_ULL Andre Przywara
2017-04-05 23:25   ` Stefano Stabellini
2017-04-06  8:45     ` Julien Grall
2017-04-06  9:15       ` Jan Beulich
2017-04-06  9:55         ` Andre Przywara
2017-04-05 23:18 ` [PATCH v5 02/30] bitops: add BIT_ULL variant Andre Przywara
2017-04-05 23:26   ` Stefano Stabellini
2017-04-05 23:18 ` [PATCH v5 03/30] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2017-04-05 23:26   ` Stefano Stabellini
2017-04-06 12:39     ` Julien Grall
2017-04-06 14:56       ` Andre Przywara
2017-04-06 15:02         ` Julien Grall
2017-04-06 18:55     ` Andre Przywara
2017-04-05 23:18 ` [PATCH v5 04/30] ARM: GICv3 ITS: initialize host ITS Andre Przywara
2017-04-05 23:27   ` Stefano Stabellini
2017-04-06 12:41   ` Julien Grall
2017-04-05 23:18 ` [PATCH v5 05/30] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2017-04-05 23:30   ` Stefano Stabellini
2017-04-06 12:58   ` Julien Grall
2017-04-06 14:37     ` Andre Przywara
2017-04-06 14:37       ` Julien Grall
2017-04-05 23:18 ` [PATCH v5 06/30] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2017-04-06 14:44   ` Julien Grall
2017-04-06 15:49     ` Andre Przywara
2017-04-06 22:19   ` Julien Grall
2017-04-06 22:25     ` André Przywara
2017-04-05 23:18 ` [PATCH v5 07/30] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2017-04-06 14:49   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 08/30] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2017-04-05 23:33   ` Stefano Stabellini
2017-04-06 14:55   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 09/30] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2017-04-05 23:37   ` Stefano Stabellini
2017-04-06 10:31     ` Andre Przywara
2017-04-06 11:18       ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 10/30] ARM: vGICv3: introduce ITS emulation stub Andre Przywara
2017-04-06 15:17   ` Julien Grall
2017-04-07 14:31   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 11/30] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2017-04-05 23:41   ` Stefano Stabellini
2017-04-06 11:15     ` Julien Grall
2017-04-06 16:42       ` Stefano Stabellini
2017-04-06 17:12         ` Julien Grall
2017-04-06 15:34   ` Julien Grall
2017-04-06 16:10     ` Andre Przywara
2017-04-06 18:00       ` Julien Grall
2017-04-07 14:46   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 12/30] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-06 15:59   ` Julien Grall [this message]
2017-04-05 23:19 ` [PATCH v5 13/30] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-05 23:45   ` Stefano Stabellini
2017-04-06 17:42     ` Andre Przywara
2017-04-06 18:47       ` Stefano Stabellini
2017-04-06 19:13         ` Julien Grall
2017-04-06 19:47           ` Stefano Stabellini
2017-04-06 19:54             ` Julien Grall
2017-04-06 20:29               ` Stefano Stabellini
2017-04-06 18:10   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 14/30] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-05 23:19 ` [PATCH v5 15/30] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-05 23:55   ` Stefano Stabellini
2017-04-06 11:21     ` Julien Grall
2017-04-06 11:25     ` Andre Przywara
2017-04-06 11:24       ` Julien Grall
2017-04-06 11:28         ` Andre Przywara
2017-04-06 20:33   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 16/30] ARM: vGICv3: handle disabled LPIs Andre Przywara
2017-04-05 23:58   ` Stefano Stabellini
2017-04-06 19:09     ` Andre Przywara
2017-04-06 20:43       ` Stefano Stabellini
2017-04-06 21:20   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 17/30] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-06  0:21   ` Stefano Stabellini
2017-04-06  8:55     ` Andre Przywara
2017-04-06 21:43   ` Julien Grall
2017-04-06 22:22     ` André Przywara
2017-04-06 22:34       ` Julien Grall
2017-04-06 22:25   ` Julien Grall
2017-04-06 22:39   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 18/30] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-06 22:41   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 19/30] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-06  0:31   ` Stefano Stabellini
2017-04-05 23:19 ` [PATCH v5 20/30] ARM: vITS: handle INT command Andre Przywara
2017-04-05 23:19 ` [PATCH v5 21/30] ARM: vITS: handle MAPC command Andre Przywara
2017-04-05 23:19 ` [PATCH v5 22/30] ARM: vITS: handle MAPD command Andre Przywara
2017-04-06  0:39   ` Stefano Stabellini
2017-04-07 12:41   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 23/30] ARM: vITS: handle MAPTI command Andre Przywara
2017-04-06  0:45   ` Stefano Stabellini
2017-04-11 16:15     ` Andre Przywara
2017-04-07 12:53   ` Julien Grall
2017-04-07 13:07   ` Julien Grall
2017-04-07 13:12     ` Andre Przywara
2017-04-05 23:19 ` [PATCH v5 24/30] ARM: vITS: handle MOVI command Andre Przywara
2017-04-06  0:47   ` Stefano Stabellini
2017-04-06 10:07     ` Andre Przywara
2017-04-06 17:56       ` Stefano Stabellini
2017-04-07 12:55   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 25/30] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-06  0:48   ` Stefano Stabellini
2017-04-07 13:03   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 26/30] ARM: vITS: handle INV command Andre Przywara
2017-04-06  0:56   ` Stefano Stabellini
2017-04-07 13:23   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 27/30] ARM: vITS: handle INVALL command Andre Przywara
2017-04-05 23:19 ` [PATCH v5 28/30] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-04-07 13:38   ` Julien Grall
2017-04-05 23:19 ` [PATCH v5 29/30] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-04-07 13:41   ` Julien Grall
2017-04-07 13:46     ` Andre Przywara
2017-04-07 13:45       ` Julien Grall
2017-04-07 13:47         ` Julien Grall
2017-04-07 13:49           ` Andre Przywara
2017-04-05 23:19 ` [PATCH v5 30/30] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-06  1:04   ` Stefano Stabellini
2017-04-06 10:21     ` Andre Przywara
2017-04-06 11:42       ` Julien Grall
2017-04-06 22:54         ` André Przywara
2017-04-07 13:43   ` Julien Grall
2017-04-06 12:31 ` [PATCH v5 00/30] arm64: Dom0 ITS emulation Julien Grall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f06b44e2-e41f-472b-440d-25043fa46c65@arm.com \
    --to=julien.grall@arm.com \
    --cc=andre.przywara@arm.com \
    --cc=shankerd@codeaurora.org \
    --cc=sstabellini@kernel.org \
    --cc=vijay.kilari@gmail.com \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.