From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E25A5C46464 for ; Mon, 13 Aug 2018 07:52:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A6EEF217DF for ; Mon, 13 Aug 2018 07:52:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A6EEF217DF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728502AbeHMKdF (ORCPT ); Mon, 13 Aug 2018 06:33:05 -0400 Received: from foss.arm.com ([217.140.101.70]:55132 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726577AbeHMKdF (ORCPT ); Mon, 13 Aug 2018 06:33:05 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5913C7A9; Mon, 13 Aug 2018 00:52:00 -0700 (PDT) Received: from [10.4.13.119] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D6B223F73C; Mon, 13 Aug 2018 00:51:56 -0700 (PDT) Subject: Re: [PATCH v2 1/3] dt-bindings: interrupt-controller: Actions external interrupt controller To: Manivannan Sadhasivam , Parthiban Nallathambi Cc: tglx@linutronix.de, jason@lakedaemon.net, robh+dt@kernel.org, mark.rutland@arm.com, afaerber@suse.de, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, sravanhome@gmail.com, thomas.liau@actions-semi.com, mp-cs@actions-semi.com, linux@cubietech.com, edgar.righi@lsitec.org.br, laisa.costa@lsitec.org.br, guilherme.simoes@lsitec.org.br, mkzuffo@lsi.usp.br References: <20180812122215.1079590-1-pn@denx.de> <20180812122215.1079590-2-pn@denx.de> <20180813043406.GA16275@Mani-XPS-13-9360> From: Marc Zyngier Organization: ARM Ltd Message-ID: Date: Mon, 13 Aug 2018 08:51:54 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180813043406.GA16275@Mani-XPS-13-9360> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/08/18 05:34, Manivannan Sadhasivam wrote: > Hi Parthiban, > > On Sun, Aug 12, 2018 at 02:22:13PM +0200, Parthiban Nallathambi wrote: >> Actions Semi OWL family SoC's provides support for external interrupt >> controller to be connected and controlled using SIRQ pins. S500, S700 >> and S900 provides 3 SIRQ lines and works independently for 3 external >> interrupt controllers. >> >> Signed-off-by: Parthiban Nallathambi >> Signed-off-by: Saravanan Sekar >> --- >> .../interrupt-controller/actions,owl-sirq.txt | 46 ++++++++++++++++++++++ >> 1 file changed, 46 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> new file mode 100644 >> index 000000000000..4b8437751331 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> @@ -0,0 +1,46 @@ >> +Actions Semi Owl SoCs SIRQ interrupt controller >> + >> +S500, S700 and S900 SoC's from Actions provides 3 SPI's from GIC, >> +in which external interrupt controller can be connected. 3 SPI's >> +45, 46, 47 from GIC are directly exposed as SIRQ. It has >> +the following properties: > > We should really document the driver here. What it does? and how the > hierarchy is handled with GIC? etc... Absolutely not. This should document the binding, irrespective of the operating system. The word "driver" is completely out of place here. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 From: marc.zyngier@arm.com (Marc Zyngier) Date: Mon, 13 Aug 2018 08:51:54 +0100 Subject: [PATCH v2 1/3] dt-bindings: interrupt-controller: Actions external interrupt controller In-Reply-To: <20180813043406.GA16275@Mani-XPS-13-9360> References: <20180812122215.1079590-1-pn@denx.de> <20180812122215.1079590-2-pn@denx.de> <20180813043406.GA16275@Mani-XPS-13-9360> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 13/08/18 05:34, Manivannan Sadhasivam wrote: > Hi Parthiban, > > On Sun, Aug 12, 2018 at 02:22:13PM +0200, Parthiban Nallathambi wrote: >> Actions Semi OWL family SoC's provides support for external interrupt >> controller to be connected and controlled using SIRQ pins. S500, S700 >> and S900 provides 3 SIRQ lines and works independently for 3 external >> interrupt controllers. >> >> Signed-off-by: Parthiban Nallathambi >> Signed-off-by: Saravanan Sekar >> --- >> .../interrupt-controller/actions,owl-sirq.txt | 46 ++++++++++++++++++++++ >> 1 file changed, 46 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> new file mode 100644 >> index 000000000000..4b8437751331 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt >> @@ -0,0 +1,46 @@ >> +Actions Semi Owl SoCs SIRQ interrupt controller >> + >> +S500, S700 and S900 SoC's from Actions provides 3 SPI's from GIC, >> +in which external interrupt controller can be connected. 3 SPI's >> +45, 46, 47 from GIC are directly exposed as SIRQ. It has >> +the following properties: > > We should really document the driver here. What it does? and how the > hierarchy is handled with GIC? etc... Absolutely not. This should document the binding, irrespective of the operating system. The word "driver" is completely out of place here. Thanks, M. -- Jazz is not dead. It just smells funny...