From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54455) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f9BrV-0001yH-9S for qemu-devel@nongnu.org; Thu, 19 Apr 2018 11:52:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f9BrQ-0002Vf-Bh for qemu-devel@nongnu.org; Thu, 19 Apr 2018 11:52:41 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:33070 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f9BrQ-0002Uq-21 for qemu-devel@nongnu.org; Thu, 19 Apr 2018 11:52:36 -0400 References: <20180412151232.17506-1-tiwei.bie@intel.com> <20180412151232.17506-7-tiwei.bie@intel.com> <20180418192154-mutt-send-email-mst@kernel.org> <20180419111439.i6gfhnept6wy7uzp@debian> <20180419182035-mutt-send-email-mst@kernel.org> From: Paolo Bonzini Message-ID: Date: Thu, 19 Apr 2018 17:52:23 +0200 MIME-Version: 1.0 In-Reply-To: <20180419182035-mutt-send-email-mst@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 6/6] vhost-user: support registering external host notifiers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , "Liang, Cunming" Cc: "Bie, Tiwei" , "jasowang@redhat.com" , "alex.williamson@redhat.com" , "stefanha@redhat.com" , "qemu-devel@nongnu.org" , "virtio-dev@lists.oasis-open.org" , "Daly, Dan" , "Tan, Jianfeng" , "Wang, Zhihong" , "Wang, Xiao W" On 19/04/2018 17:42, Michael S. Tsirkin wrote: >> A compiler barrier is enough on strongly-ordered memory platform. >> As it doesn't re-order store, PCI device won't see a stale index >> value. But a weakly-ordered memory needs sfence. > > Oh you are right. > > So it's only needed for non-intel platforms or when packets are in > WC memory then. And I don't know whether dpdk ever puts packets in WC > memory. > > I guess we'll cross this bridge when we get to it. Non-TSO architectures seem important... Paolo From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: virtio-dev-return-3881-cohuck=redhat.com@lists.oasis-open.org Sender: List-Post: List-Help: List-Unsubscribe: List-Subscribe: Received: from lists.oasis-open.org (oasis-open.org [66.179.20.138]) by lists.oasis-open.org (Postfix) with ESMTP id 550D458191A0 for ; Thu, 19 Apr 2018 08:52:45 -0700 (PDT) References: <20180412151232.17506-1-tiwei.bie@intel.com> <20180412151232.17506-7-tiwei.bie@intel.com> <20180418192154-mutt-send-email-mst@kernel.org> <20180419111439.i6gfhnept6wy7uzp@debian> <20180419182035-mutt-send-email-mst@kernel.org> From: Paolo Bonzini Message-ID: Date: Thu, 19 Apr 2018 17:52:23 +0200 MIME-Version: 1.0 In-Reply-To: <20180419182035-mutt-send-email-mst@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: [virtio-dev] Re: [PATCH v3 6/6] vhost-user: support registering external host notifiers To: "Michael S. Tsirkin" , "Liang, Cunming" Cc: "Bie, Tiwei" , "jasowang@redhat.com" , "alex.williamson@redhat.com" , "stefanha@redhat.com" , "qemu-devel@nongnu.org" , "virtio-dev@lists.oasis-open.org" , "Daly, Dan" , "Tan, Jianfeng" , "Wang, Zhihong" , "Wang, Xiao W" List-ID: On 19/04/2018 17:42, Michael S. Tsirkin wrote: >> A compiler barrier is enough on strongly-ordered memory platform. >> As it doesn't re-order store, PCI device won't see a stale index >> value. But a weakly-ordered memory needs sfence. > > Oh you are right. > > So it's only needed for non-intel platforms or when packets are in > WC memory then. And I don't know whether dpdk ever puts packets in WC > memory. > > I guess we'll cross this bridge when we get to it. Non-TSO architectures seem important... Paolo --------------------------------------------------------------------- To unsubscribe, e-mail: virtio-dev-unsubscribe@lists.oasis-open.org For additional commands, e-mail: virtio-dev-help@lists.oasis-open.org