From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNQFM-00071P-IC for qemu-devel@nongnu.org; Thu, 15 Nov 2018 17:36:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gNQFG-0004bB-CI for qemu-devel@nongnu.org; Thu, 15 Nov 2018 17:36:22 -0500 From: Alistair Francis Date: Thu, 15 Nov 2018 22:36:09 +0000 Message-ID: References: In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: [Qemu-devel] [RFC v1 15/23] riscv: tcg-target: Add branch and jump instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" , "qemu-riscv@nongnu.org" Cc: Alistair Francis , "alistair23@gmail.com" Signed-off-by: Alistair Francis Signed-off-by: Michael Clark --- tcg/riscv/tcg-target.inc.c | 144 +++++++++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c index bc433170c4..b449e17295 100644 --- a/tcg/riscv/tcg-target.inc.c +++ b/tcg/riscv/tcg-target.inc.c @@ -574,6 +574,150 @@ static bool tcg_out_sti(TCGContext *s, TCGType type, = TCGArg val, return false; } =20 +static const struct { + RISCVInsn op; + bool swap; +} tcg_brcond_to_riscv[] =3D { + [TCG_COND_EQ] =3D { OPC_BEQ, false }, + [TCG_COND_NE] =3D { OPC_BNE, false }, + [TCG_COND_LT] =3D { OPC_BLT, false }, + [TCG_COND_GE] =3D { OPC_BGE, false }, + [TCG_COND_LE] =3D { OPC_BGE, true }, + [TCG_COND_GT] =3D { OPC_BLT, true }, + [TCG_COND_LTU] =3D { OPC_BLTU, false }, + [TCG_COND_GEU] =3D { OPC_BGEU, false }, + [TCG_COND_LEU] =3D { OPC_BGEU, true }, + [TCG_COND_GTU] =3D { OPC_BLTU, true } +}; + +static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, + TCGReg arg2, TCGLabel *l) +{ + RISCVInsn op =3D tcg_brcond_to_riscv[cond].op; + bool swap =3D tcg_brcond_to_riscv[cond].swap; + + tcg_out_opc_branch(s, op, swap ? arg2 : arg1, swap ? arg1 : arg2, 0); + + if (l->has_value) { + reloc_sbimm12(s->code_ptr - 1, l->u.value_ptr); + } else { + tcg_out_reloc(s, s->code_ptr - 1, R_RISCV_BRANCH, l, 0); + } +} + +static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret, + TCGReg arg1, TCGReg arg2) +{ + switch (cond) { + case TCG_COND_EQ: + tcg_out_opc_reg(s, OPC_SUB, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); + break; + case TCG_COND_NE: + tcg_out_opc_reg(s, OPC_SUB, ret, arg1, arg2); + tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, ret); + break; + case TCG_COND_LT: + tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2); + break; + case TCG_COND_GE: + tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_LE: + tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_GT: + tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1); + break; + case TCG_COND_LTU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); + break; + case TCG_COND_GEU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_LEU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_GTU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); + break; + default: + g_assert_not_reached(); + break; + } +} + +static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg= ah, + TCGReg bl, TCGReg bh, TCGLabel *l) +{ + /* todo */ + g_assert_not_reached(); +} + +static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, + TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh) +{ + /* todo */ + g_assert_not_reached(); +} + +static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target) +{ + ptrdiff_t offset =3D tcg_pcrel_diff(s, target); + tcg_debug_assert(offset =3D=3D sextract64(offset, 0, 26)); + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, offset); +} + +static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target) +{ + ptrdiff_t offset =3D tcg_pcrel_diff(s, target); + + if (offset =3D=3D sextract64(offset, 0, 26)) { + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, offset); + } else { + tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, (intptr_t)target); + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_TMP0, 0); + } +} + +static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail) +{ + TCGReg link =3D tail ? TCG_REG_ZERO : TCG_REG_RA; + ptrdiff_t offset =3D tcg_pcrel_diff(s, arg); + if (offset =3D=3D sextract32(offset, 1, 20) << 1) { + /* short jump: -2097150 to 2097152 */ + tcg_out_opc_jump(s, OPC_JAL, link, offset); + } else if (TCG_TARGET_REG_BITS =3D=3D 32 || + offset =3D=3D sextract32(offset, 1, 31) << 1) { + /* long jump: -2147483646 to 2147483648 */ + tcg_out_opc_upper(s, OPC_AUIPC, TCG_REG_TMP0, 0); + tcg_out_opc_imm(s, OPC_JALR, link, TCG_REG_TMP0, 0); + reloc_call(s->code_ptr - 2, arg); + } else if (TCG_TARGET_REG_BITS =3D=3D 64) { + /* far jump: 64-bit */ + tcg_target_long imm =3D sextract32((tcg_target_long)arg, 0, 12); + tcg_target_long base =3D (tcg_target_long)arg - imm; + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, base); + tcg_out_opc_imm(s, OPC_JALR, link, TCG_REG_TMP0, imm); + } else { + g_assert_not_reached(); + } +} + +static void tcg_out_tail(TCGContext *s, tcg_insn_unit *arg) +{ + tcg_out_call_int(s, arg, true); +} + +static void tcg_out_call(TCGContext *s, tcg_insn_unit *arg) +{ + tcg_out_call_int(s, arg, false); +} + void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_addr, uintptr_t addr) { --=20 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1gNQFq-0007Mq-2M for mharc-qemu-riscv@gnu.org; Thu, 15 Nov 2018 17:36:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48070) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNQFi-0007Iz-9z for qemu-riscv@nongnu.org; Thu, 15 Nov 2018 17:36:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gNQFS-0004en-NN for qemu-riscv@nongnu.org; Thu, 15 Nov 2018 17:36:39 -0500 Received: from esa3.hgst.iphmx.com ([216.71.153.141]:51983) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gNQFC-0004ZB-Rp; Thu, 15 Nov 2018 17:36:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1542321375; x=1573857375; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; 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X-Received-From: 216.71.153.141 Subject: [Qemu-riscv] [RFC v1 15/23] riscv: tcg-target: Add branch and jump instructions X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Nov 2018 22:36:52 -0000 Signed-off-by: Alistair Francis Signed-off-by: Michael Clark --- tcg/riscv/tcg-target.inc.c | 144 +++++++++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c index bc433170c4..b449e17295 100644 --- a/tcg/riscv/tcg-target.inc.c +++ b/tcg/riscv/tcg-target.inc.c @@ -574,6 +574,150 @@ static bool tcg_out_sti(TCGContext *s, TCGType type, = TCGArg val, return false; } =20 +static const struct { + RISCVInsn op; + bool swap; +} tcg_brcond_to_riscv[] =3D { + [TCG_COND_EQ] =3D { OPC_BEQ, false }, + [TCG_COND_NE] =3D { OPC_BNE, false }, + [TCG_COND_LT] =3D { OPC_BLT, false }, + [TCG_COND_GE] =3D { OPC_BGE, false }, + [TCG_COND_LE] =3D { OPC_BGE, true }, + [TCG_COND_GT] =3D { OPC_BLT, true }, + [TCG_COND_LTU] =3D { OPC_BLTU, false }, + [TCG_COND_GEU] =3D { OPC_BGEU, false }, + [TCG_COND_LEU] =3D { OPC_BGEU, true }, + [TCG_COND_GTU] =3D { OPC_BLTU, true } +}; + +static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, + TCGReg arg2, TCGLabel *l) +{ + RISCVInsn op =3D tcg_brcond_to_riscv[cond].op; + bool swap =3D tcg_brcond_to_riscv[cond].swap; + + tcg_out_opc_branch(s, op, swap ? arg2 : arg1, swap ? arg1 : arg2, 0); + + if (l->has_value) { + reloc_sbimm12(s->code_ptr - 1, l->u.value_ptr); + } else { + tcg_out_reloc(s, s->code_ptr - 1, R_RISCV_BRANCH, l, 0); + } +} + +static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret, + TCGReg arg1, TCGReg arg2) +{ + switch (cond) { + case TCG_COND_EQ: + tcg_out_opc_reg(s, OPC_SUB, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); + break; + case TCG_COND_NE: + tcg_out_opc_reg(s, OPC_SUB, ret, arg1, arg2); + tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, ret); + break; + case TCG_COND_LT: + tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2); + break; + case TCG_COND_GE: + tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_LE: + tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_GT: + tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1); + break; + case TCG_COND_LTU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); + break; + case TCG_COND_GEU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_LEU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); + tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1); + break; + case TCG_COND_GTU: + tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); + break; + default: + g_assert_not_reached(); + break; + } +} + +static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg= ah, + TCGReg bl, TCGReg bh, TCGLabel *l) +{ + /* todo */ + g_assert_not_reached(); +} + +static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, + TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh) +{ + /* todo */ + g_assert_not_reached(); +} + +static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target) +{ + ptrdiff_t offset =3D tcg_pcrel_diff(s, target); + tcg_debug_assert(offset =3D=3D sextract64(offset, 0, 26)); + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, offset); +} + +static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target) +{ + ptrdiff_t offset =3D tcg_pcrel_diff(s, target); + + if (offset =3D=3D sextract64(offset, 0, 26)) { + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, offset); + } else { + tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, (intptr_t)target); + tcg_out_opc_jump(s, OPC_JAL, TCG_REG_TMP0, 0); + } +} + +static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail) +{ + TCGReg link =3D tail ? TCG_REG_ZERO : TCG_REG_RA; + ptrdiff_t offset =3D tcg_pcrel_diff(s, arg); + if (offset =3D=3D sextract32(offset, 1, 20) << 1) { + /* short jump: -2097150 to 2097152 */ + tcg_out_opc_jump(s, OPC_JAL, link, offset); + } else if (TCG_TARGET_REG_BITS =3D=3D 32 || + offset =3D=3D sextract32(offset, 1, 31) << 1) { + /* long jump: -2147483646 to 2147483648 */ + tcg_out_opc_upper(s, OPC_AUIPC, TCG_REG_TMP0, 0); + tcg_out_opc_imm(s, OPC_JALR, link, TCG_REG_TMP0, 0); + reloc_call(s->code_ptr - 2, arg); + } else if (TCG_TARGET_REG_BITS =3D=3D 64) { + /* far jump: 64-bit */ + tcg_target_long imm =3D sextract32((tcg_target_long)arg, 0, 12); + tcg_target_long base =3D (tcg_target_long)arg - imm; + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, base); + tcg_out_opc_imm(s, OPC_JALR, link, TCG_REG_TMP0, imm); + } else { + g_assert_not_reached(); + } +} + +static void tcg_out_tail(TCGContext *s, tcg_insn_unit *arg) +{ + tcg_out_call_int(s, arg, true); +} + +static void tcg_out_call(TCGContext *s, tcg_insn_unit *arg) +{ + tcg_out_call_int(s, arg, false); +} + void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_addr, uintptr_t addr) { --=20 2.19.1