From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Thu, 7 Mar 2019 12:34:11 +0100 Subject: [U-Boot] [PATCH v2 04/12] ARM: kirkwood: switch to using mvebu mbus In-Reply-To: <20190307082805.15199-5-judge.packham@gmail.com> References: <20190307082805.15199-1-judge.packham@gmail.com> <20190307082805.15199-5-judge.packham@gmail.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07.03.19 09:27, Chris Packham wrote: > The mvebu mbus code already had most of the support required for > kirkwood. The only difference is that unlike the other mvebu targets > kirkwood doesn't have a bridge control block so the code related to > managing that needs to be compiled out. > > Signed-off-by: Chris Packham > --- > > arch/arm/mach-kirkwood/cpu.c | 33 ++++++++++++++++++++--- > arch/arm/mach-kirkwood/include/mach/cpu.h | 11 ++++++++ > arch/arm/mach-mvebu/Makefile | 1 + > arch/arm/mach-mvebu/mbus.c | 6 +++++ > 4 files changed, 48 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c > index 85c7f5903d94..311c5d50e2f9 100644 > --- a/arch/arm/mach-kirkwood/cpu.c > +++ b/arch/arm/mach-kirkwood/cpu.c > @@ -110,6 +110,32 @@ int kw_config_adr_windows(void) > return 0; > } > > +static struct mbus_win windows[] = { > + /* Window 0: PCIE MEM address space */ > + { KW_DEFADR_PCI_MEM, 1024 * 1024 * 256, > + KWCPU_TARGET_PCIE, KWCPU_ATTR_PCIE_MEM }, > + > + /* Window 1: PCIE IO address space */ > + { KW_DEFADR_PCI_IO, 1024 * 64, > + KWCPU_TARGET_PCIE, KWCPU_ATTR_PCIE_IO }, > + > + /* Window 2: NAND Flash address space */ > + { KW_DEFADR_NANDF, 1024 * 1024 * 128, > + KWCPU_TARGET_MEMORY, KWCPU_ATTR_NANDFLASH }, > + > + /* Window 3: SPI Flash address space */ > + { KW_DEFADR_SPIF, 1024 * 1024 * 128, > + KWCPU_TARGET_MEMORY, KWCPU_ATTR_SPIFLASH }, > + > + /* Window 4: BOOT Memory address space */ > + { KW_DEFADR_BOOTROM, 1024 * 1024 * 128, > + KWCPU_TARGET_MEMORY, KWCPU_ATTR_BOOTROM }, > + > + /* Window 5: Security SRAM address space */ > + { KW_DEFADR_SASRAM, 1024 * 64, > + KWCPU_TARGET_SASRAM, KWCPU_ATTR_SASRAM }, > +}; > + > /* > * SYSRSTn Duration Counter Support > * > @@ -221,15 +247,13 @@ int arch_cpu_init(void) > struct kwcpu_registers *cpureg = > (struct kwcpu_registers *)KW_CPU_REG_BASE; > > - /* Linux expects` the internal registers to be at 0xf1000000 */ > + /* Linux expects the internal registers to be at 0xf1000000 */ > writel(KW_REGS_PHY_BASE, KW_OFFSET_REG); > > /* Enable and invalidate L2 cache in write through mode */ > writel(readl(&cpureg->l2_cfg) | 0x18, &cpureg->l2_cfg); > invalidate_l2_cache(); > > - kw_config_adr_windows(); > - > #ifdef CONFIG_KIRKWOOD_RGMII_PAD_1V8 > /* > * Configures the I/O voltage of the pads connected to Egigabit > @@ -295,6 +319,9 @@ int arch_misc_init(void) > temp = get_cr(); > set_cr(temp & ~CR_V); > > + /* Configure mbus windows */ > + mvebu_mbus_probe(windows, ARRAY_SIZE(windows)); > + > /* checks and execute resset to factory event */ > kw_sysrst_check(); > > diff --git a/arch/arm/mach-kirkwood/include/mach/cpu.h b/arch/arm/mach-kirkwood/include/mach/cpu.h > index c35cace844ae..3d6b15568a8a 100644 > --- a/arch/arm/mach-kirkwood/include/mach/cpu.h > +++ b/arch/arm/mach-kirkwood/include/mach/cpu.h > @@ -68,6 +68,13 @@ enum kwcpu_attrib { > #define KW_DEFADR_SPIF 0xE8000000 > #define KW_DEFADR_BOOTROM 0xF8000000 > > +struct mbus_win { > + u32 base; > + u32 size; > + u8 target; > + u8 attr; > +}; > + > /* > * read feroceon/sheeva core extra feature register > * using co-proc instruction > @@ -134,6 +141,9 @@ struct kwgpio_registers { > u32 irq_level; > }; > > +/* Needed for dynamic (board-specific) mbus configuration */ > +extern struct mvebu_mbus_state mbus_state; > + > /* > * functions > */ > @@ -141,6 +151,7 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank); > unsigned int mvebu_sdram_bs(enum memory_bank bank); > void mvebu_sdram_size_adjust(enum memory_bank bank); > int kw_config_adr_windows(void); > +int mvebu_mbus_probe(struct mbus_win windows[], int count); > void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val, > unsigned int gpp0_oe, unsigned int gpp1_oe); > int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15, > diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile > index ee2eca913484..c0274a6f09aa 100644 > --- a/arch/arm/mach-mvebu/Makefile > +++ b/arch/arm/mach-mvebu/Makefile > @@ -14,6 +14,7 @@ ifdef CONFIG_KIRKWOOD > > obj-y = dram.o > obj-y += gpio.o > +obj-y += mbus.o > obj-y += timer.o > > else # CONFIG_KIRKWOOD > diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c > index df4c5cb2d718..9b2c57348266 100644 > --- a/arch/arm/mach-mvebu/mbus.c > +++ b/arch/arm/mach-mvebu/mbus.c > @@ -405,6 +405,7 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size) > return 0; > } > > +#ifndef CONFIG_KIRKWOOD > static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus, > phys_addr_t *base) > { > @@ -428,7 +429,9 @@ static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus, > *base = wbase; > } > } > +#endif > > +#ifndef CONFIG_KIRKWOOD > static void mvebu_config_mbus_bridge(struct mvebu_mbus_state *mbus) > { > phys_addr_t base; > @@ -451,6 +454,7 @@ static void mvebu_config_mbus_bridge(struct mvebu_mbus_state *mbus) > val = (size / (64 << 10)) - 1; > writel((val << 16) | 0x1, MBUS_BRIDGE_WIN_CTRL_REG); > } > +#endif Can't you combine those two #ifndef's above into one? Other than that looks good: Reviewed-by: Stefan Roese Thanks, Stefan