All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 08/10] ppc/xics: allow ICSState to have an offset 0
Date: Thu, 3 Jan 2019 18:45:25 +0100	[thread overview]
Message-ID: <f21712f9-0b67-cbe2-fa5c-7207dd9321be@kaod.org> (raw)
In-Reply-To: <20190103043340.GT10853@umbus.fritz.box>

On 1/3/19 5:33 AM, David Gibson wrote:
> On Wed, Jan 02, 2019 at 06:57:41AM +0100, Cédric Le Goater wrote:
>> commit 15ed653fa49a ("ppc/xics: An ICS with offset 0 is assumed to be
>> uninitialized") introduced an extra check on the ICS offset which is
>> not strictly necessary.
> 
> The commit message for that suggests it was added to make pnv easier.
> I take it you no longer need this for the current or expected pnv
> code?

This is really just a runtime check which makes sure that the 
ICSState offset is initialized by the FW before being used.

The problem is more global. It comes from the fact the ICSState 
offset in QEMU and the XICS offset in KVM is hardcoded to 0x1000. 

  Thinking aloud :

    May be we should default the offset to 0 and introduce a service 
    to set the value in QEMU and KVM.   

The 'dual' interrupt mode (using the qirq array at the machine level) 
needs the IRQ number space of the XIVE and XICS interrupt mode to
be in sync, that is to start a 0x0, even if the lower 4K are ignored
in XICS.   

So the 'dual' mode tunes the offset to 0 once the ICSState is created
and ignores the lower 4K when initializing the KVM XICS device. 

C.

>> Revert the change to be able to map the XICS IRQ number space on the
>> XIVE IRQ number space.
> 
> 
> 
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>  include/hw/ppc/xics.h | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
>> index 7668c381a887..07508cbd217e 100644
>> --- a/include/hw/ppc/xics.h
>> +++ b/include/hw/ppc/xics.h
>> @@ -139,8 +139,7 @@ struct ICSState {
>>  
>>  static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)
>>  {
>> -    return (ics->offset != 0) && (nr >= ics->offset)
>> -        && (nr < (ics->offset + ics->nr_irqs));
>> +    return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs));
>>  }
>>  
>>  struct ICSIRQState {
> 

  reply	other threads:[~2019-01-03 17:45 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-02  5:57 [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 01/10] spapr: modify the prototype of the cpu_intc_create() method Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 02/10] ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU Cédric Le Goater
2019-01-03  3:57   ` David Gibson
2019-01-03 17:44     ` Cédric Le Goater
2019-01-04  5:25       ` David Gibson
2019-01-02  5:57 ` [Qemu-devel] [PATCH 03/10] ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 04/10] spapr/xive: simplify the sPAPR IRQ qirq method for XIVE Cédric Le Goater
2019-01-03  3:58   ` David Gibson
2019-01-02  5:57 ` [Qemu-devel] [PATCH 05/10] ppc: export the XICS and XIVE set_irq handlers Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 06/10] pnv/psi: move the ICSState qemu_irq array under the PSI device model Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 07/10] spapr: move the qemu_irq array under the machine Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 08/10] ppc/xics: allow ICSState to have an offset 0 Cédric Le Goater
2019-01-03  4:33   ` David Gibson
2019-01-03 17:45     ` Cédric Le Goater [this message]
2019-01-07  4:29       ` David Gibson
2019-01-02  5:57 ` [Qemu-devel] [PATCH 09/10] spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS Cédric Le Goater
2019-01-03  4:35   ` David Gibson
2019-01-03 17:45     ` Cédric Le Goater
2019-01-02  5:57 ` [Qemu-devel] [PATCH 10/10] spapr: enable XIVE MMIOs at reset Cédric Le Goater
2019-01-07  4:48 ` [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE David Gibson
2019-01-07  6:54   ` Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f21712f9-0b67-cbe2-fa5c-7207dd9321be@kaod.org \
    --to=clg@kaod.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.