On Tue, 2023-07-25 at 12:45 +0200, Greg Kroah-Hartman wrote:
> From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> 
> commit a33d700e8eea76c62120cb3dbf5e01328f18319a upstream.
> 
> In the post init sequence of v2.9.0, write access to read only registers
> are not disabled after updating the registers. Fix it by disabling the
> access after register update.
> 
> Link: https://lore.kernel.org/r/20230619150408.8468-2-manivannan.sadhasivam@linaro.org
> Fixes: 5d76117f070d ("PCI: qcom: Add support for IPQ8074 PCIe controller")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c |    2 ++
>  1 file changed, 2 insertions(+)
> 
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -771,6 +771,8 @@ static int qcom_pcie_get_resources_2_4_0

This fix was supposed to be for v2.3.3 of the hardware and originally
changed the function qcom_pcie_get_resources_2_3_3().

However, the backports to 4.19, 5.4, and 5.10 applied this change to
the similar function qcom_pcie_get_resources_2_4_0().

Please move the added function call into the correct function.

Ben.

>  			return PTR_ERR(res->phy_ahb_reset);
>  	}
>  
> +	dw_pcie_dbi_ro_wr_dis(pci);
> +
>  	return 0;
>  }
>  
> 
> 

-- 
Ben Hutchings
It is easier to change the specification to fit the program
than vice versa.